diff options
author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2011-06-29 00:23:42 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-06-29 04:37:30 -0400 |
commit | 6afba9e7fca5ad6a701c13760639faa0906fe487 (patch) | |
tree | f01af47c391616baabec8f044ca67b270356257c /arch/sh | |
parent | b00c2c79d9ceac49d8b3ba3b097e5df33f802d9a (diff) |
sh: fix the value of sh_dmae_slave_config in setup-sh7757
Fix the value of chcr for SCIF[2-4]_RX and RIIC[0-9]_RX and
the value of mid_rid for some RIIC.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7757.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c index fad2da4c97cf..e915deafac89 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c | |||
@@ -183,7 +183,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = { | |||
183 | { | 183 | { |
184 | .slave_id = SHDMA_SLAVE_SCIF2_RX, | 184 | .slave_id = SHDMA_SLAVE_SCIF2_RX, |
185 | .addr = 0x1f4b0014, | 185 | .addr = 0x1f4b0014, |
186 | .chcr = SM_INC | 0x800 | 0x40000000 | | 186 | .chcr = DM_INC | 0x800 | 0x40000000 | |
187 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 187 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
188 | .mid_rid = 0x22, | 188 | .mid_rid = 0x22, |
189 | }, | 189 | }, |
@@ -197,7 +197,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = { | |||
197 | { | 197 | { |
198 | .slave_id = SHDMA_SLAVE_SCIF3_RX, | 198 | .slave_id = SHDMA_SLAVE_SCIF3_RX, |
199 | .addr = 0x1f4c0014, | 199 | .addr = 0x1f4c0014, |
200 | .chcr = SM_INC | 0x800 | 0x40000000 | | 200 | .chcr = DM_INC | 0x800 | 0x40000000 | |
201 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 201 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
202 | .mid_rid = 0x2a, | 202 | .mid_rid = 0x2a, |
203 | }, | 203 | }, |
@@ -211,7 +211,7 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = { | |||
211 | { | 211 | { |
212 | .slave_id = SHDMA_SLAVE_SCIF4_RX, | 212 | .slave_id = SHDMA_SLAVE_SCIF4_RX, |
213 | .addr = 0x1f4d0014, | 213 | .addr = 0x1f4d0014, |
214 | .chcr = SM_INC | 0x800 | 0x40000000 | | 214 | .chcr = DM_INC | 0x800 | 0x40000000 | |
215 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 215 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
216 | .mid_rid = 0x42, | 216 | .mid_rid = 0x42, |
217 | }, | 217 | }, |
@@ -228,7 +228,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { | |||
228 | { | 228 | { |
229 | .slave_id = SHDMA_SLAVE_RIIC0_RX, | 229 | .slave_id = SHDMA_SLAVE_RIIC0_RX, |
230 | .addr = 0x1e500013, | 230 | .addr = 0x1e500013, |
231 | .chcr = SM_INC | 0x800 | 0x40000000 | | 231 | .chcr = DM_INC | 0x800 | 0x40000000 | |
232 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 232 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
233 | .mid_rid = 0x22, | 233 | .mid_rid = 0x22, |
234 | }, | 234 | }, |
@@ -242,7 +242,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { | |||
242 | { | 242 | { |
243 | .slave_id = SHDMA_SLAVE_RIIC1_RX, | 243 | .slave_id = SHDMA_SLAVE_RIIC1_RX, |
244 | .addr = 0x1e510013, | 244 | .addr = 0x1e510013, |
245 | .chcr = SM_INC | 0x800 | 0x40000000 | | 245 | .chcr = DM_INC | 0x800 | 0x40000000 | |
246 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 246 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
247 | .mid_rid = 0x2a, | 247 | .mid_rid = 0x2a, |
248 | }, | 248 | }, |
@@ -256,7 +256,7 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { | |||
256 | { | 256 | { |
257 | .slave_id = SHDMA_SLAVE_RIIC2_RX, | 257 | .slave_id = SHDMA_SLAVE_RIIC2_RX, |
258 | .addr = 0x1e520013, | 258 | .addr = 0x1e520013, |
259 | .chcr = SM_INC | 0x800 | 0x40000000 | | 259 | .chcr = DM_INC | 0x800 | 0x40000000 | |
260 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 260 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
261 | .mid_rid = 0xa2, | 261 | .mid_rid = 0xa2, |
262 | }, | 262 | }, |
@@ -265,12 +265,12 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { | |||
265 | .addr = 0x1e530012, | 265 | .addr = 0x1e530012, |
266 | .chcr = SM_INC | 0x800 | 0x40000000 | | 266 | .chcr = SM_INC | 0x800 | 0x40000000 | |
267 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 267 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
268 | .mid_rid = 0xab, | 268 | .mid_rid = 0xa9, |
269 | }, | 269 | }, |
270 | { | 270 | { |
271 | .slave_id = SHDMA_SLAVE_RIIC3_RX, | 271 | .slave_id = SHDMA_SLAVE_RIIC3_RX, |
272 | .addr = 0x1e530013, | 272 | .addr = 0x1e530013, |
273 | .chcr = SM_INC | 0x800 | 0x40000000 | | 273 | .chcr = DM_INC | 0x800 | 0x40000000 | |
274 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 274 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
275 | .mid_rid = 0xaf, | 275 | .mid_rid = 0xaf, |
276 | }, | 276 | }, |
@@ -279,14 +279,14 @@ static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { | |||
279 | .addr = 0x1e540012, | 279 | .addr = 0x1e540012, |
280 | .chcr = SM_INC | 0x800 | 0x40000000 | | 280 | .chcr = SM_INC | 0x800 | 0x40000000 | |
281 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 281 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
282 | .mid_rid = 0xc1, | 282 | .mid_rid = 0xc5, |
283 | }, | 283 | }, |
284 | { | 284 | { |
285 | .slave_id = SHDMA_SLAVE_RIIC4_RX, | 285 | .slave_id = SHDMA_SLAVE_RIIC4_RX, |
286 | .addr = 0x1e540013, | 286 | .addr = 0x1e540013, |
287 | .chcr = SM_INC | 0x800 | 0x40000000 | | 287 | .chcr = DM_INC | 0x800 | 0x40000000 | |
288 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 288 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
289 | .mid_rid = 0xc2, | 289 | .mid_rid = 0xc6, |
290 | }, | 290 | }, |
291 | }; | 291 | }; |
292 | 292 | ||
@@ -301,7 +301,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { | |||
301 | { | 301 | { |
302 | .slave_id = SHDMA_SLAVE_RIIC5_RX, | 302 | .slave_id = SHDMA_SLAVE_RIIC5_RX, |
303 | .addr = 0x1e550013, | 303 | .addr = 0x1e550013, |
304 | .chcr = SM_INC | 0x800 | 0x40000000 | | 304 | .chcr = DM_INC | 0x800 | 0x40000000 | |
305 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 305 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
306 | .mid_rid = 0x22, | 306 | .mid_rid = 0x22, |
307 | }, | 307 | }, |
@@ -315,7 +315,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { | |||
315 | { | 315 | { |
316 | .slave_id = SHDMA_SLAVE_RIIC6_RX, | 316 | .slave_id = SHDMA_SLAVE_RIIC6_RX, |
317 | .addr = 0x1e560013, | 317 | .addr = 0x1e560013, |
318 | .chcr = SM_INC | 0x800 | 0x40000000 | | 318 | .chcr = DM_INC | 0x800 | 0x40000000 | |
319 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 319 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
320 | .mid_rid = 0x2a, | 320 | .mid_rid = 0x2a, |
321 | }, | 321 | }, |
@@ -329,7 +329,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { | |||
329 | { | 329 | { |
330 | .slave_id = SHDMA_SLAVE_RIIC7_RX, | 330 | .slave_id = SHDMA_SLAVE_RIIC7_RX, |
331 | .addr = 0x1e570013, | 331 | .addr = 0x1e570013, |
332 | .chcr = SM_INC | 0x800 | 0x40000000 | | 332 | .chcr = DM_INC | 0x800 | 0x40000000 | |
333 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 333 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
334 | .mid_rid = 0x42, | 334 | .mid_rid = 0x42, |
335 | }, | 335 | }, |
@@ -343,7 +343,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { | |||
343 | { | 343 | { |
344 | .slave_id = SHDMA_SLAVE_RIIC8_RX, | 344 | .slave_id = SHDMA_SLAVE_RIIC8_RX, |
345 | .addr = 0x1e580013, | 345 | .addr = 0x1e580013, |
346 | .chcr = SM_INC | 0x800 | 0x40000000 | | 346 | .chcr = DM_INC | 0x800 | 0x40000000 | |
347 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 347 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
348 | .mid_rid = 0x46, | 348 | .mid_rid = 0x46, |
349 | }, | 349 | }, |
@@ -357,7 +357,7 @@ static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { | |||
357 | { | 357 | { |
358 | .slave_id = SHDMA_SLAVE_RIIC9_RX, | 358 | .slave_id = SHDMA_SLAVE_RIIC9_RX, |
359 | .addr = 0x1e590013, | 359 | .addr = 0x1e590013, |
360 | .chcr = SM_INC | 0x800 | 0x40000000 | | 360 | .chcr = DM_INC | 0x800 | 0x40000000 | |
361 | TS_INDEX2VAL(XMIT_SZ_8BIT), | 361 | TS_INDEX2VAL(XMIT_SZ_8BIT), |
362 | .mid_rid = 0x52, | 362 | .mid_rid = 0x52, |
363 | }, | 363 | }, |