aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh
diff options
context:
space:
mode:
authorPaul Mundt <lethal@linux-sh.org>2007-12-10 01:50:28 -0500
committerPaul Mundt <lethal@linux-sh.org>2008-01-27 23:18:59 -0500
commitcd01204b82933754a7276838656420477f64d4b8 (patch)
treef9e3b11574bec04cda78c549cdc5c37c3c75c4a5 /arch/sh
parentc8c0a1aba9fa8f816dc8fb477ff816a5b700f0ea (diff)
sh: Encode L1/L2 cache shape in auxvt.
This adds in the L1I/L1D/L2 cache shape support to their respective entries in the ELF auxvt, based on the Alpha implementation. We use this on the userspace libc side for calculating a tightly packed SHMLBA amongst other things. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/kernel/cpu/init.c29
-rw-r--r--arch/sh/kernel/setup.c3
2 files changed, 31 insertions, 1 deletions
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 0f0c76a842e4..80a31329ead9 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -13,6 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/mm.h> 15#include <linux/mm.h>
16#include <linux/log2.h>
16#include <asm/mmu_context.h> 17#include <asm/mmu_context.h>
17#include <asm/processor.h> 18#include <asm/processor.h>
18#include <asm/uaccess.h> 19#include <asm/uaccess.h>
@@ -20,6 +21,7 @@
20#include <asm/system.h> 21#include <asm/system.h>
21#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
22#include <asm/cache.h> 23#include <asm/cache.h>
24#include <asm/elf.h>
23#include <asm/io.h> 25#include <asm/io.h>
24#include <asm/smp.h> 26#include <asm/smp.h>
25#ifdef CONFIG_SUPERH32 27#ifdef CONFIG_SUPERH32
@@ -151,6 +153,27 @@ static void __uses_jump_to_uncached cache_init(void)
151#define cache_init() do { } while (0) 153#define cache_init() do { } while (0)
152#endif 154#endif
153 155
156#define CSHAPE(totalsize, linesize, assoc) \
157 ((totalsize & ~0xff) | (linesize << 4) | assoc)
158
159#define CACHE_DESC_SHAPE(desc) \
160 CSHAPE((desc).way_size * (desc).ways, ilog2((desc).linesz), (desc).ways)
161
162static void detect_cache_shape(void)
163{
164 l1d_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.dcache);
165
166 if (current_cpu_data.dcache.flags & SH_CACHE_COMBINED)
167 l1i_cache_shape = l1d_cache_shape;
168 else
169 l1i_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.icache);
170
171 if (current_cpu_data.flags & CPU_HAS_L2_CACHE)
172 l2_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.scache);
173 else
174 l2_cache_shape = -1; /* No S-cache */
175}
176
154#ifdef CONFIG_SH_DSP 177#ifdef CONFIG_SH_DSP
155static void __init release_dsp(void) 178static void __init release_dsp(void)
156{ 179{
@@ -237,11 +260,15 @@ asmlinkage void __cpuinit sh_cpu_init(void)
237 /* Init the cache */ 260 /* Init the cache */
238 cache_init(); 261 cache_init();
239 262
240 if (raw_smp_processor_id() == 0) 263 if (raw_smp_processor_id() == 0) {
241 shm_align_mask = max_t(unsigned long, 264 shm_align_mask = max_t(unsigned long,
242 current_cpu_data.dcache.way_size - 1, 265 current_cpu_data.dcache.way_size - 1,
243 PAGE_SIZE - 1); 266 PAGE_SIZE - 1);
244 267
268 /* Boot CPU sets the cache shape */
269 detect_cache_shape();
270 }
271
245 /* Disable the FPU */ 272 /* Disable the FPU */
246 if (fpu_disabled) { 273 if (fpu_disabled) {
247 printk("FPU Disabled\n"); 274 printk("FPU Disabled\n");
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index f48ce8e5d0a8..9c105c827e86 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -26,6 +26,7 @@
26#include <asm/uaccess.h> 26#include <asm/uaccess.h>
27#include <asm/io.h> 27#include <asm/io.h>
28#include <asm/page.h> 28#include <asm/page.h>
29#include <asm/elf.h>
29#include <asm/sections.h> 30#include <asm/sections.h>
30#include <asm/irq.h> 31#include <asm/irq.h>
31#include <asm/setup.h> 32#include <asm/setup.h>
@@ -78,6 +79,8 @@ EXPORT_SYMBOL(memory_start);
78unsigned long memory_end = 0; 79unsigned long memory_end = 0;
79EXPORT_SYMBOL(memory_end); 80EXPORT_SYMBOL(memory_end);
80 81
82int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
83
81static int __init early_parse_mem(char *p) 84static int __init early_parse_mem(char *p)
82{ 85{
83 unsigned long size; 86 unsigned long size;