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authorMagnus Damm <damm@opensource.se>2010-02-19 04:33:47 -0500
committerPaul Mundt <lethal@linux-sh.org>2010-02-22 05:11:23 -0500
commit6f26d19fce5907cdd0fd953ac1a1d0b1e6e5982c (patch)
tree0d4bc4a7bcdb0b5911807532478533f7fa2ebfbf /arch/sh
parent7be85c6eb4462cd973e680d9dcf897a7b5b26165 (diff)
sh: always enable sh7724 vpu_clk and set to 166MHz on Ecovec
Update the sh7724 processor code to always enable vpu_clk. On the Ecovec board, set the vpu_clk to 166 Mhz. The 166MHz setting results in a divide-by-6 setup for vpu_clk and improves the VPU performance compared to the power-on-reset/bootloader configuration. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c5
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 8e3b05f93a65..a17dbb3ac73f 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -1121,6 +1121,11 @@ static int __init arch_setup(void)
1121 gpio_request(GPIO_FN_INTC_IRQ1, NULL); 1121 gpio_request(GPIO_FN_INTC_IRQ1, NULL);
1122 gpio_direction_input(GPIO_FN_INTC_IRQ1); 1122 gpio_direction_input(GPIO_FN_INTC_IRQ1);
1123 1123
1124 /* set VPU clock to 166 MHz */
1125 clk = clk_get(NULL, "vpu_clk");
1126 clk_set_rate(clk, clk_round_rate(clk, 166000000));
1127 clk_put(clk);
1128
1124 /* enable I2C device */ 1129 /* enable I2C device */
1125 i2c_register_board_info(0, i2c0_devices, 1130 i2c_register_board_info(0, i2c0_devices,
1126 ARRAY_SIZE(i2c0_devices)); 1131 ARRAY_SIZE(i2c0_devices));
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index a8a993fc894a..6707061fbf54 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -159,7 +159,7 @@ struct clk div4_clks[DIV4_NR] = {
159 [DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT), 159 [DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT),
160 [DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT), 160 [DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT),
161 [DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0), 161 [DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0),
162 [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, 0), 162 [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
163}; 163};
164 164
165struct clk div6_clks[] = { 165struct clk div6_clks[] = {