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authorLinus Torvalds <torvalds@linux-foundation.org>2011-01-13 13:39:38 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2011-01-13 13:39:38 -0500
commit86f6f9b64a730844f1438cbedfacd6fb0170a7f7 (patch)
treecd80f8610b444ae3bd2ebfc136c2c3299a52bd9b /arch/sh
parentd33a6291c1c577ff2272edab7416a0f7308e1cef (diff)
parent8b6f08eaef16dfcfebc32fa9a017bf70336ad9ec (diff)
Merge branch 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* 'sh-latest' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (31 commits) sh: Add support for AP-SH4AD-0A board. sh: Add support for AP-SH4A-3A board. sh: Add a new mach type for alpha project boards. serial: sh-sci: build fixes. sh: sh7372 SH4AL-DSP probe support sh: sh7366 Enable SDIO IRQs sh: sh7343 Enable SDIO IRQs sh: mach-ecovec24: enable runtime PM for SDHI sh: sh7723 / ap325rxa enable SDIO IRQs sh: sh7722 Enable SDIO IRQs sh: sh7724 Enable SDIO IRQs sh: Fix up legacy PTEA space attribute mapping. sh: Stub out legacy PCC pgprot encoding for X2 TLBs. sh: constify prefetch pointers. sh: Add a machvec callback for early memblock reservations. sh: update sh7757lcr_defconfig sh: add PVR probing for SH7757 3rd cut sh: Use device_initcall() instead of __initcall() sh: intc - convert board specific landisk code sh: Move init_landisk_IRQ to header file ...
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/boards/Kconfig18
-rw-r--r--arch/sh/boards/Makefile2
-rw-r--r--arch/sh/boards/board-apsh4a3a.c175
-rw-r--r--arch/sh/boards/board-apsh4ad0a.c125
-rw-r--r--arch/sh/boards/board-edosk7705.c2
-rw-r--r--arch/sh/boards/board-edosk7760.c2
-rw-r--r--arch/sh/boards/board-sh7785lcr.c2
-rw-r--r--arch/sh/boards/mach-ap325rxa/setup.c16
-rw-r--r--arch/sh/boards/mach-cayman/setup.c2
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c2
-rw-r--r--arch/sh/boards/mach-kfr2r09/setup.c2
-rw-r--r--arch/sh/boards/mach-landisk/irq.c59
-rw-r--r--arch/sh/boards/mach-landisk/setup.c4
-rw-r--r--arch/sh/boards/mach-migor/setup.c2
-rw-r--r--arch/sh/boards/mach-r2d/setup.c2
-rw-r--r--arch/sh/boards/mach-sdk7786/setup.c4
-rw-r--r--arch/sh/boards/mach-se/7206/setup.c2
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c3
-rw-r--r--arch/sh/boards/mach-se/7751/setup.c2
-rw-r--r--arch/sh/boards/mach-sh03/setup.c2
-rw-r--r--arch/sh/boot/romimage/mmcif-sh7724.c7
-rw-r--r--arch/sh/configs/apsh4a3a_defconfig102
-rw-r--r--arch/sh/configs/apsh4ad0a_defconfig133
-rw-r--r--arch/sh/configs/sh7757lcr_defconfig11
-rw-r--r--arch/sh/drivers/pci/fixups-landisk.c28
-rw-r--r--arch/sh/include/asm/io.h61
-rw-r--r--arch/sh/include/asm/machvec.h1
-rw-r--r--arch/sh/include/asm/pgtable_32.h15
-rw-r--r--arch/sh/include/asm/processor.h2
-rw-r--r--arch/sh/include/asm/processor_32.h6
-rw-r--r--arch/sh/include/mach-landisk/mach/iodata_landisk.h6
-rw-r--r--arch/sh/kernel/cpu/proc.c2
-rw-r--r--arch/sh/kernel/cpu/sh2/setup-sh7619.c6
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-mxg.c2
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7201.c16
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7203.c8
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c5
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c6
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7710.c6
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c6
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c6
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh4-202.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c36
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7343.c33
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c26
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c16
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c16
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c20
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-shx3.c6
-rw-r--r--arch/sh/kernel/cpu/sh5/setup-sh5.c2
-rw-r--r--arch/sh/mm/init.c10
-rw-r--r--arch/sh/tools/mach-types3
60 files changed, 947 insertions, 158 deletions
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 2018c7ea4c93..d893411022d5 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -3,6 +3,9 @@ menu "Board support"
3config SOLUTION_ENGINE 3config SOLUTION_ENGINE
4 bool 4 bool
5 5
6config SH_ALPHA_BOARD
7 bool
8
6config SH_SOLUTION_ENGINE 9config SH_SOLUTION_ENGINE
7 bool "SolutionEngine" 10 bool "SolutionEngine"
8 select SOLUTION_ENGINE 11 select SOLUTION_ENGINE
@@ -320,6 +323,21 @@ config SH_SH2007
320 Compact Flash socket, two serial ports and PC-104 bus. 323 Compact Flash socket, two serial ports and PC-104 bus.
321 More information at <http://sh2000.sh-linux.org>. 324 More information at <http://sh2000.sh-linux.org>.
322 325
326config SH_APSH4A3A
327 bool "AP-SH4A-3A"
328 select SH_ALPHA_BOARD
329 depends on CPU_SUBTYPE_SH7785
330 help
331 Select AP-SH4A-3A if configuring for an ALPHAPROJECT AP-SH4A-3A.
332
333config SH_APSH4AD0A
334 bool "AP-SH4AD-0A"
335 select SH_ALPHA_BOARD
336 select SYS_SUPPORTS_PCI
337 depends on CPU_SUBTYPE_SH7786
338 help
339 Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A.
340
323endmenu 341endmenu
324 342
325source "arch/sh/boards/mach-r2d/Kconfig" 343source "arch/sh/boards/mach-r2d/Kconfig"
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index be7d11d04b26..975a0f64ff20 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -13,3 +13,5 @@ obj-$(CONFIG_SH_ESPT) += board-espt.o
13obj-$(CONFIG_SH_POLARIS) += board-polaris.o 13obj-$(CONFIG_SH_POLARIS) += board-polaris.o
14obj-$(CONFIG_SH_TITAN) += board-titan.o 14obj-$(CONFIG_SH_TITAN) += board-titan.o
15obj-$(CONFIG_SH_SH7757LCR) += board-sh7757lcr.o 15obj-$(CONFIG_SH_SH7757LCR) += board-sh7757lcr.o
16obj-$(CONFIG_SH_APSH4A3A) += board-apsh4a3a.o
17obj-$(CONFIG_SH_APSH4AD0A) += board-apsh4ad0a.o
diff --git a/arch/sh/boards/board-apsh4a3a.c b/arch/sh/boards/board-apsh4a3a.c
new file mode 100644
index 000000000000..8e2a27057bc9
--- /dev/null
+++ b/arch/sh/boards/board-apsh4a3a.c
@@ -0,0 +1,175 @@
1/*
2 * ALPHAPROJECT AP-SH4A-3A Support.
3 *
4 * Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 * Copyright (C) 2009 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/io.h>
15#include <linux/mtd/physmap.h>
16#include <linux/smsc911x.h>
17#include <linux/irq.h>
18#include <linux/clk.h>
19#include <asm/machvec.h>
20#include <asm/sizes.h>
21#include <asm/clock.h>
22
23static struct mtd_partition nor_flash_partitions[] = {
24 {
25 .name = "loader",
26 .offset = 0x00000000,
27 .size = 512 * 1024,
28 },
29 {
30 .name = "bootenv",
31 .offset = MTDPART_OFS_APPEND,
32 .size = 512 * 1024,
33 },
34 {
35 .name = "kernel",
36 .offset = MTDPART_OFS_APPEND,
37 .size = 4 * 1024 * 1024,
38 },
39 {
40 .name = "data",
41 .offset = MTDPART_OFS_APPEND,
42 .size = MTDPART_SIZ_FULL,
43 },
44};
45
46static struct physmap_flash_data nor_flash_data = {
47 .width = 4,
48 .parts = nor_flash_partitions,
49 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
50};
51
52static struct resource nor_flash_resources[] = {
53 [0] = {
54 .start = 0x00000000,
55 .end = 0x01000000 - 1,
56 .flags = IORESOURCE_MEM,
57 }
58};
59
60static struct platform_device nor_flash_device = {
61 .name = "physmap-flash",
62 .dev = {
63 .platform_data = &nor_flash_data,
64 },
65 .num_resources = ARRAY_SIZE(nor_flash_resources),
66 .resource = nor_flash_resources,
67};
68
69static struct resource smsc911x_resources[] = {
70 [0] = {
71 .name = "smsc911x-memory",
72 .start = 0xA4000000,
73 .end = 0xA4000000 + SZ_256 - 1,
74 .flags = IORESOURCE_MEM,
75 },
76 [1] = {
77 .name = "smsc911x-irq",
78 .start = evt2irq(0x200),
79 .end = evt2irq(0x200),
80 .flags = IORESOURCE_IRQ,
81 },
82};
83
84static struct smsc911x_platform_config smsc911x_config = {
85 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
86 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
87 .flags = SMSC911X_USE_16BIT,
88 .phy_interface = PHY_INTERFACE_MODE_MII,
89};
90
91static struct platform_device smsc911x_device = {
92 .name = "smsc911x",
93 .id = -1,
94 .num_resources = ARRAY_SIZE(smsc911x_resources),
95 .resource = smsc911x_resources,
96 .dev = {
97 .platform_data = &smsc911x_config,
98 },
99};
100
101static struct platform_device *apsh4a3a_devices[] __initdata = {
102 &nor_flash_device,
103 &smsc911x_device,
104};
105
106static int __init apsh4a3a_devices_setup(void)
107{
108 return platform_add_devices(apsh4a3a_devices,
109 ARRAY_SIZE(apsh4a3a_devices));
110}
111device_initcall(apsh4a3a_devices_setup);
112
113static int apsh4a3a_clk_init(void)
114{
115 struct clk *clk;
116 int ret;
117
118 clk = clk_get(NULL, "extal");
119 if (!clk || IS_ERR(clk))
120 return PTR_ERR(clk);
121 ret = clk_set_rate(clk, 33333000);
122 clk_put(clk);
123
124 return ret;
125}
126
127/* Initialize the board */
128static void __init apsh4a3a_setup(char **cmdline_p)
129{
130 printk(KERN_INFO "Alpha Project AP-SH4A-3A support:\n");
131}
132
133static void __init apsh4a3a_init_irq(void)
134{
135 plat_irq_setup_pins(IRQ_MODE_IRQ7654);
136}
137
138/* Return the board specific boot mode pin configuration */
139static int apsh4a3a_mode_pins(void)
140{
141 int value = 0;
142
143 /* These are the factory default settings of SW1 and SW2.
144 * If you change these dip switches then you will need to
145 * adjust the values below as well.
146 */
147 value &= ~MODE_PIN0; /* Clock Mode 16 */
148 value &= ~MODE_PIN1;
149 value &= ~MODE_PIN2;
150 value &= ~MODE_PIN3;
151 value |= MODE_PIN4;
152 value &= ~MODE_PIN5; /* 16-bit Area0 bus width */
153 value |= MODE_PIN6; /* Area 0 SRAM interface */
154 value |= MODE_PIN7;
155 value |= MODE_PIN8; /* Little Endian */
156 value |= MODE_PIN9; /* Master Mode */
157 value |= MODE_PIN10; /* Crystal resonator */
158 value |= MODE_PIN11; /* Display Unit */
159 value |= MODE_PIN12;
160 value &= ~MODE_PIN13; /* 29-bit address mode */
161 value |= MODE_PIN14; /* No PLL step-up */
162
163 return value;
164}
165
166/*
167 * The Machine Vector
168 */
169static struct sh_machine_vector mv_apsh4a3a __initmv = {
170 .mv_name = "AP-SH4A-3A",
171 .mv_setup = apsh4a3a_setup,
172 .mv_clk_init = apsh4a3a_clk_init,
173 .mv_init_irq = apsh4a3a_init_irq,
174 .mv_mode_pins = apsh4a3a_mode_pins,
175};
diff --git a/arch/sh/boards/board-apsh4ad0a.c b/arch/sh/boards/board-apsh4ad0a.c
new file mode 100644
index 000000000000..e2bd218a054e
--- /dev/null
+++ b/arch/sh/boards/board-apsh4ad0a.c
@@ -0,0 +1,125 @@
1/*
2 * ALPHAPROJECT AP-SH4AD-0A Support.
3 *
4 * Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
5 * Copyright (C) 2010 Matt Fleming
6 * Copyright (C) 2010 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/io.h>
15#include <linux/smsc911x.h>
16#include <linux/irq.h>
17#include <linux/clk.h>
18#include <asm/machvec.h>
19#include <asm/sizes.h>
20
21static struct resource smsc911x_resources[] = {
22 [0] = {
23 .name = "smsc911x-memory",
24 .start = 0xA4000000,
25 .end = 0xA4000000 + SZ_256 - 1,
26 .flags = IORESOURCE_MEM,
27 },
28 [1] = {
29 .name = "smsc911x-irq",
30 .start = evt2irq(0x200),
31 .end = evt2irq(0x200),
32 .flags = IORESOURCE_IRQ,
33 },
34};
35
36static struct smsc911x_platform_config smsc911x_config = {
37 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
38 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
39 .flags = SMSC911X_USE_16BIT,
40 .phy_interface = PHY_INTERFACE_MODE_MII,
41};
42
43static struct platform_device smsc911x_device = {
44 .name = "smsc911x",
45 .id = -1,
46 .num_resources = ARRAY_SIZE(smsc911x_resources),
47 .resource = smsc911x_resources,
48 .dev = {
49 .platform_data = &smsc911x_config,
50 },
51};
52
53static struct platform_device *apsh4ad0a_devices[] __initdata = {
54 &smsc911x_device,
55};
56
57static int __init apsh4ad0a_devices_setup(void)
58{
59 return platform_add_devices(apsh4ad0a_devices,
60 ARRAY_SIZE(apsh4ad0a_devices));
61}
62device_initcall(apsh4ad0a_devices_setup);
63
64static int apsh4ad0a_mode_pins(void)
65{
66 int value = 0;
67
68 /* These are the factory default settings of SW1 and SW2.
69 * If you change these dip switches then you will need to
70 * adjust the values below as well.
71 */
72 value |= MODE_PIN0; /* Clock Mode 3 */
73 value |= MODE_PIN1;
74 value &= ~MODE_PIN2;
75 value &= ~MODE_PIN3;
76 value &= ~MODE_PIN4; /* 16-bit Area0 bus width */
77 value |= MODE_PIN5;
78 value |= MODE_PIN6;
79 value |= MODE_PIN7; /* Normal mode */
80 value |= MODE_PIN8; /* Little Endian */
81 value |= MODE_PIN9; /* Crystal resonator */
82 value &= ~MODE_PIN10; /* 29-bit address mode */
83 value &= ~MODE_PIN11; /* PCI-E Root port */
84 value &= ~MODE_PIN12; /* 4 lane + 1 lane */
85 value |= MODE_PIN13; /* AUD Enable */
86 value &= ~MODE_PIN14; /* Normal Operation */
87
88 return value;
89}
90
91static int apsh4ad0a_clk_init(void)
92{
93 struct clk *clk;
94 int ret;
95
96 clk = clk_get(NULL, "extal");
97 if (!clk || IS_ERR(clk))
98 return PTR_ERR(clk);
99 ret = clk_set_rate(clk, 33333000);
100 clk_put(clk);
101
102 return ret;
103}
104
105/* Initialize the board */
106static void __init apsh4ad0a_setup(char **cmdline_p)
107{
108 pr_info("Alpha Project AP-SH4AD-0A support:\n");
109}
110
111static void __init apsh4ad0a_init_irq(void)
112{
113 plat_irq_setup_pins(IRQ_MODE_IRQ3210);
114}
115
116/*
117 * The Machine Vector
118 */
119static struct sh_machine_vector mv_apsh4ad0a __initmv = {
120 .mv_name = "AP-SH4AD-0A",
121 .mv_setup = apsh4ad0a_setup,
122 .mv_mode_pins = apsh4ad0a_mode_pins,
123 .mv_clk_init = apsh4ad0a_clk_init,
124 .mv_init_irq = apsh4ad0a_init_irq,
125};
diff --git a/arch/sh/boards/board-edosk7705.c b/arch/sh/boards/board-edosk7705.c
index 4cb3bb74c36f..541d8a281035 100644
--- a/arch/sh/boards/board-edosk7705.c
+++ b/arch/sh/boards/board-edosk7705.c
@@ -66,7 +66,7 @@ static int __init init_edosk7705_devices(void)
66 return platform_add_devices(edosk7705_devices, 66 return platform_add_devices(edosk7705_devices,
67 ARRAY_SIZE(edosk7705_devices)); 67 ARRAY_SIZE(edosk7705_devices));
68} 68}
69__initcall(init_edosk7705_devices); 69device_initcall(init_edosk7705_devices);
70 70
71/* 71/*
72 * The Machine Vector 72 * The Machine Vector
diff --git a/arch/sh/boards/board-edosk7760.c b/arch/sh/boards/board-edosk7760.c
index 35dc0994875d..f47ac82da876 100644
--- a/arch/sh/boards/board-edosk7760.c
+++ b/arch/sh/boards/board-edosk7760.c
@@ -182,7 +182,7 @@ static int __init init_edosk7760_devices(void)
182 return platform_add_devices(edosk7760_devices, 182 return platform_add_devices(edosk7760_devices,
183 ARRAY_SIZE(edosk7760_devices)); 183 ARRAY_SIZE(edosk7760_devices));
184} 184}
185__initcall(init_edosk7760_devices); 185device_initcall(init_edosk7760_devices);
186 186
187/* 187/*
188 * The Machine Vector 188 * The Machine Vector
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index fe7e686c94ac..ee65ff05c558 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -284,7 +284,7 @@ static int __init sh7785lcr_devices_setup(void)
284 return platform_add_devices(sh7785lcr_devices, 284 return platform_add_devices(sh7785lcr_devices,
285 ARRAY_SIZE(sh7785lcr_devices)); 285 ARRAY_SIZE(sh7785lcr_devices));
286} 286}
287__initcall(sh7785lcr_devices_setup); 287device_initcall(sh7785lcr_devices_setup);
288 288
289/* Initialize IRQ setting */ 289/* Initialize IRQ setting */
290void __init init_sh7785lcr_IRQ(void) 290void __init init_sh7785lcr_IRQ(void)
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
index 07ea908c510d..3e5fc3bbf3ed 100644
--- a/arch/sh/boards/mach-ap325rxa/setup.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -14,6 +14,8 @@
14#include <linux/device.h> 14#include <linux/device.h>
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/mfd/sh_mobile_sdhi.h>
18#include <linux/mmc/host.h>
17#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
18#include <linux/mtd/sh_flctl.h> 20#include <linux/mtd/sh_flctl.h>
19#include <linux/delay.h> 21#include <linux/delay.h>
@@ -430,11 +432,18 @@ static struct resource sdhi0_cn3_resources[] = {
430 }, 432 },
431}; 433};
432 434
435static struct sh_mobile_sdhi_info sdhi0_cn3_data = {
436 .tmio_caps = MMC_CAP_SDIO_IRQ,
437};
438
433static struct platform_device sdhi0_cn3_device = { 439static struct platform_device sdhi0_cn3_device = {
434 .name = "sh_mobile_sdhi", 440 .name = "sh_mobile_sdhi",
435 .id = 0, /* "sdhi0" clock */ 441 .id = 0, /* "sdhi0" clock */
436 .num_resources = ARRAY_SIZE(sdhi0_cn3_resources), 442 .num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
437 .resource = sdhi0_cn3_resources, 443 .resource = sdhi0_cn3_resources,
444 .dev = {
445 .platform_data = &sdhi0_cn3_data,
446 },
438 .archdata = { 447 .archdata = {
439 .hwblk_id = HWBLK_SDHI0, 448 .hwblk_id = HWBLK_SDHI0,
440 }, 449 },
@@ -453,11 +462,18 @@ static struct resource sdhi1_cn7_resources[] = {
453 }, 462 },
454}; 463};
455 464
465static struct sh_mobile_sdhi_info sdhi1_cn7_data = {
466 .tmio_caps = MMC_CAP_SDIO_IRQ,
467};
468
456static struct platform_device sdhi1_cn7_device = { 469static struct platform_device sdhi1_cn7_device = {
457 .name = "sh_mobile_sdhi", 470 .name = "sh_mobile_sdhi",
458 .id = 1, /* "sdhi1" clock */ 471 .id = 1, /* "sdhi1" clock */
459 .num_resources = ARRAY_SIZE(sdhi1_cn7_resources), 472 .num_resources = ARRAY_SIZE(sdhi1_cn7_resources),
460 .resource = sdhi1_cn7_resources, 473 .resource = sdhi1_cn7_resources,
474 .dev = {
475 .platform_data = &sdhi1_cn7_data,
476 },
461 .archdata = { 477 .archdata = {
462 .hwblk_id = HWBLK_SDHI1, 478 .hwblk_id = HWBLK_SDHI1,
463 }, 479 },
diff --git a/arch/sh/boards/mach-cayman/setup.c b/arch/sh/boards/mach-cayman/setup.c
index 7e8216ac31bd..e89e8e122a26 100644
--- a/arch/sh/boards/mach-cayman/setup.c
+++ b/arch/sh/boards/mach-cayman/setup.c
@@ -165,7 +165,7 @@ static int __init smsc_superio_setup(void)
165 165
166 return 0; 166 return 0;
167} 167}
168__initcall(smsc_superio_setup); 168device_initcall(smsc_superio_setup);
169 169
170static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len) 170static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len)
171{ 171{
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index f48c492a68d3..33b662999fc6 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -473,6 +473,7 @@ static struct sh_mobile_sdhi_info sdhi0_info = {
473 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 473 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
474 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 474 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
475 .set_pwr = sdhi0_set_pwr, 475 .set_pwr = sdhi0_set_pwr,
476 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
476}; 477};
477 478
478static struct resource sdhi0_resources[] = { 479static struct resource sdhi0_resources[] = {
@@ -511,6 +512,7 @@ static void sdhi1_set_pwr(struct platform_device *pdev, int state)
511static struct sh_mobile_sdhi_info sdhi1_info = { 512static struct sh_mobile_sdhi_info sdhi1_info = {
512 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, 513 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
513 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 514 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
515 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD,
514 .set_pwr = sdhi1_set_pwr, 516 .set_pwr = sdhi1_set_pwr,
515}; 517};
516 518
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index 9b60eaabf8f3..7504daaa85da 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -11,6 +11,7 @@
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13#include <linux/mfd/sh_mobile_sdhi.h> 13#include <linux/mfd/sh_mobile_sdhi.h>
14#include <linux/mmc/host.h>
14#include <linux/mfd/tmio.h> 15#include <linux/mfd/tmio.h>
15#include <linux/mtd/physmap.h> 16#include <linux/mtd/physmap.h>
16#include <linux/mtd/onenand.h> 17#include <linux/mtd/onenand.h>
@@ -366,6 +367,7 @@ static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
366 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 367 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
367 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 368 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
368 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, 369 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
370 .tmio_caps = MMC_CAP_SDIO_IRQ,
369}; 371};
370 372
371static struct platform_device kfr2r09_sh_sdhi0_device = { 373static struct platform_device kfr2r09_sh_sdhi0_device = {
diff --git a/arch/sh/boards/mach-landisk/irq.c b/arch/sh/boards/mach-landisk/irq.c
index e79412a40490..c00ace38db3f 100644
--- a/arch/sh/boards/mach-landisk/irq.c
+++ b/arch/sh/boards/mach-landisk/irq.c
@@ -1,9 +1,10 @@
1/* 1/*
2 * arch/sh/boards/landisk/irq.c 2 * arch/sh/boards/mach-landisk/irq.c
3 * 3 *
4 * I-O DATA Device, Inc. LANDISK Support 4 * I-O DATA Device, Inc. LANDISK Support
5 * 5 *
6 * Copyright (C) 2005-2007 kogiidena 6 * Copyright (C) 2005-2007 kogiidena
7 * Copyright (C) 2011 Nobuhiro Iwamatsu
7 * 8 *
8 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 9 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
9 * Based largely on io_se.c. 10 * Based largely on io_se.c.
@@ -12,44 +13,54 @@
12 * License. See the file "COPYING" in the main directory of this archive 13 * License. See the file "COPYING" in the main directory of this archive
13 * for more details. 14 * for more details.
14 */ 15 */
16
15#include <linux/init.h> 17#include <linux/init.h>
16#include <linux/irq.h> 18#include <linux/irq.h>
17#include <linux/interrupt.h> 19#include <linux/interrupt.h>
18#include <linux/io.h> 20#include <linux/io.h>
19#include <mach-landisk/mach/iodata_landisk.h> 21#include <mach-landisk/mach/iodata_landisk.h>
20 22
21static void disable_landisk_irq(struct irq_data *data) 23enum {
22{ 24 UNUSED = 0,
23 unsigned char mask = 0xff ^ (0x01 << (data->irq - 5));
24 25
25 __raw_writeb(__raw_readb(PA_IMASK) & mask, PA_IMASK); 26 PCI_INTA, /* PCI int A */
26} 27 PCI_INTB, /* PCI int B */
27 28 PCI_INTC, /* PCI int C */
28static void enable_landisk_irq(struct irq_data *data) 29 PCI_INTD, /* PCI int D */
29{ 30 ATA, /* ATA */
30 unsigned char value = (0x01 << (data->irq - 5)); 31 FATA, /* CF */
32 POWER, /* Power swtich */
33 BUTTON, /* Button swtich */
34};
31 35
32 __raw_writeb(__raw_readb(PA_IMASK) | value, PA_IMASK); 36/* Vectors for LANDISK */
33} 37static struct intc_vect vectors_landisk[] __initdata = {
38 INTC_IRQ(PCI_INTA, IRQ_PCIINTA),
39 INTC_IRQ(PCI_INTB, IRQ_PCIINTB),
40 INTC_IRQ(PCI_INTC, IRQ_PCIINTC),
41 INTC_IRQ(PCI_INTD, IRQ_PCIINTD),
42 INTC_IRQ(ATA, IRQ_ATA),
43 INTC_IRQ(FATA, IRQ_FATA),
44 INTC_IRQ(POWER, IRQ_POWER),
45 INTC_IRQ(BUTTON, IRQ_BUTTON),
46};
34 47
35static struct irq_chip landisk_irq_chip __read_mostly = { 48/* IRLMSK mask register layout for LANDISK */
36 .name = "LANDISK", 49static struct intc_mask_reg mask_registers_landisk[] __initdata = {
37 .irq_mask = disable_landisk_irq, 50 { PA_IMASK, 0, 8, /* IRLMSK */
38 .irq_unmask = enable_landisk_irq, 51 { BUTTON, POWER, FATA, ATA,
52 PCI_INTD, PCI_INTC, PCI_INTB, PCI_INTA,
53 }
54 },
39}; 55};
40 56
57static DECLARE_INTC_DESC(intc_desc_landisk, "landisk", vectors_landisk, NULL,
58 mask_registers_landisk, NULL, NULL);
41/* 59/*
42 * Initialize IRQ setting 60 * Initialize IRQ setting
43 */ 61 */
44void __init init_landisk_IRQ(void) 62void __init init_landisk_IRQ(void)
45{ 63{
46 int i; 64 register_intc_controller(&intc_desc_landisk);
47
48 for (i = 5; i < 14; i++) {
49 disable_irq_nosync(i);
50 set_irq_chip_and_handler_name(i, &landisk_irq_chip,
51 handle_level_irq, "level");
52 enable_landisk_irq(irq_get_irq_data(i));
53 }
54 __raw_writeb(0x00, PA_PWRINT_CLR); 65 __raw_writeb(0x00, PA_PWRINT_CLR);
55} 66}
diff --git a/arch/sh/boards/mach-landisk/setup.c b/arch/sh/boards/mach-landisk/setup.c
index 50337acc18c5..94186cf079b6 100644
--- a/arch/sh/boards/mach-landisk/setup.c
+++ b/arch/sh/boards/mach-landisk/setup.c
@@ -21,8 +21,6 @@
21#include <mach-landisk/mach/iodata_landisk.h> 21#include <mach-landisk/mach/iodata_landisk.h>
22#include <asm/io.h> 22#include <asm/io.h>
23 23
24void init_landisk_IRQ(void);
25
26static void landisk_power_off(void) 24static void landisk_power_off(void)
27{ 25{
28 __raw_writeb(0x01, PA_SHUTDOWN); 26 __raw_writeb(0x01, PA_SHUTDOWN);
@@ -83,7 +81,7 @@ static int __init landisk_devices_setup(void)
83 ARRAY_SIZE(landisk_devices)); 81 ARRAY_SIZE(landisk_devices));
84} 82}
85 83
86__initcall(landisk_devices_setup); 84device_initcall(landisk_devices_setup);
87 85
88static void __init landisk_setup(char **cmdline_p) 86static void __init landisk_setup(char **cmdline_p)
89{ 87{
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index c8acfec98695..03a7ffe729d5 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -13,6 +13,7 @@
13#include <linux/input.h> 13#include <linux/input.h>
14#include <linux/input/sh_keysc.h> 14#include <linux/input/sh_keysc.h>
15#include <linux/mfd/sh_mobile_sdhi.h> 15#include <linux/mfd/sh_mobile_sdhi.h>
16#include <linux/mmc/host.h>
16#include <linux/mtd/physmap.h> 17#include <linux/mtd/physmap.h>
17#include <linux/mtd/nand.h> 18#include <linux/mtd/nand.h>
18#include <linux/i2c.h> 19#include <linux/i2c.h>
@@ -410,6 +411,7 @@ static struct resource sdhi_cn9_resources[] = {
410static struct sh_mobile_sdhi_info sh7724_sdhi_data = { 411static struct sh_mobile_sdhi_info sh7724_sdhi_data = {
411 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 412 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
412 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 413 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
414 .tmio_caps = MMC_CAP_SDIO_IRQ,
413}; 415};
414 416
415static struct platform_device sdhi_cn9_device = { 417static struct platform_device sdhi_cn9_device = {
diff --git a/arch/sh/boards/mach-r2d/setup.c b/arch/sh/boards/mach-r2d/setup.c
index b84df6a3a93c..4b98a5251f83 100644
--- a/arch/sh/boards/mach-r2d/setup.c
+++ b/arch/sh/boards/mach-r2d/setup.c
@@ -258,7 +258,7 @@ static int __init rts7751r2d_devices_setup(void)
258 return platform_add_devices(rts7751r2d_devices, 258 return platform_add_devices(rts7751r2d_devices,
259 ARRAY_SIZE(rts7751r2d_devices)); 259 ARRAY_SIZE(rts7751r2d_devices));
260} 260}
261__initcall(rts7751r2d_devices_setup); 261device_initcall(rts7751r2d_devices_setup);
262 262
263static void rts7751r2d_power_off(void) 263static void rts7751r2d_power_off(void)
264{ 264{
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
index 75e4ddbbec3e..1521aa75ee3a 100644
--- a/arch/sh/boards/mach-sdk7786/setup.c
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -15,13 +15,13 @@
15#include <linux/i2c.h> 15#include <linux/i2c.h>
16#include <linux/irq.h> 16#include <linux/irq.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/clkdev.h>
18#include <mach/fpga.h> 19#include <mach/fpga.h>
19#include <mach/irq.h> 20#include <mach/irq.h>
20#include <asm/machvec.h> 21#include <asm/machvec.h>
21#include <asm/heartbeat.h> 22#include <asm/heartbeat.h>
22#include <asm/sizes.h> 23#include <asm/sizes.h>
23#include <asm/clock.h> 24#include <asm/clock.h>
24#include <asm/clkdev.h>
25#include <asm/reboot.h> 25#include <asm/reboot.h>
26#include <asm/smp-ops.h> 26#include <asm/smp-ops.h>
27 27
@@ -135,7 +135,7 @@ static int __init sdk7786_devices_setup(void)
135 135
136 return sdk7786_i2c_setup(); 136 return sdk7786_i2c_setup();
137} 137}
138__initcall(sdk7786_devices_setup); 138device_initcall(sdk7786_devices_setup);
139 139
140static int sdk7786_mode_pins(void) 140static int sdk7786_mode_pins(void)
141{ 141{
diff --git a/arch/sh/boards/mach-se/7206/setup.c b/arch/sh/boards/mach-se/7206/setup.c
index 33039e0dc568..8ab8330e3fd1 100644
--- a/arch/sh/boards/mach-se/7206/setup.c
+++ b/arch/sh/boards/mach-se/7206/setup.c
@@ -77,7 +77,7 @@ static int __init se7206_devices_setup(void)
77{ 77{
78 return platform_add_devices(se7206_devices, ARRAY_SIZE(se7206_devices)); 78 return platform_add_devices(se7206_devices, ARRAY_SIZE(se7206_devices));
79} 79}
80__initcall(se7206_devices_setup); 80device_initcall(se7206_devices_setup);
81 81
82static int se7206_mode_pins(void) 82static int se7206_mode_pins(void)
83{ 83{
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index b710757c33c3..527679394a25 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -15,6 +15,7 @@
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/mfd/sh_mobile_sdhi.h> 17#include <linux/mfd/sh_mobile_sdhi.h>
18#include <linux/mmc/host.h>
18#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
19#include <linux/delay.h> 20#include <linux/delay.h>
20#include <linux/smc91x.h> 21#include <linux/smc91x.h>
@@ -471,6 +472,7 @@ static struct resource sdhi0_cn7_resources[] = {
471static struct sh_mobile_sdhi_info sh7724_sdhi0_data = { 472static struct sh_mobile_sdhi_info sh7724_sdhi0_data = {
472 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 473 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
473 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 474 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
475 .tmio_caps = MMC_CAP_SDIO_IRQ,
474}; 476};
475 477
476static struct platform_device sdhi0_cn7_device = { 478static struct platform_device sdhi0_cn7_device = {
@@ -502,6 +504,7 @@ static struct resource sdhi1_cn8_resources[] = {
502static struct sh_mobile_sdhi_info sh7724_sdhi1_data = { 504static struct sh_mobile_sdhi_info sh7724_sdhi1_data = {
503 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, 505 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
504 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 506 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
507 .tmio_caps = MMC_CAP_SDIO_IRQ,
505}; 508};
506 509
507static struct platform_device sdhi1_cn8_device = { 510static struct platform_device sdhi1_cn8_device = {
diff --git a/arch/sh/boards/mach-se/7751/setup.c b/arch/sh/boards/mach-se/7751/setup.c
index 9fbc51beb181..4ed60c5e221f 100644
--- a/arch/sh/boards/mach-se/7751/setup.c
+++ b/arch/sh/boards/mach-se/7751/setup.c
@@ -48,7 +48,7 @@ static int __init se7751_devices_setup(void)
48{ 48{
49 return platform_add_devices(se7751_devices, ARRAY_SIZE(se7751_devices)); 49 return platform_add_devices(se7751_devices, ARRAY_SIZE(se7751_devices));
50} 50}
51__initcall(se7751_devices_setup); 51device_initcall(se7751_devices_setup);
52 52
53/* 53/*
54 * The Machine Vector 54 * The Machine Vector
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c
index af4a0c012a96..d4f79b2a6514 100644
--- a/arch/sh/boards/mach-sh03/setup.c
+++ b/arch/sh/boards/mach-sh03/setup.c
@@ -96,7 +96,7 @@ static int __init sh03_devices_setup(void)
96 96
97 return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices)); 97 return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices));
98} 98}
99__initcall(sh03_devices_setup); 99device_initcall(sh03_devices_setup);
100 100
101static struct sh_machine_vector mv_sh03 __initmv = { 101static struct sh_machine_vector mv_sh03 __initmv = {
102 .mv_name = "Interface (CTP/PCI-SH03)", 102 .mv_name = "Interface (CTP/PCI-SH03)",
diff --git a/arch/sh/boot/romimage/mmcif-sh7724.c b/arch/sh/boot/romimage/mmcif-sh7724.c
index 14863d7292cb..c84e7831018d 100644
--- a/arch/sh/boot/romimage/mmcif-sh7724.c
+++ b/arch/sh/boot/romimage/mmcif-sh7724.c
@@ -21,9 +21,6 @@
21#define HIZCRC 0xa405015c 21#define HIZCRC 0xa405015c
22#define DRVCRA 0xa405018a 22#define DRVCRA 0xa405018a
23 23
24enum { MMCIF_PROGRESS_ENTER, MMCIF_PROGRESS_INIT,
25 MMCIF_PROGRESS_LOAD, MMCIF_PROGRESS_DONE };
26
27/* SH7724 specific MMCIF loader 24/* SH7724 specific MMCIF loader
28 * 25 *
29 * loads the romImage from an MMC card starting from block 512 26 * loads the romImage from an MMC card starting from block 512
@@ -63,7 +60,9 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes)
63 mmcif_update_progress(MMCIF_PROGRESS_LOAD); 60 mmcif_update_progress(MMCIF_PROGRESS_LOAD);
64 61
65 /* load kernel via MMCIF interface */ 62 /* load kernel via MMCIF interface */
66 sh_mmcif_boot_slurp(MMCIF_BASE, buf, no_bytes); 63 sh_mmcif_boot_do_read(MMCIF_BASE, 512,
64 (no_bytes + SH_MMCIF_BBS - 1) / SH_MMCIF_BBS,
65 buf);
67 66
68 /* disable clock to the MMCIF hardware block */ 67 /* disable clock to the MMCIF hardware block */
69 __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2); 68 __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
diff --git a/arch/sh/configs/apsh4a3a_defconfig b/arch/sh/configs/apsh4a3a_defconfig
new file mode 100644
index 000000000000..6cb327977d13
--- /dev/null
+++ b/arch/sh/configs/apsh4a3a_defconfig
@@ -0,0 +1,102 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_BSD_PROCESS_ACCT=y
4CONFIG_IKCONFIG=y
5CONFIG_IKCONFIG_PROC=y
6CONFIG_LOG_BUF_SHIFT=14
7CONFIG_SYSFS_DEPRECATED=y
8CONFIG_SYSFS_DEPRECATED_V2=y
9CONFIG_BLK_DEV_INITRD=y
10CONFIG_SLAB=y
11CONFIG_PROFILING=y
12CONFIG_MODULES=y
13CONFIG_MODULE_UNLOAD=y
14# CONFIG_BLK_DEV_BSG is not set
15CONFIG_CPU_SUBTYPE_SH7785=y
16CONFIG_MEMORY_START=0x0C000000
17CONFIG_FLATMEM_MANUAL=y
18CONFIG_SH_STORE_QUEUES=y
19CONFIG_SH_APSH4A3A=y
20CONFIG_HIGH_RES_TIMERS=y
21CONFIG_KEXEC=y
22CONFIG_PREEMPT=y
23# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
24CONFIG_NET=y
25CONFIG_PACKET=y
26CONFIG_UNIX=y
27CONFIG_INET=y
28CONFIG_IP_ADVANCED_ROUTER=y
29CONFIG_IP_PNP=y
30CONFIG_IP_PNP_DHCP=y
31# CONFIG_INET_LRO is not set
32# CONFIG_IPV6 is not set
33# CONFIG_WIRELESS is not set
34CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
35# CONFIG_FW_LOADER is not set
36CONFIG_MTD=y
37CONFIG_MTD_CONCAT=y
38CONFIG_MTD_PARTITIONS=y
39CONFIG_MTD_CHAR=y
40CONFIG_MTD_BLOCK=y
41CONFIG_MTD_CFI=y
42CONFIG_MTD_CFI_AMDSTD=y
43CONFIG_MTD_PHYSMAP=y
44CONFIG_BLK_DEV_RAM=y
45CONFIG_BLK_DEV_RAM_SIZE=16384
46CONFIG_NETDEVICES=y
47CONFIG_NET_ETHERNET=y
48CONFIG_SMSC911X=y
49# CONFIG_NETDEV_1000 is not set
50# CONFIG_NETDEV_10000 is not set
51# CONFIG_WLAN is not set
52# CONFIG_INPUT_MOUSEDEV is not set
53# CONFIG_INPUT_KEYBOARD is not set
54# CONFIG_INPUT_MOUSE is not set
55# CONFIG_SERIO is not set
56CONFIG_VT_HW_CONSOLE_BINDING=y
57CONFIG_SERIAL_SH_SCI=y
58CONFIG_SERIAL_SH_SCI_NR_UARTS=6
59CONFIG_SERIAL_SH_SCI_CONSOLE=y
60CONFIG_HW_RANDOM=y
61# CONFIG_HWMON is not set
62CONFIG_FB=y
63CONFIG_FB_SH7785FB=y
64CONFIG_FRAMEBUFFER_CONSOLE=y
65CONFIG_FONTS=y
66CONFIG_FONT_8x8=y
67CONFIG_FONT_8x16=y
68CONFIG_LOGO=y
69# CONFIG_HID_SUPPORT is not set
70# CONFIG_USB_SUPPORT is not set
71CONFIG_EXT2_FS=y
72CONFIG_EXT3_FS=y
73# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
74CONFIG_MSDOS_FS=y
75CONFIG_VFAT_FS=y
76CONFIG_NTFS_FS=y
77CONFIG_NTFS_RW=y
78CONFIG_PROC_KCORE=y
79CONFIG_TMPFS=y
80CONFIG_JFFS2_FS=y
81CONFIG_CRAMFS=y
82CONFIG_NFS_FS=y
83CONFIG_NFS_V3=y
84CONFIG_NFS_V4=y
85CONFIG_CIFS=y
86CONFIG_NLS_DEFAULT="utf8"
87CONFIG_NLS_CODEPAGE_437=y
88CONFIG_NLS_CODEPAGE_932=y
89CONFIG_NLS_ASCII=y
90CONFIG_NLS_ISO8859_1=y
91CONFIG_NLS_UTF8=y
92# CONFIG_ENABLE_WARN_DEPRECATED is not set
93# CONFIG_ENABLE_MUST_CHECK is not set
94CONFIG_DEBUG_FS=y
95CONFIG_DEBUG_KERNEL=y
96# CONFIG_DEBUG_PREEMPT is not set
97# CONFIG_DEBUG_BUGVERBOSE is not set
98CONFIG_DEBUG_INFO=y
99# CONFIG_RCU_CPU_STALL_DETECTOR is not set
100# CONFIG_FTRACE is not set
101# CONFIG_CRYPTO_ANSI_CPRNG is not set
102# CONFIG_CRYPTO_HW is not set
diff --git a/arch/sh/configs/apsh4ad0a_defconfig b/arch/sh/configs/apsh4ad0a_defconfig
new file mode 100644
index 000000000000..e71a531f1e31
--- /dev/null
+++ b/arch/sh/configs/apsh4ad0a_defconfig
@@ -0,0 +1,133 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_POSIX_MQUEUE=y
4CONFIG_BSD_PROCESS_ACCT=y
5CONFIG_RCU_TRACE=y
6CONFIG_IKCONFIG=y
7CONFIG_IKCONFIG_PROC=y
8CONFIG_LOG_BUF_SHIFT=14
9CONFIG_CGROUPS=y
10CONFIG_CGROUP_NS=y
11CONFIG_CGROUP_FREEZER=y
12CONFIG_CGROUP_DEVICE=y
13CONFIG_CGROUP_CPUACCT=y
14CONFIG_RESOURCE_COUNTERS=y
15CONFIG_CGROUP_MEM_RES_CTLR=y
16CONFIG_BLK_CGROUP=y
17CONFIG_NAMESPACES=y
18CONFIG_BLK_DEV_INITRD=y
19CONFIG_KALLSYMS_ALL=y
20# CONFIG_COMPAT_BRK is not set
21CONFIG_SLAB=y
22CONFIG_PROFILING=y
23CONFIG_MODULES=y
24CONFIG_MODULE_UNLOAD=y
25# CONFIG_LBDAF is not set
26# CONFIG_BLK_DEV_BSG is not set
27CONFIG_CFQ_GROUP_IOSCHED=y
28CONFIG_CPU_SUBTYPE_SH7786=y
29CONFIG_MEMORY_SIZE=0x10000000
30CONFIG_HUGETLB_PAGE_SIZE_1MB=y
31CONFIG_MEMORY_HOTPLUG=y
32CONFIG_MEMORY_HOTREMOVE=y
33CONFIG_KSM=y
34CONFIG_SH_STORE_QUEUES=y
35CONFIG_SH_APSH4AD0A=y
36CONFIG_NO_HZ=y
37CONFIG_HIGH_RES_TIMERS=y
38CONFIG_CPU_FREQ=y
39CONFIG_CPU_FREQ_GOV_POWERSAVE=m
40CONFIG_CPU_FREQ_GOV_USERSPACE=m
41CONFIG_CPU_FREQ_GOV_ONDEMAND=m
42CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
43CONFIG_SH_CPU_FREQ=y
44CONFIG_KEXEC=y
45CONFIG_SECCOMP=y
46CONFIG_PREEMPT=y
47# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
48CONFIG_BINFMT_MISC=y
49CONFIG_PM=y
50CONFIG_PM_DEBUG=y
51CONFIG_PM_VERBOSE=y
52CONFIG_PM_RUNTIME=y
53CONFIG_CPU_IDLE=y
54CONFIG_NET=y
55CONFIG_PACKET=y
56CONFIG_UNIX=y
57CONFIG_NET_KEY=y
58CONFIG_INET=y
59# CONFIG_INET_LRO is not set
60# CONFIG_IPV6 is not set
61# CONFIG_WIRELESS is not set
62CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
63# CONFIG_FW_LOADER is not set
64CONFIG_MTD=y
65CONFIG_MTD_CFI=y
66CONFIG_BLK_DEV_RAM=y
67CONFIG_BLK_DEV_RAM_SIZE=16384
68CONFIG_SCSI=y
69CONFIG_BLK_DEV_SD=y
70CONFIG_SCSI_MULTI_LUN=y
71# CONFIG_SCSI_LOWLEVEL is not set
72CONFIG_NETDEVICES=y
73CONFIG_MDIO_BITBANG=y
74CONFIG_NET_ETHERNET=y
75CONFIG_SMSC911X=y
76# CONFIG_NETDEV_1000 is not set
77# CONFIG_NETDEV_10000 is not set
78# CONFIG_WLAN is not set
79CONFIG_INPUT_EVDEV=y
80# CONFIG_INPUT_KEYBOARD is not set
81# CONFIG_INPUT_MOUSE is not set
82# CONFIG_SERIO is not set
83CONFIG_SERIAL_SH_SCI=y
84CONFIG_SERIAL_SH_SCI_NR_UARTS=6
85CONFIG_SERIAL_SH_SCI_CONSOLE=y
86# CONFIG_LEGACY_PTYS is not set
87# CONFIG_HW_RANDOM is not set
88# CONFIG_HWMON is not set
89CONFIG_VIDEO_OUTPUT_CONTROL=y
90CONFIG_FB=y
91CONFIG_FB_SH7785FB=y
92CONFIG_FRAMEBUFFER_CONSOLE=y
93CONFIG_FONTS=y
94CONFIG_FONT_8x8=y
95CONFIG_FONT_8x16=y
96CONFIG_LOGO=y
97CONFIG_USB=y
98CONFIG_USB_DEBUG=y
99CONFIG_USB_MON=y
100CONFIG_USB_OHCI_HCD=y
101CONFIG_USB_STORAGE=y
102CONFIG_EXT2_FS=y
103CONFIG_EXT3_FS=y
104# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
105CONFIG_MSDOS_FS=y
106CONFIG_VFAT_FS=y
107CONFIG_NTFS_FS=y
108CONFIG_NTFS_RW=y
109CONFIG_PROC_KCORE=y
110CONFIG_TMPFS=y
111CONFIG_HUGETLBFS=y
112CONFIG_JFFS2_FS=y
113CONFIG_CRAMFS=y
114CONFIG_NFS_FS=y
115CONFIG_NFS_V3=y
116CONFIG_NFS_V4=y
117CONFIG_CIFS=y
118CONFIG_NLS_DEFAULT="utf8"
119CONFIG_NLS_CODEPAGE_437=y
120CONFIG_NLS_CODEPAGE_932=y
121CONFIG_NLS_ASCII=y
122CONFIG_NLS_ISO8859_1=y
123CONFIG_NLS_UTF8=y
124# CONFIG_ENABLE_MUST_CHECK is not set
125CONFIG_MAGIC_SYSRQ=y
126CONFIG_DEBUG_KERNEL=y
127CONFIG_DEBUG_SHIRQ=y
128CONFIG_DETECT_HUNG_TASK=y
129CONFIG_DEBUG_INFO=y
130CONFIG_DEBUG_VM=y
131# CONFIG_RCU_CPU_STALL_DETECTOR is not set
132CONFIG_DWARF_UNWINDER=y
133# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/sh/configs/sh7757lcr_defconfig b/arch/sh/configs/sh7757lcr_defconfig
index 273f3fa198f7..5f7f667b9f3b 100644
--- a/arch/sh/configs/sh7757lcr_defconfig
+++ b/arch/sh/configs/sh7757lcr_defconfig
@@ -39,21 +39,15 @@ CONFIG_IPV6=y
39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 39CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
40# CONFIG_FW_LOADER is not set 40# CONFIG_FW_LOADER is not set
41CONFIG_BLK_DEV_RAM=y 41CONFIG_BLK_DEV_RAM=y
42# CONFIG_MISC_DEVICES is not set
43CONFIG_NETDEVICES=y 42CONFIG_NETDEVICES=y
44CONFIG_PHYLIB=y
45CONFIG_VITESSE_PHY=y 43CONFIG_VITESSE_PHY=y
46CONFIG_MDIO_BITBANG=y
47CONFIG_NET_ETHERNET=y 44CONFIG_NET_ETHERNET=y
48CONFIG_MII=y 45CONFIG_SH_ETH=y
49# CONFIG_NETDEV_10000 is not set 46# CONFIG_NETDEV_10000 is not set
50# CONFIG_WLAN is not set 47# CONFIG_WLAN is not set
51# CONFIG_KEYBOARD_ATKBD is not set 48# CONFIG_KEYBOARD_ATKBD is not set
52# CONFIG_MOUSE_PS2 is not set 49# CONFIG_MOUSE_PS2 is not set
53# CONFIG_SERIO is not set 50# CONFIG_SERIO is not set
54CONFIG_SERIAL_8250=y
55CONFIG_SERIAL_8250_CONSOLE=y
56CONFIG_SERIAL_8250_NR_UARTS=2
57CONFIG_SERIAL_SH_SCI=y 51CONFIG_SERIAL_SH_SCI=y
58CONFIG_SERIAL_SH_SCI_NR_UARTS=3 52CONFIG_SERIAL_SH_SCI_NR_UARTS=3
59CONFIG_SERIAL_SH_SCI_CONSOLE=y 53CONFIG_SERIAL_SH_SCI_CONSOLE=y
@@ -63,7 +57,6 @@ CONFIG_SERIAL_SH_SCI_CONSOLE=y
63# CONFIG_USB_SUPPORT is not set 57# CONFIG_USB_SUPPORT is not set
64CONFIG_EXT2_FS=y 58CONFIG_EXT2_FS=y
65CONFIG_EXT3_FS=y 59CONFIG_EXT3_FS=y
66CONFIG_INOTIFY=y
67CONFIG_ISO9660_FS=y 60CONFIG_ISO9660_FS=y
68CONFIG_VFAT_FS=y 61CONFIG_VFAT_FS=y
69CONFIG_PROC_KCORE=y 62CONFIG_PROC_KCORE=y
@@ -76,10 +69,8 @@ CONFIG_NLS_CODEPAGE_437=y
76CONFIG_NLS_CODEPAGE_932=y 69CONFIG_NLS_CODEPAGE_932=y
77CONFIG_NLS_ISO8859_1=y 70CONFIG_NLS_ISO8859_1=y
78CONFIG_DEBUG_KERNEL=y 71CONFIG_DEBUG_KERNEL=y
79# CONFIG_DETECT_SOFTLOCKUP is not set
80# CONFIG_SCHED_DEBUG is not set 72# CONFIG_SCHED_DEBUG is not set
81# CONFIG_DEBUG_BUGVERBOSE is not set 73# CONFIG_DEBUG_BUGVERBOSE is not set
82CONFIG_DEBUG_INFO=y 74CONFIG_DEBUG_INFO=y
83# CONFIG_RCU_CPU_STALL_DETECTOR is not set
84# CONFIG_FTRACE is not set 75# CONFIG_FTRACE is not set
85# CONFIG_CRYPTO_ANSI_CPRNG is not set 76# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/sh/drivers/pci/fixups-landisk.c b/arch/sh/drivers/pci/fixups-landisk.c
index bb1a6bb5149e..95c6e2d94a0a 100644
--- a/arch/sh/drivers/pci/fixups-landisk.c
+++ b/arch/sh/drivers/pci/fixups-landisk.c
@@ -1,9 +1,10 @@
1/* 1/*
2 * arch/sh/drivers/pci/ops-landisk.c 2 * arch/sh/drivers/pci/fixups-landisk.c
3 * 3 *
4 * PCI initialization for the I-O DATA Device, Inc. LANDISK board 4 * PCI initialization for the I-O DATA Device, Inc. LANDISK board
5 * 5 *
6 * Copyright (C) 2006 kogiidena 6 * Copyright (C) 2006 kogiidena
7 * Copyright (C) 2010 Nobuhiro Iwamatsu
7 * 8 *
8 * May be copied or modified under the terms of the GNU General Public 9 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information. 10 * License. See linux/COPYING for more information.
@@ -15,6 +16,9 @@
15#include <linux/pci.h> 16#include <linux/pci.h>
16#include "pci-sh4.h" 17#include "pci-sh4.h"
17 18
19#define PCIMCR_MRSET_OFF 0xBFFFFFFF
20#define PCIMCR_RFSH_OFF 0xFFFFFFFB
21
18int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) 22int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
19{ 23{
20 /* 24 /*
@@ -26,9 +30,29 @@ int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
26 int irq = ((slot + pin - 1) & 0x3) + 5; 30 int irq = ((slot + pin - 1) & 0x3) + 5;
27 31
28 if ((slot | (pin - 1)) > 0x3) { 32 if ((slot | (pin - 1)) > 0x3) {
29 printk("PCI: Bad IRQ mapping request for slot %d pin %c\n", 33 printk(KERN_WARNING "PCI: Bad IRQ mapping request for slot %d pin %c\n",
30 slot, pin - 1 + 'A'); 34 slot, pin - 1 + 'A');
31 return -1; 35 return -1;
32 } 36 }
33 return irq; 37 return irq;
34} 38}
39
40int pci_fixup_pcic(struct pci_channel *chan)
41{
42 unsigned long bcr1, mcr;
43
44 bcr1 = __raw_readl(SH7751_BCR1);
45 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
46 pci_write_reg(chan, bcr1, SH4_PCIBCR1);
47
48 mcr = __raw_readl(SH7751_MCR);
49 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
50 pci_write_reg(chan, mcr, SH4_PCIMCR);
51
52 pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5);
53 pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6);
54 pci_write_reg(chan, 0x0c000000, SH4_PCILAR0);
55 pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
56
57 return 0;
58}
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 89ab2c57a4c2..28c5aa58bb45 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -11,11 +11,6 @@
11 * 11 *
12 * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers 12 * While read{b,w,l,q} and write{b,w,l,q} contain memory barriers
13 * automatically, there are also __raw versions, which do not. 13 * automatically, there are also __raw versions, which do not.
14 *
15 * Historically, we have also had ctrl_in{b,w,l,q}/ctrl_out{b,w,l,q} for
16 * SuperH specific I/O (raw I/O to on-chip CPU peripherals). In practice
17 * these have the same semantics as the __raw variants, and as such, all
18 * new code should be using the __raw versions.
19 */ 14 */
20#include <linux/errno.h> 15#include <linux/errno.h>
21#include <asm/cache.h> 16#include <asm/cache.h>
@@ -231,52 +226,6 @@ __BUILD_IOPORT_STRING(q, u64)
231 226
232#endif 227#endif
233 228
234/*
235 * Legacy SuperH on-chip I/O functions
236 *
237 * These are all deprecated, all new (and especially cross-platform) code
238 * should be using the __raw_xxx() routines directly.
239 */
240static inline u8 __deprecated ctrl_inb(unsigned long addr)
241{
242 return __raw_readb(addr);
243}
244
245static inline u16 __deprecated ctrl_inw(unsigned long addr)
246{
247 return __raw_readw(addr);
248}
249
250static inline u32 __deprecated ctrl_inl(unsigned long addr)
251{
252 return __raw_readl(addr);
253}
254
255static inline u64 __deprecated ctrl_inq(unsigned long addr)
256{
257 return __raw_readq(addr);
258}
259
260static inline void __deprecated ctrl_outb(u8 v, unsigned long addr)
261{
262 __raw_writeb(v, addr);
263}
264
265static inline void __deprecated ctrl_outw(u16 v, unsigned long addr)
266{
267 __raw_writew(v, addr);
268}
269
270static inline void __deprecated ctrl_outl(u32 v, unsigned long addr)
271{
272 __raw_writel(v, addr);
273}
274
275static inline void __deprecated ctrl_outq(u64 v, unsigned long addr)
276{
277 __raw_writeq(v, addr);
278}
279
280#define IO_SPACE_LIMIT 0xffffffff 229#define IO_SPACE_LIMIT 0xffffffff
281 230
282/* synco on SH-4A, otherwise a nop */ 231/* synco on SH-4A, otherwise a nop */
@@ -341,7 +290,15 @@ __ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot)
341 * mapping must be done by the PMB or by using page tables. 290 * mapping must be done by the PMB or by using page tables.
342 */ 291 */
343 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { 292 if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) {
344 if (unlikely(pgprot_val(prot) & _PAGE_CACHABLE)) 293 u64 flags = pgprot_val(prot);
294
295 /*
296 * Anything using the legacy PTEA space attributes needs
297 * to be kicked down to page table mappings.
298 */
299 if (unlikely(flags & _PAGE_PCC_MASK))
300 return NULL;
301 if (unlikely(flags & _PAGE_CACHABLE))
345 return (void __iomem *)P1SEGADDR(offset); 302 return (void __iomem *)P1SEGADDR(offset);
346 303
347 return (void __iomem *)P2SEGADDR(offset); 304 return (void __iomem *)P2SEGADDR(offset);
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index dd5d6e5bf204..57c5c3d0f39f 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -31,6 +31,7 @@ struct sh_machine_vector {
31 int (*mv_mode_pins)(void); 31 int (*mv_mode_pins)(void);
32 32
33 void (*mv_mem_init)(void); 33 void (*mv_mem_init)(void);
34 void (*mv_mem_reserve)(void);
34}; 35};
35 36
36extern struct sh_machine_vector sh_mv; 37extern struct sh_machine_vector sh_mv;
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h
index 43528ec656ba..b799fe71114c 100644
--- a/arch/sh/include/asm/pgtable_32.h
+++ b/arch/sh/include/asm/pgtable_32.h
@@ -76,6 +76,10 @@
76/* Wrapper for extended mode pgprot twiddling */ 76/* Wrapper for extended mode pgprot twiddling */
77#define _PAGE_EXT(x) ((unsigned long long)(x) << 32) 77#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
78 78
79#ifdef CONFIG_X2TLB
80#define _PAGE_PCC_MASK 0x00000000 /* No legacy PTEA support */
81#else
82
79/* software: moves to PTEA.TC (Timing Control) */ 83/* software: moves to PTEA.TC (Timing Control) */
80#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ 84#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
81#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ 85#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
@@ -89,7 +93,8 @@
89#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ 93#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
90#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ 94#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
91 95
92#ifndef CONFIG_X2TLB 96#define _PAGE_PCC_MASK 0xe0000001
97
93/* copy the ptea attributes */ 98/* copy the ptea attributes */
94static inline unsigned long copy_ptea_attributes(unsigned long x) 99static inline unsigned long copy_ptea_attributes(unsigned long x)
95{ 100{
@@ -231,13 +236,7 @@ static inline unsigned long copy_ptea_attributes(unsigned long x)
231 _PAGE_EXT_KERN_EXEC)) 236 _PAGE_EXT_KERN_EXEC))
232 237
233#define PAGE_KERNEL_PCC(slot, type) \ 238#define PAGE_KERNEL_PCC(slot, type) \
234 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ 239 __pgprot(0)
235 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
236 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
237 _PAGE_EXT_KERN_WRITE | \
238 _PAGE_EXT_KERN_EXEC) \
239 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
240 (type))
241 240
242#elif defined(CONFIG_MMU) /* SH-X TLB */ 241#elif defined(CONFIG_MMU) /* SH-X TLB */
243#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ 242#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index c9e7cbc4768a..9c7bdfcaebbd 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -35,7 +35,7 @@ enum cpu_type {
35 CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3, 35 CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3,
36 36
37 /* SH4AL-DSP types */ 37 /* SH4AL-DSP types */
38 CPU_SH7343, CPU_SH7722, CPU_SH7366, 38 CPU_SH7343, CPU_SH7722, CPU_SH7366, CPU_SH7372,
39 39
40 /* SH-5 types */ 40 /* SH-5 types */
41 CPU_SH5_101, CPU_SH5_103, 41 CPU_SH5_101, CPU_SH5_103,
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index e3c73cdd8c90..900f8d72ffe2 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -194,15 +194,17 @@ extern unsigned long get_wchan(struct task_struct *p);
194#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) 194#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
195 195
196#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) 196#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
197
197#define PREFETCH_STRIDE L1_CACHE_BYTES 198#define PREFETCH_STRIDE L1_CACHE_BYTES
198#define ARCH_HAS_PREFETCH 199#define ARCH_HAS_PREFETCH
199#define ARCH_HAS_PREFETCHW 200#define ARCH_HAS_PREFETCHW
200static inline void prefetch(void *x) 201
202static inline void prefetch(const void *x)
201{ 203{
202 __builtin_prefetch(x, 0, 3); 204 __builtin_prefetch(x, 0, 3);
203} 205}
204 206
205static inline void prefetchw(void *x) 207static inline void prefetchw(const void *x)
206{ 208{
207 __builtin_prefetch(x, 1, 3); 209 __builtin_prefetch(x, 1, 3);
208} 210}
diff --git a/arch/sh/include/mach-landisk/mach/iodata_landisk.h b/arch/sh/include/mach-landisk/mach/iodata_landisk.h
index 6fb04ab38b9f..f432773a9571 100644
--- a/arch/sh/include/mach-landisk/mach/iodata_landisk.h
+++ b/arch/sh/include/mach-landisk/mach/iodata_landisk.h
@@ -2,7 +2,7 @@
2#define __ASM_SH_IODATA_LANDISK_H 2#define __ASM_SH_IODATA_LANDISK_H
3 3
4/* 4/*
5 * linux/include/asm-sh/landisk/iodata_landisk.h 5 * arch/sh/include/mach-landisk/mach/iodata_landisk.h
6 * 6 *
7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd. 7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd.
8 * 8 *
@@ -27,7 +27,7 @@
27 27
28#define IRQ_PCIINTA 5 /* PCI INTA IRQ */ 28#define IRQ_PCIINTA 5 /* PCI INTA IRQ */
29#define IRQ_PCIINTB 6 /* PCI INTB IRQ */ 29#define IRQ_PCIINTB 6 /* PCI INTB IRQ */
30#define IRQ_PCIINDC 7 /* PCI INTC IRQ */ 30#define IRQ_PCIINTC 7 /* PCI INTC IRQ */
31#define IRQ_PCIINTD 8 /* PCI INTD IRQ */ 31#define IRQ_PCIINTD 8 /* PCI INTD IRQ */
32#define IRQ_ATA 9 /* ATA IRQ */ 32#define IRQ_ATA 9 /* ATA IRQ */
33#define IRQ_FATA 10 /* FATA IRQ */ 33#define IRQ_FATA 10 /* FATA IRQ */
@@ -35,6 +35,8 @@
35#define IRQ_BUTTON 12 /* USL-5P Button IRQ */ 35#define IRQ_BUTTON 12 /* USL-5P Button IRQ */
36#define IRQ_FAULT 13 /* USL-5P Fault IRQ */ 36#define IRQ_FAULT 13 /* USL-5P Fault IRQ */
37 37
38void init_landisk_IRQ(void);
39
38#define __IO_PREFIX landisk 40#define __IO_PREFIX landisk
39#include <asm/io_generic.h> 41#include <asm/io_generic.h>
40 42
diff --git a/arch/sh/kernel/cpu/proc.c b/arch/sh/kernel/cpu/proc.c
index e80a936f409a..f47be8727b3b 100644
--- a/arch/sh/kernel/cpu/proc.c
+++ b/arch/sh/kernel/cpu/proc.c
@@ -25,7 +25,7 @@ static const char *cpu_name[] = {
25 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", 25 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
26 [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723", 26 [CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723",
27 [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724", 27 [CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724",
28 [CPU_SH_NONE] = "Unknown" 28 [CPU_SH7372] = "SH7372", [CPU_SH_NONE] = "Unknown"
29}; 29};
30 30
31const char *get_cpu_subtype(struct sh_cpuinfo *c) 31const char *get_cpu_subtype(struct sh_cpuinfo *c)
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index c3638516bffc..0f8befccf9fa 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -62,6 +62,8 @@ static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
62static struct plat_sci_port scif0_platform_data = { 62static struct plat_sci_port scif0_platform_data = {
63 .mapbase = 0xf8400000, 63 .mapbase = 0xf8400000,
64 .flags = UPF_BOOT_AUTOCONF, 64 .flags = UPF_BOOT_AUTOCONF,
65 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
66 .scbrr_algo_id = SCBRR_ALGO_2,
65 .type = PORT_SCIF, 67 .type = PORT_SCIF,
66 .irqs = { 88, 88, 88, 88 }, 68 .irqs = { 88, 88, 88, 88 },
67}; 69};
@@ -77,6 +79,8 @@ static struct platform_device scif0_device = {
77static struct plat_sci_port scif1_platform_data = { 79static struct plat_sci_port scif1_platform_data = {
78 .mapbase = 0xf8410000, 80 .mapbase = 0xf8410000,
79 .flags = UPF_BOOT_AUTOCONF, 81 .flags = UPF_BOOT_AUTOCONF,
82 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
83 .scbrr_algo_id = SCBRR_ALGO_2,
80 .type = PORT_SCIF, 84 .type = PORT_SCIF,
81 .irqs = { 92, 92, 92, 92 }, 85 .irqs = { 92, 92, 92, 92 },
82}; 86};
@@ -92,6 +96,8 @@ static struct platform_device scif1_device = {
92static struct plat_sci_port scif2_platform_data = { 96static struct plat_sci_port scif2_platform_data = {
93 .mapbase = 0xf8420000, 97 .mapbase = 0xf8420000,
94 .flags = UPF_BOOT_AUTOCONF, 98 .flags = UPF_BOOT_AUTOCONF,
99 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
100 .scbrr_algo_id = SCBRR_ALGO_2,
95 .type = PORT_SCIF, 101 .type = PORT_SCIF,
96 .irqs = { 96, 96, 96, 96 }, 102 .irqs = { 96, 96, 96, 96 },
97}; 103};
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index 6c96ea02bf8d..949bf2bac28c 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -201,6 +201,8 @@ static struct platform_device mtu2_2_device = {
201static struct plat_sci_port scif0_platform_data = { 201static struct plat_sci_port scif0_platform_data = {
202 .mapbase = 0xff804000, 202 .mapbase = 0xff804000,
203 .flags = UPF_BOOT_AUTOCONF, 203 .flags = UPF_BOOT_AUTOCONF,
204 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
205 .scbrr_algo_id = SCBRR_ALGO_2,
204 .type = PORT_SCIF, 206 .type = PORT_SCIF,
205 .irqs = { 220, 220, 220, 220 }, 207 .irqs = { 220, 220, 220, 220 },
206}; 208};
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index d08bf4c07d60..9df558dcdb86 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -180,6 +180,8 @@ static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
180static struct plat_sci_port scif0_platform_data = { 180static struct plat_sci_port scif0_platform_data = {
181 .mapbase = 0xfffe8000, 181 .mapbase = 0xfffe8000,
182 .flags = UPF_BOOT_AUTOCONF, 182 .flags = UPF_BOOT_AUTOCONF,
183 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
184 .scbrr_algo_id = SCBRR_ALGO_2,
183 .type = PORT_SCIF, 185 .type = PORT_SCIF,
184 .irqs = { 180, 180, 180, 180 } 186 .irqs = { 180, 180, 180, 180 }
185}; 187};
@@ -195,6 +197,8 @@ static struct platform_device scif0_device = {
195static struct plat_sci_port scif1_platform_data = { 197static struct plat_sci_port scif1_platform_data = {
196 .mapbase = 0xfffe8800, 198 .mapbase = 0xfffe8800,
197 .flags = UPF_BOOT_AUTOCONF, 199 .flags = UPF_BOOT_AUTOCONF,
200 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
201 .scbrr_algo_id = SCBRR_ALGO_2,
198 .type = PORT_SCIF, 202 .type = PORT_SCIF,
199 .irqs = { 184, 184, 184, 184 } 203 .irqs = { 184, 184, 184, 184 }
200}; 204};
@@ -210,6 +214,8 @@ static struct platform_device scif1_device = {
210static struct plat_sci_port scif2_platform_data = { 214static struct plat_sci_port scif2_platform_data = {
211 .mapbase = 0xfffe9000, 215 .mapbase = 0xfffe9000,
212 .flags = UPF_BOOT_AUTOCONF, 216 .flags = UPF_BOOT_AUTOCONF,
217 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
218 .scbrr_algo_id = SCBRR_ALGO_2,
213 .type = PORT_SCIF, 219 .type = PORT_SCIF,
214 .irqs = { 188, 188, 188, 188 } 220 .irqs = { 188, 188, 188, 188 }
215}; 221};
@@ -225,6 +231,8 @@ static struct platform_device scif2_device = {
225static struct plat_sci_port scif3_platform_data = { 231static struct plat_sci_port scif3_platform_data = {
226 .mapbase = 0xfffe9800, 232 .mapbase = 0xfffe9800,
227 .flags = UPF_BOOT_AUTOCONF, 233 .flags = UPF_BOOT_AUTOCONF,
234 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
235 .scbrr_algo_id = SCBRR_ALGO_2,
228 .type = PORT_SCIF, 236 .type = PORT_SCIF,
229 .irqs = { 192, 192, 192, 192 } 237 .irqs = { 192, 192, 192, 192 }
230}; 238};
@@ -240,6 +248,8 @@ static struct platform_device scif3_device = {
240static struct plat_sci_port scif4_platform_data = { 248static struct plat_sci_port scif4_platform_data = {
241 .mapbase = 0xfffea000, 249 .mapbase = 0xfffea000,
242 .flags = UPF_BOOT_AUTOCONF, 250 .flags = UPF_BOOT_AUTOCONF,
251 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
252 .scbrr_algo_id = SCBRR_ALGO_2,
243 .type = PORT_SCIF, 253 .type = PORT_SCIF,
244 .irqs = { 196, 196, 196, 196 } 254 .irqs = { 196, 196, 196, 196 }
245}; 255};
@@ -255,6 +265,8 @@ static struct platform_device scif4_device = {
255static struct plat_sci_port scif5_platform_data = { 265static struct plat_sci_port scif5_platform_data = {
256 .mapbase = 0xfffea800, 266 .mapbase = 0xfffea800,
257 .flags = UPF_BOOT_AUTOCONF, 267 .flags = UPF_BOOT_AUTOCONF,
268 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
269 .scbrr_algo_id = SCBRR_ALGO_2,
258 .type = PORT_SCIF, 270 .type = PORT_SCIF,
259 .irqs = { 200, 200, 200, 200 } 271 .irqs = { 200, 200, 200, 200 }
260}; 272};
@@ -270,6 +282,8 @@ static struct platform_device scif5_device = {
270static struct plat_sci_port scif6_platform_data = { 282static struct plat_sci_port scif6_platform_data = {
271 .mapbase = 0xfffeb000, 283 .mapbase = 0xfffeb000,
272 .flags = UPF_BOOT_AUTOCONF, 284 .flags = UPF_BOOT_AUTOCONF,
285 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
286 .scbrr_algo_id = SCBRR_ALGO_2,
273 .type = PORT_SCIF, 287 .type = PORT_SCIF,
274 .irqs = { 204, 204, 204, 204 } 288 .irqs = { 204, 204, 204, 204 }
275}; 289};
@@ -285,6 +299,8 @@ static struct platform_device scif6_device = {
285static struct plat_sci_port scif7_platform_data = { 299static struct plat_sci_port scif7_platform_data = {
286 .mapbase = 0xfffeb800, 300 .mapbase = 0xfffeb800,
287 .flags = UPF_BOOT_AUTOCONF, 301 .flags = UPF_BOOT_AUTOCONF,
302 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
303 .scbrr_algo_id = SCBRR_ALGO_2,
288 .type = PORT_SCIF, 304 .type = PORT_SCIF,
289 .irqs = { 208, 208, 208, 208 } 305 .irqs = { 208, 208, 208, 208 }
290}; 306};
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index 832f401b5860..a43124e608c3 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -176,6 +176,8 @@ static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
176static struct plat_sci_port scif0_platform_data = { 176static struct plat_sci_port scif0_platform_data = {
177 .mapbase = 0xfffe8000, 177 .mapbase = 0xfffe8000,
178 .flags = UPF_BOOT_AUTOCONF, 178 .flags = UPF_BOOT_AUTOCONF,
179 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
180 .scbrr_algo_id = SCBRR_ALGO_2,
179 .type = PORT_SCIF, 181 .type = PORT_SCIF,
180 .irqs = { 192, 192, 192, 192 }, 182 .irqs = { 192, 192, 192, 192 },
181}; 183};
@@ -191,6 +193,8 @@ static struct platform_device scif0_device = {
191static struct plat_sci_port scif1_platform_data = { 193static struct plat_sci_port scif1_platform_data = {
192 .mapbase = 0xfffe8800, 194 .mapbase = 0xfffe8800,
193 .flags = UPF_BOOT_AUTOCONF, 195 .flags = UPF_BOOT_AUTOCONF,
196 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
197 .scbrr_algo_id = SCBRR_ALGO_2,
194 .type = PORT_SCIF, 198 .type = PORT_SCIF,
195 .irqs = { 196, 196, 196, 196 }, 199 .irqs = { 196, 196, 196, 196 },
196}; 200};
@@ -206,6 +210,8 @@ static struct platform_device scif1_device = {
206static struct plat_sci_port scif2_platform_data = { 210static struct plat_sci_port scif2_platform_data = {
207 .mapbase = 0xfffe9000, 211 .mapbase = 0xfffe9000,
208 .flags = UPF_BOOT_AUTOCONF, 212 .flags = UPF_BOOT_AUTOCONF,
213 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
214 .scbrr_algo_id = SCBRR_ALGO_2,
209 .type = PORT_SCIF, 215 .type = PORT_SCIF,
210 .irqs = { 200, 200, 200, 200 }, 216 .irqs = { 200, 200, 200, 200 },
211}; 217};
@@ -221,6 +227,8 @@ static struct platform_device scif2_device = {
221static struct plat_sci_port scif3_platform_data = { 227static struct plat_sci_port scif3_platform_data = {
222 .mapbase = 0xfffe9800, 228 .mapbase = 0xfffe9800,
223 .flags = UPF_BOOT_AUTOCONF, 229 .flags = UPF_BOOT_AUTOCONF,
230 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
231 .scbrr_algo_id = SCBRR_ALGO_2,
224 .type = PORT_SCIF, 232 .type = PORT_SCIF,
225 .irqs = { 204, 204, 204, 204 }, 233 .irqs = { 204, 204, 204, 204 },
226}; 234};
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index dc47b04e1049..5d14f849aea3 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -136,6 +136,8 @@ static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
136static struct plat_sci_port scif0_platform_data = { 136static struct plat_sci_port scif0_platform_data = {
137 .mapbase = 0xfffe8000, 137 .mapbase = 0xfffe8000,
138 .flags = UPF_BOOT_AUTOCONF, 138 .flags = UPF_BOOT_AUTOCONF,
139 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
140 .scbrr_algo_id = SCBRR_ALGO_2,
139 .type = PORT_SCIF, 141 .type = PORT_SCIF,
140 .irqs = { 240, 240, 240, 240 }, 142 .irqs = { 240, 240, 240, 240 },
141}; 143};
@@ -151,6 +153,8 @@ static struct platform_device scif0_device = {
151static struct plat_sci_port scif1_platform_data = { 153static struct plat_sci_port scif1_platform_data = {
152 .mapbase = 0xfffe8800, 154 .mapbase = 0xfffe8800,
153 .flags = UPF_BOOT_AUTOCONF, 155 .flags = UPF_BOOT_AUTOCONF,
156 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
157 .scbrr_algo_id = SCBRR_ALGO_2,
154 .type = PORT_SCIF, 158 .type = PORT_SCIF,
155 .irqs = { 244, 244, 244, 244 }, 159 .irqs = { 244, 244, 244, 244 },
156}; 160};
@@ -166,6 +170,8 @@ static struct platform_device scif1_device = {
166static struct plat_sci_port scif2_platform_data = { 170static struct plat_sci_port scif2_platform_data = {
167 .mapbase = 0xfffe9000, 171 .mapbase = 0xfffe9000,
168 .flags = UPF_BOOT_AUTOCONF, 172 .flags = UPF_BOOT_AUTOCONF,
173 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
174 .scbrr_algo_id = SCBRR_ALGO_2,
169 .type = PORT_SCIF, 175 .type = PORT_SCIF,
170 .irqs = { 248, 248, 248, 248 }, 176 .irqs = { 248, 248, 248, 248 },
171}; 177};
@@ -181,6 +187,8 @@ static struct platform_device scif2_device = {
181static struct plat_sci_port scif3_platform_data = { 187static struct plat_sci_port scif3_platform_data = {
182 .mapbase = 0xfffe9800, 188 .mapbase = 0xfffe9800,
183 .flags = UPF_BOOT_AUTOCONF, 189 .flags = UPF_BOOT_AUTOCONF,
190 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
191 .scbrr_algo_id = SCBRR_ALGO_2,
184 .type = PORT_SCIF, 192 .type = PORT_SCIF,
185 .irqs = { 252, 252, 252, 252 }, 193 .irqs = { 252, 252, 252, 252 },
186}; 194};
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index baadd7f54d94..cd2e702feb7e 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -70,6 +70,9 @@ static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
70static struct plat_sci_port scif0_platform_data = { 70static struct plat_sci_port scif0_platform_data = {
71 .mapbase = 0xa4410000, 71 .mapbase = 0xa4410000,
72 .flags = UPF_BOOT_AUTOCONF, 72 .flags = UPF_BOOT_AUTOCONF,
73 .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE |
74 SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0,
75 .scbrr_algo_id = SCBRR_ALGO_4,
73 .type = PORT_SCIF, 76 .type = PORT_SCIF,
74 .irqs = { 56, 56, 56 }, 77 .irqs = { 56, 56, 56 },
75}; 78};
@@ -85,6 +88,8 @@ static struct platform_device scif0_device = {
85static struct plat_sci_port scif1_platform_data = { 88static struct plat_sci_port scif1_platform_data = {
86 .mapbase = 0xa4400000, 89 .mapbase = 0xa4400000,
87 .flags = UPF_BOOT_AUTOCONF, 90 .flags = UPF_BOOT_AUTOCONF,
91 .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
92 .scbrr_algo_id = SCBRR_ALGO_4,
88 .type = PORT_SCIF, 93 .type = PORT_SCIF,
89 .irqs = { 52, 52, 52 }, 94 .irqs = { 52, 52, 52 },
90}; 95};
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index 3cf8c8ef7b32..4551ad647c2c 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -109,6 +109,8 @@ static struct platform_device rtc_device = {
109static struct plat_sci_port scif0_platform_data = { 109static struct plat_sci_port scif0_platform_data = {
110 .mapbase = 0xfffffe80, 110 .mapbase = 0xfffffe80,
111 .flags = UPF_BOOT_AUTOCONF, 111 .flags = UPF_BOOT_AUTOCONF,
112 .scscr = SCSCR_TE | SCSCR_RE,
113 .scbrr_algo_id = SCBRR_ALGO_2,
112 .type = PORT_SCI, 114 .type = PORT_SCI,
113 .irqs = { 23, 23, 23, 0 }, 115 .irqs = { 23, 23, 23, 0 },
114}; 116};
@@ -126,6 +128,8 @@ static struct platform_device scif0_device = {
126static struct plat_sci_port scif1_platform_data = { 128static struct plat_sci_port scif1_platform_data = {
127 .mapbase = 0xa4000150, 129 .mapbase = 0xa4000150,
128 .flags = UPF_BOOT_AUTOCONF, 130 .flags = UPF_BOOT_AUTOCONF,
131 .scscr = SCSCR_TE | SCSCR_RE,
132 .scbrr_algo_id = SCBRR_ALGO_2,
129 .type = PORT_SCIF, 133 .type = PORT_SCIF,
130 .irqs = { 56, 56, 56, 56 }, 134 .irqs = { 56, 56, 56, 56 },
131}; 135};
@@ -143,6 +147,8 @@ static struct platform_device scif1_device = {
143static struct plat_sci_port scif2_platform_data = { 147static struct plat_sci_port scif2_platform_data = {
144 .mapbase = 0xa4000140, 148 .mapbase = 0xa4000140,
145 .flags = UPF_BOOT_AUTOCONF, 149 .flags = UPF_BOOT_AUTOCONF,
150 .scscr = SCSCR_TE | SCSCR_RE,
151 .scbrr_algo_id = SCBRR_ALGO_2,
146 .type = PORT_IRDA, 152 .type = PORT_IRDA,
147 .irqs = { 52, 52, 52, 52 }, 153 .irqs = { 52, 52, 52, 52 },
148}; 154};
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index b0c2fb4ab479..78f6b01d42c3 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -99,6 +99,9 @@ static struct platform_device rtc_device = {
99static struct plat_sci_port scif0_platform_data = { 99static struct plat_sci_port scif0_platform_data = {
100 .mapbase = 0xa4400000, 100 .mapbase = 0xa4400000,
101 .flags = UPF_BOOT_AUTOCONF, 101 .flags = UPF_BOOT_AUTOCONF,
102 .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE |
103 SCSCR_CKE1 | SCSCR_CKE0,
104 .scbrr_algo_id = SCBRR_ALGO_2,
102 .type = PORT_SCIF, 105 .type = PORT_SCIF,
103 .irqs = { 52, 52, 52, 52 }, 106 .irqs = { 52, 52, 52, 52 },
104}; 107};
@@ -114,6 +117,9 @@ static struct platform_device scif0_device = {
114static struct plat_sci_port scif1_platform_data = { 117static struct plat_sci_port scif1_platform_data = {
115 .mapbase = 0xa4410000, 118 .mapbase = 0xa4410000,
116 .flags = UPF_BOOT_AUTOCONF, 119 .flags = UPF_BOOT_AUTOCONF,
120 .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE |
121 SCSCR_CKE1 | SCSCR_CKE0,
122 .scbrr_algo_id = SCBRR_ALGO_2,
117 .type = PORT_SCIF, 123 .type = PORT_SCIF,
118 .irqs = { 56, 56, 56, 56 }, 124 .irqs = { 56, 56, 56, 56 },
119}; 125};
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 24b17135d5d2..365b94a6fcb7 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * SH7720 Setup 2 * Setup code for SH7720, SH7721.
3 * 3 *
4 * Copyright (C) 2007 Markus Brunner, Mark Jonas 4 * Copyright (C) 2007 Markus Brunner, Mark Jonas
5 * Copyright (C) 2009 Paul Mundt 5 * Copyright (C) 2009 Paul Mundt
@@ -51,6 +51,8 @@ static struct platform_device rtc_device = {
51static struct plat_sci_port scif0_platform_data = { 51static struct plat_sci_port scif0_platform_data = {
52 .mapbase = 0xa4430000, 52 .mapbase = 0xa4430000,
53 .flags = UPF_BOOT_AUTOCONF, 53 .flags = UPF_BOOT_AUTOCONF,
54 .scscr = SCSCR_RE | SCSCR_TE,
55 .scbrr_algo_id = SCBRR_ALGO_4,
54 .type = PORT_SCIF, 56 .type = PORT_SCIF,
55 .irqs = { 80, 80, 80, 80 }, 57 .irqs = { 80, 80, 80, 80 },
56}; 58};
@@ -66,6 +68,8 @@ static struct platform_device scif0_device = {
66static struct plat_sci_port scif1_platform_data = { 68static struct plat_sci_port scif1_platform_data = {
67 .mapbase = 0xa4438000, 69 .mapbase = 0xa4438000,
68 .flags = UPF_BOOT_AUTOCONF, 70 .flags = UPF_BOOT_AUTOCONF,
71 .scscr = SCSCR_RE | SCSCR_TE,
72 .scbrr_algo_id = SCBRR_ALGO_4,
69 .type = PORT_SCIF, 73 .type = PORT_SCIF,
70 .irqs = { 81, 81, 81, 81 }, 74 .irqs = { 81, 81, 81, 81 },
71}; 75};
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index b93458f33b74..971cf0fce4f5 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -151,8 +151,14 @@ void __cpuinit cpu_probe(void)
151 boot_cpu_data.flags |= CPU_HAS_L2_CACHE; 151 boot_cpu_data.flags |= CPU_HAS_L2_CACHE;
152 break; 152 break;
153 case 0x10: 153 case 0x10:
154 case 0x11:
154 boot_cpu_data.type = CPU_SH7757; 155 boot_cpu_data.type = CPU_SH7757;
155 break; 156 break;
157 case 0xd0:
158 case 0x40: /* yon-ten-go */
159 boot_cpu_data.type = CPU_SH7372;
160 break;
161
156 } 162 }
157 break; 163 break;
158 case 0x4000: /* 1st cut */ 164 case 0x4000: /* 1st cut */
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index e916b18e1f7c..5b2833159b7d 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -18,6 +18,8 @@
18static struct plat_sci_port scif0_platform_data = { 18static struct plat_sci_port scif0_platform_data = {
19 .mapbase = 0xffe80000, 19 .mapbase = 0xffe80000,
20 .flags = UPF_BOOT_AUTOCONF, 20 .flags = UPF_BOOT_AUTOCONF,
21 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
22 .scbrr_algo_id = SCBRR_ALGO_2,
21 .type = PORT_SCIF, 23 .type = PORT_SCIF,
22 .irqs = { 40, 41, 43, 42 }, 24 .irqs = { 40, 41, 43, 42 },
23}; 25};
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index 911d196e86b5..c2b0aaaedcae 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -14,6 +14,7 @@
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/sh_timer.h> 15#include <linux/sh_timer.h>
16#include <linux/serial_sci.h> 16#include <linux/serial_sci.h>
17#include <asm/machtypes.h>
17 18
18static struct resource rtc_resources[] = { 19static struct resource rtc_resources[] = {
19 [0] = { 20 [0] = {
@@ -35,33 +36,37 @@ static struct platform_device rtc_device = {
35 .resource = rtc_resources, 36 .resource = rtc_resources,
36}; 37};
37 38
38static struct plat_sci_port scif0_platform_data = { 39static struct plat_sci_port sci_platform_data = {
39 .mapbase = 0xffe00000, 40 .mapbase = 0xffe00000,
40 .flags = UPF_BOOT_AUTOCONF, 41 .flags = UPF_BOOT_AUTOCONF,
42 .scscr = SCSCR_TE | SCSCR_RE,
43 .scbrr_algo_id = SCBRR_ALGO_2,
41 .type = PORT_SCI, 44 .type = PORT_SCI,
42 .irqs = { 23, 23, 23, 0 }, 45 .irqs = { 23, 23, 23, 0 },
43}; 46};
44 47
45static struct platform_device scif0_device = { 48static struct platform_device sci_device = {
46 .name = "sh-sci", 49 .name = "sh-sci",
47 .id = 0, 50 .id = 0,
48 .dev = { 51 .dev = {
49 .platform_data = &scif0_platform_data, 52 .platform_data = &sci_platform_data,
50 }, 53 },
51}; 54};
52 55
53static struct plat_sci_port scif1_platform_data = { 56static struct plat_sci_port scif_platform_data = {
54 .mapbase = 0xffe80000, 57 .mapbase = 0xffe80000,
55 .flags = UPF_BOOT_AUTOCONF, 58 .flags = UPF_BOOT_AUTOCONF,
59 .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE,
60 .scbrr_algo_id = SCBRR_ALGO_2,
56 .type = PORT_SCIF, 61 .type = PORT_SCIF,
57 .irqs = { 40, 40, 40, 40 }, 62 .irqs = { 40, 40, 40, 40 },
58}; 63};
59 64
60static struct platform_device scif1_device = { 65static struct platform_device scif_device = {
61 .name = "sh-sci", 66 .name = "sh-sci",
62 .id = 1, 67 .id = 1,
63 .dev = { 68 .dev = {
64 .platform_data = &scif1_platform_data, 69 .platform_data = &scif_platform_data,
65 }, 70 },
66}; 71};
67 72
@@ -210,8 +215,6 @@ static struct platform_device tmu4_device = {
210#endif 215#endif
211 216
212static struct platform_device *sh7750_devices[] __initdata = { 217static struct platform_device *sh7750_devices[] __initdata = {
213 &scif0_device,
214 &scif1_device,
215 &rtc_device, 218 &rtc_device,
216 &tmu0_device, 219 &tmu0_device,
217 &tmu1_device, 220 &tmu1_device,
@@ -226,14 +229,19 @@ static struct platform_device *sh7750_devices[] __initdata = {
226 229
227static int __init sh7750_devices_setup(void) 230static int __init sh7750_devices_setup(void)
228{ 231{
232 if (mach_is_rts7751r2d()) {
233 platform_register_device(&scif_device);
234 } else {
235 platform_register_device(&sci_device);
236 platform_register_device(&scif_device);
237 }
238
229 return platform_add_devices(sh7750_devices, 239 return platform_add_devices(sh7750_devices,
230 ARRAY_SIZE(sh7750_devices)); 240 ARRAY_SIZE(sh7750_devices));
231} 241}
232arch_initcall(sh7750_devices_setup); 242arch_initcall(sh7750_devices_setup);
233 243
234static struct platform_device *sh7750_early_devices[] __initdata = { 244static struct platform_device *sh7750_early_devices[] __initdata = {
235 &scif0_device,
236 &scif1_device,
237 &tmu0_device, 245 &tmu0_device,
238 &tmu1_device, 246 &tmu1_device,
239 &tmu2_device, 247 &tmu2_device,
@@ -247,6 +255,14 @@ static struct platform_device *sh7750_early_devices[] __initdata = {
247 255
248void __init plat_early_device_setup(void) 256void __init plat_early_device_setup(void)
249{ 257{
258 if (mach_is_rts7751r2d()) {
259 scif_platform_data.scscr |= SCSCR_CKE1;
260 early_platform_add_devices(&scif_device, 1);
261 } else {
262 early_platform_add_devices(&sci_device, 1);
263 early_platform_add_devices(&scif_device, 1);
264 }
265
250 early_platform_add_devices(sh7750_early_devices, 266 early_platform_add_devices(sh7750_early_devices,
251 ARRAY_SIZE(sh7750_early_devices)); 267 ARRAY_SIZE(sh7750_early_devices));
252} 268}
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 48ea8fe85dc5..78bbf232e391 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -129,6 +129,8 @@ static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
129static struct plat_sci_port scif0_platform_data = { 129static struct plat_sci_port scif0_platform_data = {
130 .mapbase = 0xfe600000, 130 .mapbase = 0xfe600000,
131 .flags = UPF_BOOT_AUTOCONF, 131 .flags = UPF_BOOT_AUTOCONF,
132 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
133 .scbrr_algo_id = SCBRR_ALGO_2,
132 .type = PORT_SCIF, 134 .type = PORT_SCIF,
133 .irqs = { 52, 53, 55, 54 }, 135 .irqs = { 52, 53, 55, 54 },
134}; 136};
@@ -145,6 +147,8 @@ static struct plat_sci_port scif1_platform_data = {
145 .mapbase = 0xfe610000, 147 .mapbase = 0xfe610000,
146 .flags = UPF_BOOT_AUTOCONF, 148 .flags = UPF_BOOT_AUTOCONF,
147 .type = PORT_SCIF, 149 .type = PORT_SCIF,
150 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
151 .scbrr_algo_id = SCBRR_ALGO_2,
148 .irqs = { 72, 73, 75, 74 }, 152 .irqs = { 72, 73, 75, 74 },
149}; 153};
150 154
@@ -159,6 +163,8 @@ static struct platform_device scif1_device = {
159static struct plat_sci_port scif2_platform_data = { 163static struct plat_sci_port scif2_platform_data = {
160 .mapbase = 0xfe620000, 164 .mapbase = 0xfe620000,
161 .flags = UPF_BOOT_AUTOCONF, 165 .flags = UPF_BOOT_AUTOCONF,
166 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
167 .scbrr_algo_id = SCBRR_ALGO_2,
162 .type = PORT_SCIF, 168 .type = PORT_SCIF,
163 .irqs = { 76, 77, 79, 78 }, 169 .irqs = { 76, 77, 79, 78 },
164}; 170};
@@ -174,6 +180,8 @@ static struct platform_device scif2_device = {
174static struct plat_sci_port scif3_platform_data = { 180static struct plat_sci_port scif3_platform_data = {
175 .mapbase = 0xfe480000, 181 .mapbase = 0xfe480000,
176 .flags = UPF_BOOT_AUTOCONF, 182 .flags = UPF_BOOT_AUTOCONF,
183 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
184 .scbrr_algo_id = SCBRR_ALGO_2,
177 .type = PORT_SCI, 185 .type = PORT_SCI,
178 .irqs = { 80, 81, 82, 0 }, 186 .irqs = { 80, 81, 82, 0 },
179}; 187};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 3681cafdb4af..1b8848317e9c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -19,6 +19,8 @@
19static struct plat_sci_port scif0_platform_data = { 19static struct plat_sci_port scif0_platform_data = {
20 .mapbase = 0xffe00000, 20 .mapbase = 0xffe00000,
21 .flags = UPF_BOOT_AUTOCONF, 21 .flags = UPF_BOOT_AUTOCONF,
22 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
23 .scbrr_algo_id = SCBRR_ALGO_2,
22 .type = PORT_SCIF, 24 .type = PORT_SCIF,
23 .irqs = { 80, 80, 80, 80 }, 25 .irqs = { 80, 80, 80, 80 },
24}; 26};
@@ -34,6 +36,8 @@ static struct platform_device scif0_device = {
34static struct plat_sci_port scif1_platform_data = { 36static struct plat_sci_port scif1_platform_data = {
35 .mapbase = 0xffe10000, 37 .mapbase = 0xffe10000,
36 .flags = UPF_BOOT_AUTOCONF, 38 .flags = UPF_BOOT_AUTOCONF,
39 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
40 .scbrr_algo_id = SCBRR_ALGO_2,
37 .type = PORT_SCIF, 41 .type = PORT_SCIF,
38 .irqs = { 81, 81, 81, 81 }, 42 .irqs = { 81, 81, 81, 81 },
39}; 43};
@@ -49,6 +53,8 @@ static struct platform_device scif1_device = {
49static struct plat_sci_port scif2_platform_data = { 53static struct plat_sci_port scif2_platform_data = {
50 .mapbase = 0xffe20000, 54 .mapbase = 0xffe20000,
51 .flags = UPF_BOOT_AUTOCONF, 55 .flags = UPF_BOOT_AUTOCONF,
56 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
57 .scbrr_algo_id = SCBRR_ALGO_2,
52 .type = PORT_SCIF, 58 .type = PORT_SCIF,
53 .irqs = { 82, 82, 82, 82 }, 59 .irqs = { 82, 82, 82, 82 },
54}; 60};
@@ -64,6 +70,8 @@ static struct platform_device scif2_device = {
64static struct plat_sci_port scif3_platform_data = { 70static struct plat_sci_port scif3_platform_data = {
65 .mapbase = 0xffe30000, 71 .mapbase = 0xffe30000,
66 .flags = UPF_BOOT_AUTOCONF, 72 .flags = UPF_BOOT_AUTOCONF,
73 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
74 .scbrr_algo_id = SCBRR_ALGO_2,
67 .type = PORT_SCIF, 75 .type = PORT_SCIF,
68 .irqs = { 83, 83, 83, 83 }, 76 .irqs = { 83, 83, 83, 83 },
69}; 77};
@@ -360,6 +368,8 @@ void __init plat_early_device_setup(void)
360 368
361enum { 369enum {
362 UNUSED = 0, 370 UNUSED = 0,
371 ENABLED,
372 DISABLED,
363 373
364 /* interrupt sources */ 374 /* interrupt sources */
365 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 375 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
@@ -375,15 +385,13 @@ enum {
375 I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, 385 I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI,
376 I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI, 386 I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI,
377 SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, 387 SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI,
378 IRDA, 388 IRDA, SDHI, CMT, TSIF, SIU,
379 SDHI0, SDHI1, SDHI2, SDHI3,
380 CMT, TSIF, SIU,
381 TMU0, TMU1, TMU2, 389 TMU0, TMU1, TMU2,
382 JPU, LCDC, 390 JPU, LCDC,
383 391
384 /* interrupt groups */ 392 /* interrupt groups */
385 393
386 DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, SDHI, USB, 394 DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, USB,
387}; 395};
388 396
389static struct intc_vect vectors[] __initdata = { 397static struct intc_vect vectors[] __initdata = {
@@ -412,8 +420,8 @@ static struct intc_vect vectors[] __initdata = {
412 INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), 420 INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0),
413 INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20), 421 INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20),
414 INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60), 422 INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60),
415 INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), 423 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
416 INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), 424 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
417 INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), 425 INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20),
418 INTC_VECT(SIU, 0xf80), 426 INTC_VECT(SIU, 0xf80),
419 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 427 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
@@ -431,7 +439,6 @@ static struct intc_group groups[] __initdata = {
431 INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI), 439 INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI),
432 INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI), 440 INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI),
433 INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI), 441 INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI),
434 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
435 INTC_GROUP(USB, USBI0, USBI1), 442 INTC_GROUP(USB, USBI0, USBI1),
436}; 443};
437 444
@@ -452,7 +459,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
452 { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, 459 { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI,
453 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, 460 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } },
454 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 461 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
455 { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } }, 462 { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, 0, SIU } },
456 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 463 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
457 { 0, 0, 0, CMT, 0, USBI1, USBI0 } }, 464 { 0, 0, 0, CMT, 0, USBI1, USBI0 } },
458 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ 465 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
@@ -488,9 +495,13 @@ static struct intc_mask_reg ack_registers[] __initdata = {
488 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 495 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
489}; 496};
490 497
491static DECLARE_INTC_DESC_ACK(intc_desc, "sh7343", vectors, groups, 498static struct intc_desc intc_desc __initdata = {
492 mask_registers, prio_registers, sense_registers, 499 .name = "sh7343",
493 ack_registers); 500 .force_enable = ENABLED,
501 .force_disable = DISABLED,
502 .hw = INTC_HW_DESC(vectors, groups, mask_registers,
503 prio_registers, sense_registers, ack_registers),
504};
494 505
495void __init plat_irq_setup(void) 506void __init plat_irq_setup(void)
496{ 507{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 8dab9e1bbd89..82616af64d62 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -21,6 +21,8 @@
21static struct plat_sci_port scif0_platform_data = { 21static struct plat_sci_port scif0_platform_data = {
22 .mapbase = 0xffe00000, 22 .mapbase = 0xffe00000,
23 .flags = UPF_BOOT_AUTOCONF, 23 .flags = UPF_BOOT_AUTOCONF,
24 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
25 .scbrr_algo_id = SCBRR_ALGO_2,
24 .type = PORT_SCIF, 26 .type = PORT_SCIF,
25 .irqs = { 80, 80, 80, 80 }, 27 .irqs = { 80, 80, 80, 80 },
26}; 28};
@@ -319,6 +321,8 @@ void __init plat_early_device_setup(void)
319 321
320enum { 322enum {
321 UNUSED=0, 323 UNUSED=0,
324 ENABLED,
325 DISABLED,
322 326
323 /* interrupt sources */ 327 /* interrupt sources */
324 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 328 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
@@ -332,14 +336,13 @@ enum {
332 DENC, MSIOF, 336 DENC, MSIOF,
333 FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, 337 FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
334 I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI, 338 I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI,
335 SDHI0, SDHI1, SDHI2, SDHI3, 339 SDHI, CMT, TSIF, SIU,
336 CMT, TSIF, SIU,
337 TMU0, TMU1, TMU2, 340 TMU0, TMU1, TMU2,
338 VEU2, LCDC, 341 VEU2, LCDC,
339 342
340 /* interrupt groups */ 343 /* interrupt groups */
341 344
342 DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C, SDHI, 345 DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C,
343}; 346};
344 347
345static struct intc_vect vectors[] __initdata = { 348static struct intc_vect vectors[] __initdata = {
@@ -364,8 +367,8 @@ static struct intc_vect vectors[] __initdata = {
364 INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), 367 INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0),
365 INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20), 368 INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20),
366 INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60), 369 INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60),
367 INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), 370 INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0),
368 INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), 371 INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0),
369 INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), 372 INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20),
370 INTC_VECT(SIU, 0xf80), 373 INTC_VECT(SIU, 0xf80),
371 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 374 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
@@ -381,7 +384,6 @@ static struct intc_group groups[] __initdata = {
381 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, 384 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI,
382 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), 385 FLCTL_FLTREQ0I, FLCTL_FLTREQ1I),
383 INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI), 386 INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI),
384 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
385}; 387};
386 388
387static struct intc_mask_reg mask_registers[] __initdata = { 389static struct intc_mask_reg mask_registers[] __initdata = {
@@ -403,7 +405,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
403 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, 405 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
404 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, 406 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } },
405 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 407 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
406 { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } }, 408 { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, 0, SIU } },
407 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 409 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
408 { 0, 0, 0, CMT, 0, USB, } }, 410 { 0, 0, 0, CMT, 0, USB, } },
409 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ 411 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
@@ -441,9 +443,13 @@ static struct intc_mask_reg ack_registers[] __initdata = {
441 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 443 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
442}; 444};
443 445
444static DECLARE_INTC_DESC_ACK(intc_desc, "sh7366", vectors, groups, 446static struct intc_desc intc_desc __initdata = {
445 mask_registers, prio_registers, sense_registers, 447 .name = "sh7366",
446 ack_registers); 448 .force_enable = ENABLED,
449 .force_disable = DISABLED,
450 .hw = INTC_HW_DESC(vectors, groups, mask_registers,
451 prio_registers, sense_registers, ack_registers),
452};
447 453
448void __init plat_irq_setup(void) 454void __init plat_irq_setup(void)
449{ 455{
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index d551ed8dea95..5813d8023619 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -181,6 +181,8 @@ struct platform_device dma_device = {
181static struct plat_sci_port scif0_platform_data = { 181static struct plat_sci_port scif0_platform_data = {
182 .mapbase = 0xffe00000, 182 .mapbase = 0xffe00000,
183 .flags = UPF_BOOT_AUTOCONF, 183 .flags = UPF_BOOT_AUTOCONF,
184 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
185 .scbrr_algo_id = SCBRR_ALGO_2,
184 .type = PORT_SCIF, 186 .type = PORT_SCIF,
185 .irqs = { 80, 80, 80, 80 }, 187 .irqs = { 80, 80, 80, 80 },
186}; 188};
@@ -196,6 +198,8 @@ static struct platform_device scif0_device = {
196static struct plat_sci_port scif1_platform_data = { 198static struct plat_sci_port scif1_platform_data = {
197 .mapbase = 0xffe10000, 199 .mapbase = 0xffe10000,
198 .flags = UPF_BOOT_AUTOCONF, 200 .flags = UPF_BOOT_AUTOCONF,
201 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
202 .scbrr_algo_id = SCBRR_ALGO_2,
199 .type = PORT_SCIF, 203 .type = PORT_SCIF,
200 .irqs = { 81, 81, 81, 81 }, 204 .irqs = { 81, 81, 81, 81 },
201}; 205};
@@ -211,6 +215,8 @@ static struct platform_device scif1_device = {
211static struct plat_sci_port scif2_platform_data = { 215static struct plat_sci_port scif2_platform_data = {
212 .mapbase = 0xffe20000, 216 .mapbase = 0xffe20000,
213 .flags = UPF_BOOT_AUTOCONF, 217 .flags = UPF_BOOT_AUTOCONF,
218 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
219 .scbrr_algo_id = SCBRR_ALGO_2,
214 .type = PORT_SCIF, 220 .type = PORT_SCIF,
215 .irqs = { 82, 82, 82, 82 }, 221 .irqs = { 82, 82, 82, 82 },
216}; 222};
@@ -699,7 +705,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
699 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, 705 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
700 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, 706 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } },
701 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 707 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
702 { DISABLED, DISABLED, ENABLED, ENABLED, 0, 0, TWODG, SIU } }, 708 { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, TWODG, SIU } },
703 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 709 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
704 { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } }, 710 { 0, 0, 0, CMT, 0, USB_USBI1, USB_USBI0, } },
705 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ 711 { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 0eadefdbbba1..072382280f96 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -24,6 +24,8 @@
24static struct plat_sci_port scif0_platform_data = { 24static struct plat_sci_port scif0_platform_data = {
25 .mapbase = 0xffe00000, 25 .mapbase = 0xffe00000,
26 .flags = UPF_BOOT_AUTOCONF, 26 .flags = UPF_BOOT_AUTOCONF,
27 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
28 .scbrr_algo_id = SCBRR_ALGO_2,
27 .type = PORT_SCIF, 29 .type = PORT_SCIF,
28 .irqs = { 80, 80, 80, 80 }, 30 .irqs = { 80, 80, 80, 80 },
29}; 31};
@@ -39,6 +41,8 @@ static struct platform_device scif0_device = {
39static struct plat_sci_port scif1_platform_data = { 41static struct plat_sci_port scif1_platform_data = {
40 .mapbase = 0xffe10000, 42 .mapbase = 0xffe10000,
41 .flags = UPF_BOOT_AUTOCONF, 43 .flags = UPF_BOOT_AUTOCONF,
44 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
45 .scbrr_algo_id = SCBRR_ALGO_2,
42 .type = PORT_SCIF, 46 .type = PORT_SCIF,
43 .irqs = { 81, 81, 81, 81 }, 47 .irqs = { 81, 81, 81, 81 },
44}; 48};
@@ -54,6 +58,8 @@ static struct platform_device scif1_device = {
54static struct plat_sci_port scif2_platform_data = { 58static struct plat_sci_port scif2_platform_data = {
55 .mapbase = 0xffe20000, 59 .mapbase = 0xffe20000,
56 .flags = UPF_BOOT_AUTOCONF, 60 .flags = UPF_BOOT_AUTOCONF,
61 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
62 .scbrr_algo_id = SCBRR_ALGO_2,
57 .type = PORT_SCIF, 63 .type = PORT_SCIF,
58 .irqs = { 82, 82, 82, 82 }, 64 .irqs = { 82, 82, 82, 82 },
59}; 65};
@@ -69,6 +75,8 @@ static struct platform_device scif2_device = {
69static struct plat_sci_port scif3_platform_data = { 75static struct plat_sci_port scif3_platform_data = {
70 .mapbase = 0xa4e30000, 76 .mapbase = 0xa4e30000,
71 .flags = UPF_BOOT_AUTOCONF, 77 .flags = UPF_BOOT_AUTOCONF,
78 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
79 .scbrr_algo_id = SCBRR_ALGO_3,
72 .type = PORT_SCIFA, 80 .type = PORT_SCIFA,
73 .irqs = { 56, 56, 56, 56 }, 81 .irqs = { 56, 56, 56, 56 },
74}; 82};
@@ -84,6 +92,8 @@ static struct platform_device scif3_device = {
84static struct plat_sci_port scif4_platform_data = { 92static struct plat_sci_port scif4_platform_data = {
85 .mapbase = 0xa4e40000, 93 .mapbase = 0xa4e40000,
86 .flags = UPF_BOOT_AUTOCONF, 94 .flags = UPF_BOOT_AUTOCONF,
95 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
96 .scbrr_algo_id = SCBRR_ALGO_3,
87 .type = PORT_SCIFA, 97 .type = PORT_SCIFA,
88 .irqs = { 88, 88, 88, 88 }, 98 .irqs = { 88, 88, 88, 88 },
89}; 99};
@@ -99,6 +109,8 @@ static struct platform_device scif4_device = {
99static struct plat_sci_port scif5_platform_data = { 109static struct plat_sci_port scif5_platform_data = {
100 .mapbase = 0xa4e50000, 110 .mapbase = 0xa4e50000,
101 .flags = UPF_BOOT_AUTOCONF, 111 .flags = UPF_BOOT_AUTOCONF,
112 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
113 .scbrr_algo_id = SCBRR_ALGO_3,
102 .type = PORT_SCIFA, 114 .type = PORT_SCIFA,
103 .irqs = { 109, 109, 109, 109 }, 115 .irqs = { 109, 109, 109, 109 },
104}; 116};
@@ -719,7 +731,7 @@ static struct intc_group groups[] __initdata = {
719static struct intc_mask_reg mask_registers[] __initdata = { 731static struct intc_mask_reg mask_registers[] __initdata = {
720 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ 732 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
721 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, 733 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
722 0, DISABLED, ENABLED, ENABLED } }, 734 0, ENABLED, ENABLED, ENABLED } },
723 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ 735 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
724 { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } }, 736 { VIO_VOUI, VIO_VEU2HI,VIO_BEUI,VIO_CEUI,DMAC0A_DEI3,DMAC0A_DEI2,DMAC0A_DEI1,DMAC0A_DEI0 } },
725 { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ 737 { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
@@ -736,7 +748,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
736 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, 748 { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI,
737 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, 749 FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } },
738 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 750 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
739 { 0, DISABLED, ENABLED, ENABLED, 751 { 0, ENABLED, ENABLED, ENABLED,
740 0, 0, SCIFA_SCIFA2, SIU_SIUI } }, 752 0, 0, SCIFA_SCIFA2, SIU_SIUI } },
741 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 753 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
742 { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } }, 754 { 0, 0, 0, CMT_CMTI, 0, 0, USB_USI0,0 } },
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 828c9657eb52..0333fe9e3881 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -257,6 +257,8 @@ static struct platform_device dma1_device = {
257static struct plat_sci_port scif0_platform_data = { 257static struct plat_sci_port scif0_platform_data = {
258 .mapbase = 0xffe00000, 258 .mapbase = 0xffe00000,
259 .flags = UPF_BOOT_AUTOCONF, 259 .flags = UPF_BOOT_AUTOCONF,
260 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
261 .scbrr_algo_id = SCBRR_ALGO_2,
260 .type = PORT_SCIF, 262 .type = PORT_SCIF,
261 .irqs = { 80, 80, 80, 80 }, 263 .irqs = { 80, 80, 80, 80 },
262}; 264};
@@ -272,6 +274,8 @@ static struct platform_device scif0_device = {
272static struct plat_sci_port scif1_platform_data = { 274static struct plat_sci_port scif1_platform_data = {
273 .mapbase = 0xffe10000, 275 .mapbase = 0xffe10000,
274 .flags = UPF_BOOT_AUTOCONF, 276 .flags = UPF_BOOT_AUTOCONF,
277 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
278 .scbrr_algo_id = SCBRR_ALGO_2,
275 .type = PORT_SCIF, 279 .type = PORT_SCIF,
276 .irqs = { 81, 81, 81, 81 }, 280 .irqs = { 81, 81, 81, 81 },
277}; 281};
@@ -287,6 +291,8 @@ static struct platform_device scif1_device = {
287static struct plat_sci_port scif2_platform_data = { 291static struct plat_sci_port scif2_platform_data = {
288 .mapbase = 0xffe20000, 292 .mapbase = 0xffe20000,
289 .flags = UPF_BOOT_AUTOCONF, 293 .flags = UPF_BOOT_AUTOCONF,
294 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
295 .scbrr_algo_id = SCBRR_ALGO_2,
290 .type = PORT_SCIF, 296 .type = PORT_SCIF,
291 .irqs = { 82, 82, 82, 82 }, 297 .irqs = { 82, 82, 82, 82 },
292}; 298};
@@ -302,6 +308,8 @@ static struct platform_device scif2_device = {
302static struct plat_sci_port scif3_platform_data = { 308static struct plat_sci_port scif3_platform_data = {
303 .mapbase = 0xa4e30000, 309 .mapbase = 0xa4e30000,
304 .flags = UPF_BOOT_AUTOCONF, 310 .flags = UPF_BOOT_AUTOCONF,
311 .scscr = SCSCR_RE | SCSCR_TE,
312 .scbrr_algo_id = SCBRR_ALGO_3,
305 .type = PORT_SCIFA, 313 .type = PORT_SCIFA,
306 .irqs = { 56, 56, 56, 56 }, 314 .irqs = { 56, 56, 56, 56 },
307}; 315};
@@ -317,6 +325,8 @@ static struct platform_device scif3_device = {
317static struct plat_sci_port scif4_platform_data = { 325static struct plat_sci_port scif4_platform_data = {
318 .mapbase = 0xa4e40000, 326 .mapbase = 0xa4e40000,
319 .flags = UPF_BOOT_AUTOCONF, 327 .flags = UPF_BOOT_AUTOCONF,
328 .scscr = SCSCR_RE | SCSCR_TE,
329 .scbrr_algo_id = SCBRR_ALGO_3,
320 .type = PORT_SCIFA, 330 .type = PORT_SCIFA,
321 .irqs = { 88, 88, 88, 88 }, 331 .irqs = { 88, 88, 88, 88 },
322}; 332};
@@ -332,6 +342,8 @@ static struct platform_device scif4_device = {
332static struct plat_sci_port scif5_platform_data = { 342static struct plat_sci_port scif5_platform_data = {
333 .mapbase = 0xa4e50000, 343 .mapbase = 0xa4e50000,
334 .flags = UPF_BOOT_AUTOCONF, 344 .flags = UPF_BOOT_AUTOCONF,
345 .scscr = SCSCR_RE | SCSCR_TE,
346 .scbrr_algo_id = SCBRR_ALGO_3,
335 .type = PORT_SCIFA, 347 .type = PORT_SCIFA,
336 .irqs = { 109, 109, 109, 109 }, 348 .irqs = { 109, 109, 109, 109 },
337}; 349};
@@ -1144,7 +1156,7 @@ static struct intc_group groups[] __initdata = {
1144static struct intc_mask_reg mask_registers[] __initdata = { 1156static struct intc_mask_reg mask_registers[] __initdata = {
1145 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ 1157 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
1146 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0, 1158 { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
1147 0, DISABLED, ENABLED, ENABLED } }, 1159 0, ENABLED, ENABLED, ENABLED } },
1148 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ 1160 { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
1149 { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0, 1161 { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0,
1150 DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } }, 1162 DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } },
@@ -1166,7 +1178,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
1166 { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, 1178 { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI,
1167 I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } }, 1179 I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } },
1168 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 1180 { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
1169 { DISABLED, DISABLED, ENABLED, ENABLED, 1181 { DISABLED, ENABLED, ENABLED, ENABLED,
1170 0, 0, SCIFA5, FSI } }, 1182 0, 0, SCIFA5, FSI } },
1171 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 1183 { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
1172 { 0, 0, 0, CMT, 0, USB1, USB0, 0 } }, 1184 { 0, 0, 0, CMT, 0, USB1, USB0, 0 } },
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 749c6388d5a5..9c1de2633ac3 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -20,6 +20,8 @@
20static struct plat_sci_port scif2_platform_data = { 20static struct plat_sci_port scif2_platform_data = {
21 .mapbase = 0xfe4b0000, /* SCIF2 */ 21 .mapbase = 0xfe4b0000, /* SCIF2 */
22 .flags = UPF_BOOT_AUTOCONF, 22 .flags = UPF_BOOT_AUTOCONF,
23 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
24 .scbrr_algo_id = SCBRR_ALGO_2,
23 .type = PORT_SCIF, 25 .type = PORT_SCIF,
24 .irqs = { 40, 40, 40, 40 }, 26 .irqs = { 40, 40, 40, 40 },
25}; 27};
@@ -35,6 +37,8 @@ static struct platform_device scif2_device = {
35static struct plat_sci_port scif3_platform_data = { 37static struct plat_sci_port scif3_platform_data = {
36 .mapbase = 0xfe4c0000, /* SCIF3 */ 38 .mapbase = 0xfe4c0000, /* SCIF3 */
37 .flags = UPF_BOOT_AUTOCONF, 39 .flags = UPF_BOOT_AUTOCONF,
40 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
41 .scbrr_algo_id = SCBRR_ALGO_2,
38 .type = PORT_SCIF, 42 .type = PORT_SCIF,
39 .irqs = { 76, 76, 76, 76 }, 43 .irqs = { 76, 76, 76, 76 },
40}; 44};
@@ -50,6 +54,8 @@ static struct platform_device scif3_device = {
50static struct plat_sci_port scif4_platform_data = { 54static struct plat_sci_port scif4_platform_data = {
51 .mapbase = 0xfe4d0000, /* SCIF4 */ 55 .mapbase = 0xfe4d0000, /* SCIF4 */
52 .flags = UPF_BOOT_AUTOCONF, 56 .flags = UPF_BOOT_AUTOCONF,
57 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
58 .scbrr_algo_id = SCBRR_ALGO_2,
53 .type = PORT_SCIF, 59 .type = PORT_SCIF,
54 .irqs = { 104, 104, 104, 104 }, 60 .irqs = { 104, 104, 104, 104 },
55}; 61};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 5b5f6b005fc5..593eca6509b5 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -19,6 +19,8 @@
19static struct plat_sci_port scif0_platform_data = { 19static struct plat_sci_port scif0_platform_data = {
20 .mapbase = 0xffe00000, 20 .mapbase = 0xffe00000,
21 .flags = UPF_BOOT_AUTOCONF, 21 .flags = UPF_BOOT_AUTOCONF,
22 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
23 .scbrr_algo_id = SCBRR_ALGO_2,
22 .type = PORT_SCIF, 24 .type = PORT_SCIF,
23 .irqs = { 40, 40, 40, 40 }, 25 .irqs = { 40, 40, 40, 40 },
24}; 26};
@@ -34,6 +36,8 @@ static struct platform_device scif0_device = {
34static struct plat_sci_port scif1_platform_data = { 36static struct plat_sci_port scif1_platform_data = {
35 .mapbase = 0xffe08000, 37 .mapbase = 0xffe08000,
36 .flags = UPF_BOOT_AUTOCONF, 38 .flags = UPF_BOOT_AUTOCONF,
39 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
40 .scbrr_algo_id = SCBRR_ALGO_2,
37 .type = PORT_SCIF, 41 .type = PORT_SCIF,
38 .irqs = { 76, 76, 76, 76 }, 42 .irqs = { 76, 76, 76, 76 },
39}; 43};
@@ -49,6 +53,8 @@ static struct platform_device scif1_device = {
49static struct plat_sci_port scif2_platform_data = { 53static struct plat_sci_port scif2_platform_data = {
50 .mapbase = 0xffe10000, 54 .mapbase = 0xffe10000,
51 .flags = UPF_BOOT_AUTOCONF, 55 .flags = UPF_BOOT_AUTOCONF,
56 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
57 .scbrr_algo_id = SCBRR_ALGO_2,
52 .type = PORT_SCIF, 58 .type = PORT_SCIF,
53 .irqs = { 104, 104, 104, 104 }, 59 .irqs = { 104, 104, 104, 104 },
54}; 60};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index 7270d7fd6761..2c6aa22cf5f6 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -17,6 +17,8 @@
17static struct plat_sci_port scif0_platform_data = { 17static struct plat_sci_port scif0_platform_data = {
18 .mapbase = 0xff923000, 18 .mapbase = 0xff923000,
19 .flags = UPF_BOOT_AUTOCONF, 19 .flags = UPF_BOOT_AUTOCONF,
20 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
21 .scbrr_algo_id = SCBRR_ALGO_2,
20 .type = PORT_SCIF, 22 .type = PORT_SCIF,
21 .irqs = { 61, 61, 61, 61 }, 23 .irqs = { 61, 61, 61, 61 },
22}; 24};
@@ -32,6 +34,8 @@ static struct platform_device scif0_device = {
32static struct plat_sci_port scif1_platform_data = { 34static struct plat_sci_port scif1_platform_data = {
33 .mapbase = 0xff924000, 35 .mapbase = 0xff924000,
34 .flags = UPF_BOOT_AUTOCONF, 36 .flags = UPF_BOOT_AUTOCONF,
37 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
38 .scbrr_algo_id = SCBRR_ALGO_2,
35 .type = PORT_SCIF, 39 .type = PORT_SCIF,
36 .irqs = { 62, 62, 62, 62 }, 40 .irqs = { 62, 62, 62, 62 },
37}; 41};
@@ -47,6 +51,8 @@ static struct platform_device scif1_device = {
47static struct plat_sci_port scif2_platform_data = { 51static struct plat_sci_port scif2_platform_data = {
48 .mapbase = 0xff925000, 52 .mapbase = 0xff925000,
49 .flags = UPF_BOOT_AUTOCONF, 53 .flags = UPF_BOOT_AUTOCONF,
54 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
55 .scbrr_algo_id = SCBRR_ALGO_2,
50 .type = PORT_SCIF, 56 .type = PORT_SCIF,
51 .irqs = { 63, 63, 63, 63 }, 57 .irqs = { 63, 63, 63, 63 },
52}; 58};
@@ -62,6 +68,8 @@ static struct platform_device scif2_device = {
62static struct plat_sci_port scif3_platform_data = { 68static struct plat_sci_port scif3_platform_data = {
63 .mapbase = 0xff926000, 69 .mapbase = 0xff926000,
64 .flags = UPF_BOOT_AUTOCONF, 70 .flags = UPF_BOOT_AUTOCONF,
71 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
72 .scbrr_algo_id = SCBRR_ALGO_2,
65 .type = PORT_SCIF, 73 .type = PORT_SCIF,
66 .irqs = { 64, 64, 64, 64 }, 74 .irqs = { 64, 64, 64, 64 },
67}; 75};
@@ -77,6 +85,8 @@ static struct platform_device scif3_device = {
77static struct plat_sci_port scif4_platform_data = { 85static struct plat_sci_port scif4_platform_data = {
78 .mapbase = 0xff927000, 86 .mapbase = 0xff927000,
79 .flags = UPF_BOOT_AUTOCONF, 87 .flags = UPF_BOOT_AUTOCONF,
88 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
89 .scbrr_algo_id = SCBRR_ALGO_2,
80 .type = PORT_SCIF, 90 .type = PORT_SCIF,
81 .irqs = { 65, 65, 65, 65 }, 91 .irqs = { 65, 65, 65, 65 },
82}; 92};
@@ -92,6 +102,8 @@ static struct platform_device scif4_device = {
92static struct plat_sci_port scif5_platform_data = { 102static struct plat_sci_port scif5_platform_data = {
93 .mapbase = 0xff928000, 103 .mapbase = 0xff928000,
94 .flags = UPF_BOOT_AUTOCONF, 104 .flags = UPF_BOOT_AUTOCONF,
105 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
106 .scbrr_algo_id = SCBRR_ALGO_2,
95 .type = PORT_SCIF, 107 .type = PORT_SCIF,
96 .irqs = { 66, 66, 66, 66 }, 108 .irqs = { 66, 66, 66, 66 },
97}; 109};
@@ -107,6 +119,8 @@ static struct platform_device scif5_device = {
107static struct plat_sci_port scif6_platform_data = { 119static struct plat_sci_port scif6_platform_data = {
108 .mapbase = 0xff929000, 120 .mapbase = 0xff929000,
109 .flags = UPF_BOOT_AUTOCONF, 121 .flags = UPF_BOOT_AUTOCONF,
122 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
123 .scbrr_algo_id = SCBRR_ALGO_2,
110 .type = PORT_SCIF, 124 .type = PORT_SCIF,
111 .irqs = { 67, 67, 67, 67 }, 125 .irqs = { 67, 67, 67, 67 },
112}; 126};
@@ -122,6 +136,8 @@ static struct platform_device scif6_device = {
122static struct plat_sci_port scif7_platform_data = { 136static struct plat_sci_port scif7_platform_data = {
123 .mapbase = 0xff92a000, 137 .mapbase = 0xff92a000,
124 .flags = UPF_BOOT_AUTOCONF, 138 .flags = UPF_BOOT_AUTOCONF,
139 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
140 .scbrr_algo_id = SCBRR_ALGO_2,
125 .type = PORT_SCIF, 141 .type = PORT_SCIF,
126 .irqs = { 68, 68, 68, 68 }, 142 .irqs = { 68, 68, 68, 68 },
127}; 143};
@@ -137,6 +153,8 @@ static struct platform_device scif7_device = {
137static struct plat_sci_port scif8_platform_data = { 153static struct plat_sci_port scif8_platform_data = {
138 .mapbase = 0xff92b000, 154 .mapbase = 0xff92b000,
139 .flags = UPF_BOOT_AUTOCONF, 155 .flags = UPF_BOOT_AUTOCONF,
156 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
157 .scbrr_algo_id = SCBRR_ALGO_2,
140 .type = PORT_SCIF, 158 .type = PORT_SCIF,
141 .irqs = { 69, 69, 69, 69 }, 159 .irqs = { 69, 69, 69, 69 },
142}; 160};
@@ -152,6 +170,8 @@ static struct platform_device scif8_device = {
152static struct plat_sci_port scif9_platform_data = { 170static struct plat_sci_port scif9_platform_data = {
153 .mapbase = 0xff92c000, 171 .mapbase = 0xff92c000,
154 .flags = UPF_BOOT_AUTOCONF, 172 .flags = UPF_BOOT_AUTOCONF,
173 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
174 .scbrr_algo_id = SCBRR_ALGO_2,
155 .type = PORT_SCIF, 175 .type = PORT_SCIF,
156 .irqs = { 70, 70, 70, 70 }, 176 .irqs = { 70, 70, 70, 70 },
157}; 177};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 0f414864f76b..08add7fa6849 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -20,6 +20,8 @@
20static struct plat_sci_port scif0_platform_data = { 20static struct plat_sci_port scif0_platform_data = {
21 .mapbase = 0xffe00000, 21 .mapbase = 0xffe00000,
22 .flags = UPF_BOOT_AUTOCONF, 22 .flags = UPF_BOOT_AUTOCONF,
23 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
24 .scbrr_algo_id = SCBRR_ALGO_1,
23 .type = PORT_SCIF, 25 .type = PORT_SCIF,
24 .irqs = { 40, 40, 40, 40 }, 26 .irqs = { 40, 40, 40, 40 },
25}; 27};
@@ -35,6 +37,8 @@ static struct platform_device scif0_device = {
35static struct plat_sci_port scif1_platform_data = { 37static struct plat_sci_port scif1_platform_data = {
36 .mapbase = 0xffe10000, 38 .mapbase = 0xffe10000,
37 .flags = UPF_BOOT_AUTOCONF, 39 .flags = UPF_BOOT_AUTOCONF,
40 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
41 .scbrr_algo_id = SCBRR_ALGO_1,
38 .type = PORT_SCIF, 42 .type = PORT_SCIF,
39 .irqs = { 76, 76, 76, 76 }, 43 .irqs = { 76, 76, 76, 76 },
40}; 44};
@@ -379,6 +383,7 @@ static int __init sh7780_devices_setup(void)
379 ARRAY_SIZE(sh7780_devices)); 383 ARRAY_SIZE(sh7780_devices));
380} 384}
381arch_initcall(sh7780_devices_setup); 385arch_initcall(sh7780_devices_setup);
386
382static struct platform_device *sh7780_early_devices[] __initdata = { 387static struct platform_device *sh7780_early_devices[] __initdata = {
383 &scif0_device, 388 &scif0_device,
384 &scif1_device, 389 &scif1_device,
@@ -392,6 +397,13 @@ static struct platform_device *sh7780_early_devices[] __initdata = {
392 397
393void __init plat_early_device_setup(void) 398void __init plat_early_device_setup(void)
394{ 399{
400 if (mach_is_sh2007()) {
401 scif0_platform_data.scscr &= ~SCSCR_CKE1;
402 scif0_platform_data.scbrr_algo_id = SCBRR_ALGO_2;
403 scif1_platform_data.scscr &= ~SCSCR_CKE1;
404 scif1_platform_data.scbrr_algo_id = SCBRR_ALGO_2;
405 }
406
395 early_platform_add_devices(sh7780_early_devices, 407 early_platform_add_devices(sh7780_early_devices,
396 ARRAY_SIZE(sh7780_early_devices)); 408 ARRAY_SIZE(sh7780_early_devices));
397} 409}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index c9a572bc6dc8..18d8fc136fb2 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -23,6 +23,8 @@
23static struct plat_sci_port scif0_platform_data = { 23static struct plat_sci_port scif0_platform_data = {
24 .mapbase = 0xffea0000, 24 .mapbase = 0xffea0000,
25 .flags = UPF_BOOT_AUTOCONF, 25 .flags = UPF_BOOT_AUTOCONF,
26 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
27 .scbrr_algo_id = SCBRR_ALGO_1,
26 .type = PORT_SCIF, 28 .type = PORT_SCIF,
27 .irqs = { 40, 40, 40, 40 }, 29 .irqs = { 40, 40, 40, 40 },
28}; 30};
@@ -38,6 +40,8 @@ static struct platform_device scif0_device = {
38static struct plat_sci_port scif1_platform_data = { 40static struct plat_sci_port scif1_platform_data = {
39 .mapbase = 0xffeb0000, 41 .mapbase = 0xffeb0000,
40 .flags = UPF_BOOT_AUTOCONF, 42 .flags = UPF_BOOT_AUTOCONF,
43 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
44 .scbrr_algo_id = SCBRR_ALGO_1,
41 .type = PORT_SCIF, 45 .type = PORT_SCIF,
42 .irqs = { 44, 44, 44, 44 }, 46 .irqs = { 44, 44, 44, 44 },
43}; 47};
@@ -53,6 +57,8 @@ static struct platform_device scif1_device = {
53static struct plat_sci_port scif2_platform_data = { 57static struct plat_sci_port scif2_platform_data = {
54 .mapbase = 0xffec0000, 58 .mapbase = 0xffec0000,
55 .flags = UPF_BOOT_AUTOCONF, 59 .flags = UPF_BOOT_AUTOCONF,
60 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
61 .scbrr_algo_id = SCBRR_ALGO_1,
56 .type = PORT_SCIF, 62 .type = PORT_SCIF,
57 .irqs = { 60, 60, 60, 60 }, 63 .irqs = { 60, 60, 60, 60 },
58}; 64};
@@ -68,6 +74,8 @@ static struct platform_device scif2_device = {
68static struct plat_sci_port scif3_platform_data = { 74static struct plat_sci_port scif3_platform_data = {
69 .mapbase = 0xffed0000, 75 .mapbase = 0xffed0000,
70 .flags = UPF_BOOT_AUTOCONF, 76 .flags = UPF_BOOT_AUTOCONF,
77 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
78 .scbrr_algo_id = SCBRR_ALGO_1,
71 .type = PORT_SCIF, 79 .type = PORT_SCIF,
72 .irqs = { 61, 61, 61, 61 }, 80 .irqs = { 61, 61, 61, 61 },
73}; 81};
@@ -83,6 +91,8 @@ static struct platform_device scif3_device = {
83static struct plat_sci_port scif4_platform_data = { 91static struct plat_sci_port scif4_platform_data = {
84 .mapbase = 0xffee0000, 92 .mapbase = 0xffee0000,
85 .flags = UPF_BOOT_AUTOCONF, 93 .flags = UPF_BOOT_AUTOCONF,
94 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
95 .scbrr_algo_id = SCBRR_ALGO_1,
86 .type = PORT_SCIF, 96 .type = PORT_SCIF,
87 .irqs = { 62, 62, 62, 62 }, 97 .irqs = { 62, 62, 62, 62 },
88}; 98};
@@ -98,6 +108,8 @@ static struct platform_device scif4_device = {
98static struct plat_sci_port scif5_platform_data = { 108static struct plat_sci_port scif5_platform_data = {
99 .mapbase = 0xffef0000, 109 .mapbase = 0xffef0000,
100 .flags = UPF_BOOT_AUTOCONF, 110 .flags = UPF_BOOT_AUTOCONF,
111 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
112 .scbrr_algo_id = SCBRR_ALGO_1,
101 .type = PORT_SCIF, 113 .type = PORT_SCIF,
102 .irqs = { 63, 63, 63, 63 }, 114 .irqs = { 63, 63, 63, 63 },
103}; 115};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 0170dbda1d00..1656b8c91faf 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -29,6 +29,8 @@
29static struct plat_sci_port scif0_platform_data = { 29static struct plat_sci_port scif0_platform_data = {
30 .mapbase = 0xffea0000, 30 .mapbase = 0xffea0000,
31 .flags = UPF_BOOT_AUTOCONF, 31 .flags = UPF_BOOT_AUTOCONF,
32 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
33 .scbrr_algo_id = SCBRR_ALGO_1,
32 .type = PORT_SCIF, 34 .type = PORT_SCIF,
33 .irqs = { 40, 41, 43, 42 }, 35 .irqs = { 40, 41, 43, 42 },
34}; 36};
@@ -47,6 +49,8 @@ static struct platform_device scif0_device = {
47static struct plat_sci_port scif1_platform_data = { 49static struct plat_sci_port scif1_platform_data = {
48 .mapbase = 0xffeb0000, 50 .mapbase = 0xffeb0000,
49 .flags = UPF_BOOT_AUTOCONF, 51 .flags = UPF_BOOT_AUTOCONF,
52 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
53 .scbrr_algo_id = SCBRR_ALGO_1,
50 .type = PORT_SCIF, 54 .type = PORT_SCIF,
51 .irqs = { 44, 44, 44, 44 }, 55 .irqs = { 44, 44, 44, 44 },
52}; 56};
@@ -62,6 +66,8 @@ static struct platform_device scif1_device = {
62static struct plat_sci_port scif2_platform_data = { 66static struct plat_sci_port scif2_platform_data = {
63 .mapbase = 0xffec0000, 67 .mapbase = 0xffec0000,
64 .flags = UPF_BOOT_AUTOCONF, 68 .flags = UPF_BOOT_AUTOCONF,
69 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
70 .scbrr_algo_id = SCBRR_ALGO_1,
65 .type = PORT_SCIF, 71 .type = PORT_SCIF,
66 .irqs = { 50, 50, 50, 50 }, 72 .irqs = { 50, 50, 50, 50 },
67}; 73};
@@ -77,6 +83,8 @@ static struct platform_device scif2_device = {
77static struct plat_sci_port scif3_platform_data = { 83static struct plat_sci_port scif3_platform_data = {
78 .mapbase = 0xffed0000, 84 .mapbase = 0xffed0000,
79 .flags = UPF_BOOT_AUTOCONF, 85 .flags = UPF_BOOT_AUTOCONF,
86 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
87 .scbrr_algo_id = SCBRR_ALGO_1,
80 .type = PORT_SCIF, 88 .type = PORT_SCIF,
81 .irqs = { 51, 51, 51, 51 }, 89 .irqs = { 51, 51, 51, 51 },
82}; 90};
@@ -92,6 +100,8 @@ static struct platform_device scif3_device = {
92static struct plat_sci_port scif4_platform_data = { 100static struct plat_sci_port scif4_platform_data = {
93 .mapbase = 0xffee0000, 101 .mapbase = 0xffee0000,
94 .flags = UPF_BOOT_AUTOCONF, 102 .flags = UPF_BOOT_AUTOCONF,
103 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
104 .scbrr_algo_id = SCBRR_ALGO_1,
95 .type = PORT_SCIF, 105 .type = PORT_SCIF,
96 .irqs = { 52, 52, 52, 52 }, 106 .irqs = { 52, 52, 52, 52 },
97}; 107};
@@ -107,6 +117,8 @@ static struct platform_device scif4_device = {
107static struct plat_sci_port scif5_platform_data = { 117static struct plat_sci_port scif5_platform_data = {
108 .mapbase = 0xffef0000, 118 .mapbase = 0xffef0000,
109 .flags = UPF_BOOT_AUTOCONF, 119 .flags = UPF_BOOT_AUTOCONF,
120 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
121 .scbrr_algo_id = SCBRR_ALGO_1,
110 .type = PORT_SCIF, 122 .type = PORT_SCIF,
111 .irqs = { 53, 53, 53, 53 }, 123 .irqs = { 53, 53, 53, 53 },
112}; 124};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index 013f0b144489..bb208806dc1a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -29,6 +29,8 @@
29static struct plat_sci_port scif0_platform_data = { 29static struct plat_sci_port scif0_platform_data = {
30 .mapbase = 0xffc30000, 30 .mapbase = 0xffc30000,
31 .flags = UPF_BOOT_AUTOCONF, 31 .flags = UPF_BOOT_AUTOCONF,
32 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
33 .scbrr_algo_id = SCBRR_ALGO_2,
32 .type = PORT_SCIF, 34 .type = PORT_SCIF,
33 .irqs = { 40, 41, 43, 42 }, 35 .irqs = { 40, 41, 43, 42 },
34}; 36};
@@ -44,6 +46,8 @@ static struct platform_device scif0_device = {
44static struct plat_sci_port scif1_platform_data = { 46static struct plat_sci_port scif1_platform_data = {
45 .mapbase = 0xffc40000, 47 .mapbase = 0xffc40000,
46 .flags = UPF_BOOT_AUTOCONF, 48 .flags = UPF_BOOT_AUTOCONF,
49 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
50 .scbrr_algo_id = SCBRR_ALGO_2,
47 .type = PORT_SCIF, 51 .type = PORT_SCIF,
48 .irqs = { 44, 45, 47, 46 }, 52 .irqs = { 44, 45, 47, 46 },
49}; 53};
@@ -59,6 +63,8 @@ static struct platform_device scif1_device = {
59static struct plat_sci_port scif2_platform_data = { 63static struct plat_sci_port scif2_platform_data = {
60 .mapbase = 0xffc60000, 64 .mapbase = 0xffc60000,
61 .flags = UPF_BOOT_AUTOCONF, 65 .flags = UPF_BOOT_AUTOCONF,
66 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
67 .scbrr_algo_id = SCBRR_ALGO_2,
62 .type = PORT_SCIF, 68 .type = PORT_SCIF,
63 .irqs = { 52, 53, 55, 54 }, 69 .irqs = { 52, 53, 55, 54 },
64}; 70};
diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
index d910666142b1..18419f1de963 100644
--- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
@@ -19,6 +19,8 @@
19static struct plat_sci_port scif0_platform_data = { 19static struct plat_sci_port scif0_platform_data = {
20 .mapbase = PHYS_PERIPHERAL_BLOCK + 0x01030000, 20 .mapbase = PHYS_PERIPHERAL_BLOCK + 0x01030000,
21 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 21 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
22 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
23 .scbrr_algo_id = SCBRR_ALGO_2,
22 .type = PORT_SCIF, 24 .type = PORT_SCIF,
23 .irqs = { 39, 40, 42, 0 }, 25 .irqs = { 39, 40, 42, 0 },
24}; 26};
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 3385b28acaac..0d3f912e3334 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -2,7 +2,7 @@
2 * linux/arch/sh/mm/init.c 2 * linux/arch/sh/mm/init.c
3 * 3 *
4 * Copyright (C) 1999 Niibe Yutaka 4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2002 - 2010 Paul Mundt 5 * Copyright (C) 2002 - 2011 Paul Mundt
6 * 6 *
7 * Based on linux/arch/i386/mm/init.c: 7 * Based on linux/arch/i386/mm/init.c:
8 * Copyright (C) 1995 Linus Torvalds 8 * Copyright (C) 1995 Linus Torvalds
@@ -325,11 +325,17 @@ void __init paging_init(void)
325 int nid; 325 int nid;
326 326
327 memblock_init(); 327 memblock_init();
328
329 sh_mv.mv_mem_init(); 328 sh_mv.mv_mem_init();
330 329
331 early_reserve_mem(); 330 early_reserve_mem();
332 331
332 /*
333 * Once the early reservations are out of the way, give the
334 * platforms a chance to kick out some memory.
335 */
336 if (sh_mv.mv_mem_reserve)
337 sh_mv.mv_mem_reserve();
338
333 memblock_enforce_memory_limit(memory_limit); 339 memblock_enforce_memory_limit(memory_limit);
334 memblock_analyze(); 340 memblock_analyze();
335 341
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 0e68465e7b50..6dd56c4d0054 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -9,6 +9,7 @@ SE SH_SOLUTION_ENGINE
9HIGHLANDER SH_HIGHLANDER 9HIGHLANDER SH_HIGHLANDER
10RTS7751R2D SH_RTS7751R2D 10RTS7751R2D SH_RTS7751R2D
11RSK SH_RSK 11RSK SH_RSK
12ALPHA_BOARD SH_ALPHA_BOARD
12 13
13# 14#
14# List of companion chips / MFDs. 15# List of companion chips / MFDs.
@@ -61,3 +62,5 @@ ESPT SH_ESPT
61POLARIS SH_POLARIS 62POLARIS SH_POLARIS
62KFR2R09 SH_KFR2R09 63KFR2R09 SH_KFR2R09
63ECOVEC SH_ECOVEC 64ECOVEC SH_ECOVEC
65APSH4A3A SH_APSH4A3A
66APSH4AD0A SH_APSH4AD0A
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-29 19:39:12 -0500