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authorMagnus Damm <damm@igel.co.jp>2008-10-08 07:42:20 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-10-19 21:34:15 -0400
commit16587c453b90b761c6b883f1d6cc06fe3d455eee (patch)
treeb8fc39c538c01654aa1e54bcc0968c433debe7eb /arch/sh
parent0436ec15aeab7cceb0c1866fefb1edaa9aade28d (diff)
sh: Use sh7723 GPIO on AP325RXA board
This patch enables the GPIO code on AP325RXA and converts the code from register based pinmux configuration to GPIO based pin by pin setup. While at it 2 LEDs and one switch are added and exported to user space. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/boards/Kconfig1
-rw-r--r--arch/sh/boards/board-ap325rxa.c100
2 files changed, 75 insertions, 26 deletions
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 4e37f5c02158..2a059191efef 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -170,6 +170,7 @@ config SH_MIGOR
170config SH_AP325RXA 170config SH_AP325RXA
171 bool "AP-325RXA" 171 bool "AP-325RXA"
172 depends on CPU_SUBTYPE_SH7723 172 depends on CPU_SUBTYPE_SH7723
173 select GENERIC_GPIO
173 help 174 help
174 Renesas "AP-325RXA" support. 175 Renesas "AP-325RXA" support.
175 Compatible with ALGO SYSTEM CO.,LTD. "AP-320A" 176 Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index 7ae8dcddfeb4..1e6daa36e5a7 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -18,11 +18,13 @@
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include <linux/smc911x.h> 20#include <linux/smc911x.h>
21#include <linux/gpio.h>
21#include <media/soc_camera_platform.h> 22#include <media/soc_camera_platform.h>
22#include <media/sh_mobile_ceu.h> 23#include <media/sh_mobile_ceu.h>
23#include <video/sh_mobile_lcdc.h> 24#include <video/sh_mobile_lcdc.h>
24#include <asm/io.h> 25#include <asm/io.h>
25#include <asm/clock.h> 26#include <asm/clock.h>
27#include <asm/sh7723.h>
26 28
27static struct smc911x_platdata smc911x_info = { 29static struct smc911x_platdata smc911x_info = {
28 .flags = SMC911X_USE_32BIT, 30 .flags = SMC911X_USE_32BIT,
@@ -109,17 +111,7 @@ static struct platform_device ap325rxa_nor_flash_device = {
109#define FPGA_LCDREG 0xB4100180 111#define FPGA_LCDREG 0xB4100180
110#define FPGA_BKLREG 0xB4100212 112#define FPGA_BKLREG 0xB4100212
111#define FPGA_LCDREG_VAL 0x0018 113#define FPGA_LCDREG_VAL 0x0018
112#define PORT_PHCR 0xA405010E
113#define PORT_PLCR 0xA4050114
114#define PORT_PMCR 0xA4050116
115#define PORT_PRCR 0xA405011C
116#define PORT_PSCR 0xA405011E
117#define PORT_PZCR 0xA405014C
118#define PORT_HIZCRA 0xA4050158
119#define PORT_MSELCRB 0xA4050182 114#define PORT_MSELCRB 0xA4050182
120#define PORT_PSDR 0xA405013E
121#define PORT_PZDR 0xA405016C
122#define PORT_PSELD 0xA4050154
123 115
124static void ap320_wvga_power_on(void *board_data) 116static void ap320_wvga_power_on(void *board_data)
125{ 117{
@@ -129,8 +121,7 @@ static void ap320_wvga_power_on(void *board_data)
129 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG); 121 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
130 122
131 /* backlight */ 123 /* backlight */
132 ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR); 124 gpio_set_value(GPIO_PTS3, 0);
133 ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR);
134 ctrl_outw(0x100, FPGA_BKLREG); 125 ctrl_outw(0x100, FPGA_BKLREG);
135} 126}
136 127
@@ -298,8 +289,77 @@ static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
298 289
299static int __init ap325rxa_devices_setup(void) 290static int __init ap325rxa_devices_setup(void)
300{ 291{
301 clk_always_enable("mstp200"); /* LCDC */ 292 /* LD3 and LD4 LEDs */
302 clk_always_enable("mstp203"); /* CEU */ 293 gpio_request(GPIO_PTX5, NULL); /* RUN */
294 gpio_direction_output(GPIO_PTX5, 1);
295 gpio_export(GPIO_PTX5, 0);
296
297 gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
298 gpio_direction_output(GPIO_PTX4, 0);
299 gpio_export(GPIO_PTX4, 0);
300
301 /* SW1 input */
302 gpio_request(GPIO_PTF7, NULL); /* MODE */
303 gpio_direction_input(GPIO_PTF7);
304 gpio_export(GPIO_PTF7, 0);
305
306 /* LCDC */
307 clk_always_enable("mstp200");
308 gpio_request(GPIO_FN_LCDD15, NULL);
309 gpio_request(GPIO_FN_LCDD14, NULL);
310 gpio_request(GPIO_FN_LCDD13, NULL);
311 gpio_request(GPIO_FN_LCDD12, NULL);
312 gpio_request(GPIO_FN_LCDD11, NULL);
313 gpio_request(GPIO_FN_LCDD10, NULL);
314 gpio_request(GPIO_FN_LCDD9, NULL);
315 gpio_request(GPIO_FN_LCDD8, NULL);
316 gpio_request(GPIO_FN_LCDD7, NULL);
317 gpio_request(GPIO_FN_LCDD6, NULL);
318 gpio_request(GPIO_FN_LCDD5, NULL);
319 gpio_request(GPIO_FN_LCDD4, NULL);
320 gpio_request(GPIO_FN_LCDD3, NULL);
321 gpio_request(GPIO_FN_LCDD2, NULL);
322 gpio_request(GPIO_FN_LCDD1, NULL);
323 gpio_request(GPIO_FN_LCDD0, NULL);
324 gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
325 gpio_request(GPIO_FN_LCDDCK, NULL);
326 gpio_request(GPIO_FN_LCDVEPWC, NULL);
327 gpio_request(GPIO_FN_LCDVCPWC, NULL);
328 gpio_request(GPIO_FN_LCDVSYN, NULL);
329 gpio_request(GPIO_FN_LCDHSYN, NULL);
330 gpio_request(GPIO_FN_LCDDISP, NULL);
331 gpio_request(GPIO_FN_LCDDON, NULL);
332
333 /* LCD backlight */
334 gpio_request(GPIO_PTS3, NULL);
335 gpio_direction_output(GPIO_PTS3, 1);
336
337 /* CEU */
338 clk_always_enable("mstp203");
339 gpio_request(GPIO_FN_VIO_CLK2, NULL);
340 gpio_request(GPIO_FN_VIO_VD2, NULL);
341 gpio_request(GPIO_FN_VIO_HD2, NULL);
342 gpio_request(GPIO_FN_VIO_FLD, NULL);
343 gpio_request(GPIO_FN_VIO_CKO, NULL);
344 gpio_request(GPIO_FN_VIO_D15, NULL);
345 gpio_request(GPIO_FN_VIO_D14, NULL);
346 gpio_request(GPIO_FN_VIO_D13, NULL);
347 gpio_request(GPIO_FN_VIO_D12, NULL);
348 gpio_request(GPIO_FN_VIO_D11, NULL);
349 gpio_request(GPIO_FN_VIO_D10, NULL);
350 gpio_request(GPIO_FN_VIO_D9, NULL);
351 gpio_request(GPIO_FN_VIO_D8, NULL);
352
353 gpio_request(GPIO_PTZ7, NULL);
354 gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
355 gpio_request(GPIO_PTZ6, NULL);
356 gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
357 gpio_request(GPIO_PTZ5, NULL);
358 gpio_direction_output(GPIO_PTZ5, 1); /* RST_CAM */
359 gpio_request(GPIO_PTZ4, NULL);
360 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
361
362 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
303 363
304 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); 364 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
305 365
@@ -313,18 +373,6 @@ device_initcall(ap325rxa_devices_setup);
313 373
314static void __init ap325rxa_setup(char **cmdline_p) 374static void __init ap325rxa_setup(char **cmdline_p)
315{ 375{
316 /* LCDC configuration */
317 ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR);
318 ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR);
319 ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR);
320 ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR);
321 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA);
322
323 /* CEU */
324 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
325 ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD);
326 ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR);
327 ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR);
328} 376}
329 377
330static struct sh_machine_vector mv_ap325rxa __initmv = { 378static struct sh_machine_vector mv_ap325rxa __initmv = {