diff options
author | Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> | 2008-09-09 04:17:42 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-10-21 05:03:33 -0400 |
commit | 908978acbe2fb0e9aedaded5119dc663ae0d7015 (patch) | |
tree | 61af2d0e7d61638207f7c18d82248a1e58b9c3ca /arch/sh | |
parent | 550109378450e7982101f299d41a80e8efc759ea (diff) |
sh: add support FLCTL for ap325rxa board
This patch adds platform_device for sh_flctl driver, NAND Flash
simple partition, and GPIO setting.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r-- | arch/sh/boards/board-ap325rxa.c | 61 |
1 files changed, 55 insertions, 6 deletions
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c index 7c7874e6ac36..a3783ee6b078 100644 --- a/arch/sh/boards/board-ap325rxa.c +++ b/arch/sh/boards/board-ap325rxa.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/mtd/physmap.h> | 17 | #include <linux/mtd/physmap.h> |
18 | #include <linux/mtd/sh_flctl.h> | ||
18 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
19 | #include <linux/i2c.h> | 20 | #include <linux/i2c.h> |
20 | #include <linux/smc911x.h> | 21 | #include <linux/smc911x.h> |
@@ -108,10 +109,50 @@ static struct platform_device ap325rxa_nor_flash_device = { | |||
108 | }, | 109 | }, |
109 | }; | 110 | }; |
110 | 111 | ||
112 | static struct mtd_partition nand_partition_info[] = { | ||
113 | { | ||
114 | .name = "nand_data", | ||
115 | .offset = 0, | ||
116 | .size = MTDPART_SIZ_FULL, | ||
117 | }, | ||
118 | }; | ||
119 | |||
120 | static struct resource nand_flash_resources[] = { | ||
121 | [0] = { | ||
122 | .start = 0xa4530000, | ||
123 | .end = 0xa45300ff, | ||
124 | .flags = IORESOURCE_MEM, | ||
125 | } | ||
126 | }; | ||
127 | |||
128 | static struct sh_flctl_platform_data nand_flash_data = { | ||
129 | .parts = nand_partition_info, | ||
130 | .nr_parts = ARRAY_SIZE(nand_partition_info), | ||
131 | .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E, | ||
132 | .has_hwecc = 1, | ||
133 | }; | ||
134 | |||
135 | static struct platform_device nand_flash_device = { | ||
136 | .name = "sh_flctl", | ||
137 | .resource = nand_flash_resources, | ||
138 | .num_resources = ARRAY_SIZE(nand_flash_resources), | ||
139 | .dev = { | ||
140 | .platform_data = &nand_flash_data, | ||
141 | }, | ||
142 | }; | ||
143 | |||
111 | #define FPGA_LCDREG 0xB4100180 | 144 | #define FPGA_LCDREG 0xB4100180 |
112 | #define FPGA_BKLREG 0xB4100212 | 145 | #define FPGA_BKLREG 0xB4100212 |
113 | #define FPGA_LCDREG_VAL 0x0018 | 146 | #define FPGA_LCDREG_VAL 0x0018 |
114 | #define PORT_MSELCRB 0xA4050182 | 147 | #define PORT_MSELCRB 0xA4050182 |
148 | #define PORT_PUCR 0xA4050142 | ||
149 | #define PORT_PVCR 0xA4050144 | ||
150 | #define PORT_PXCR 0xA4050148 | ||
151 | #define PORT_HIZCRC 0xA405015C | ||
152 | #define PORT_DRVCRA 0xA405018A | ||
153 | #define PORT_DRVCRB 0xA405018C | ||
154 | #define PORT_PXDR 0xA4050168 | ||
155 | #define PORT_PSELC 0xA4050152 | ||
115 | 156 | ||
116 | static void ap320_wvga_power_on(void *board_data) | 157 | static void ap320_wvga_power_on(void *board_data) |
117 | { | 158 | { |
@@ -282,6 +323,7 @@ static struct platform_device *ap325rxa_devices[] __initdata = { | |||
282 | #ifdef CONFIG_I2C | 323 | #ifdef CONFIG_I2C |
283 | &camera_device, | 324 | &camera_device, |
284 | #endif | 325 | #endif |
326 | &nand_flash_device, | ||
285 | }; | 327 | }; |
286 | 328 | ||
287 | static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = { | 329 | static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = { |
@@ -364,21 +406,28 @@ static int __init ap325rxa_devices_setup(void) | |||
364 | 406 | ||
365 | ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); | 407 | ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); |
366 | 408 | ||
409 | /* FLCTL */ | ||
410 | ctrl_outw(0, PORT_PUCR); | ||
411 | ctrl_outw(0, PORT_PVCR); | ||
412 | ctrl_outw(0, PORT_PSELC); | ||
413 | |||
414 | ctrl_outw(0, PORT_HIZCRC); | ||
415 | ctrl_outw(0xFFFF, PORT_DRVCRA); | ||
416 | ctrl_outw(0xFFFF, PORT_DRVCRB); | ||
417 | |||
418 | ctrl_outw((ctrl_inw(PORT_PXCR) & 0x3fff) | 0x4000, PORT_PXCR); | ||
419 | ctrl_outb(0x80, PORT_PXDR); | ||
420 | |||
367 | platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); | 421 | platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); |
368 | 422 | ||
369 | i2c_register_board_info(0, ap325rxa_i2c_devices, | 423 | i2c_register_board_info(0, ap325rxa_i2c_devices, |
370 | ARRAY_SIZE(ap325rxa_i2c_devices)); | 424 | ARRAY_SIZE(ap325rxa_i2c_devices)); |
371 | 425 | ||
372 | return platform_add_devices(ap325rxa_devices, | 426 | return platform_add_devices(ap325rxa_devices, |
373 | ARRAY_SIZE(ap325rxa_devices)); | 427 | ARRAY_SIZE(ap325rxa_devices)); |
374 | } | 428 | } |
375 | device_initcall(ap325rxa_devices_setup); | 429 | device_initcall(ap325rxa_devices_setup); |
376 | 430 | ||
377 | static void __init ap325rxa_setup(char **cmdline_p) | ||
378 | { | ||
379 | } | ||
380 | |||
381 | static struct sh_machine_vector mv_ap325rxa __initmv = { | 431 | static struct sh_machine_vector mv_ap325rxa __initmv = { |
382 | .mv_name = "AP-325RXA", | 432 | .mv_name = "AP-325RXA", |
383 | .mv_setup = ap325rxa_setup, | ||
384 | }; | 433 | }; |