aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh
diff options
context:
space:
mode:
authorPaul Mundt <lethal@linux-sh.org>2008-08-03 23:51:06 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-08-03 23:51:06 -0400
commit6a9545bd95e88d61df942b9087cb59b8c7a6dc56 (patch)
treec89ca9fa397b92a19a07a6d000e9e1cbf25016ef /arch/sh
parent617870632de6739fca0893f3e6648e9ae1bd0ddb (diff)
sh: Fix up broken kerneldoc comments.
These were completely unparseable, so fix them up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/include/asm/tlb_64.h12
-rw-r--r--arch/sh/kernel/cpu/sh4/sq.c2
-rw-r--r--arch/sh/mm/tlb-sh5.c20
3 files changed, 10 insertions, 24 deletions
diff --git a/arch/sh/include/asm/tlb_64.h b/arch/sh/include/asm/tlb_64.h
index 0a96f3af69e3..ef0ae2a28f23 100644
--- a/arch/sh/include/asm/tlb_64.h
+++ b/arch/sh/include/asm/tlb_64.h
@@ -21,11 +21,9 @@
21#ifndef __ASSEMBLY__ 21#ifndef __ASSEMBLY__
22 22
23/** 23/**
24 * for_each_dtlb_entry 24 * for_each_dtlb_entry - Iterate over free (non-wired) DTLB entries
25 * 25 *
26 * @tlb: TLB entry 26 * @tlb: TLB entry
27 *
28 * Iterate over free (non-wired) DTLB entries
29 */ 27 */
30#define for_each_dtlb_entry(tlb) \ 28#define for_each_dtlb_entry(tlb) \
31 for (tlb = cpu_data->dtlb.first; \ 29 for (tlb = cpu_data->dtlb.first; \
@@ -33,11 +31,9 @@
33 tlb += cpu_data->dtlb.step) 31 tlb += cpu_data->dtlb.step)
34 32
35/** 33/**
36 * for_each_itlb_entry 34 * for_each_itlb_entry - Iterate over free (non-wired) ITLB entries
37 * 35 *
38 * @tlb: TLB entry 36 * @tlb: TLB entry
39 *
40 * Iterate over free (non-wired) ITLB entries
41 */ 37 */
42#define for_each_itlb_entry(tlb) \ 38#define for_each_itlb_entry(tlb) \
43 for (tlb = cpu_data->itlb.first; \ 39 for (tlb = cpu_data->itlb.first; \
@@ -45,11 +41,9 @@
45 tlb += cpu_data->itlb.step) 41 tlb += cpu_data->itlb.step)
46 42
47/** 43/**
48 * __flush_tlb_slot 44 * __flush_tlb_slot - Flushes TLB slot @slot.
49 * 45 *
50 * @slot: Address of TLB slot. 46 * @slot: Address of TLB slot.
51 *
52 * Flushes TLB slot @slot.
53 */ 47 */
54static inline void __flush_tlb_slot(unsigned long long slot) 48static inline void __flush_tlb_slot(unsigned long long slot)
55{ 49{
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index dcdf959a3d44..8a8a993f55ea 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -199,7 +199,7 @@ EXPORT_SYMBOL(sq_remap);
199 199
200/** 200/**
201 * sq_unmap - Unmap a Store Queue allocation 201 * sq_unmap - Unmap a Store Queue allocation
202 * @map: Pre-allocated Store Queue mapping. 202 * @vaddr: Pre-allocated Store Queue mapping.
203 * 203 *
204 * Unmaps the store queue allocation @map that was previously created by 204 * Unmaps the store queue allocation @map that was previously created by
205 * sq_remap(). Also frees up the pte that was previously inserted into 205 * sq_remap(). Also frees up the pte that was previously inserted into
diff --git a/arch/sh/mm/tlb-sh5.c b/arch/sh/mm/tlb-sh5.c
index f34274a1ded3..dae131243bcc 100644
--- a/arch/sh/mm/tlb-sh5.c
+++ b/arch/sh/mm/tlb-sh5.c
@@ -15,9 +15,7 @@
15#include <asm/mmu_context.h> 15#include <asm/mmu_context.h>
16 16
17/** 17/**
18 * sh64_tlb_init 18 * sh64_tlb_init - Perform initial setup for the DTLB and ITLB.
19 *
20 * Perform initial setup for the DTLB and ITLB.
21 */ 19 */
22int __init sh64_tlb_init(void) 20int __init sh64_tlb_init(void)
23{ 21{
@@ -46,9 +44,7 @@ int __init sh64_tlb_init(void)
46} 44}
47 45
48/** 46/**
49 * sh64_next_free_dtlb_entry 47 * sh64_next_free_dtlb_entry - Find the next available DTLB entry
50 *
51 * Find the next available DTLB entry
52 */ 48 */
53unsigned long long sh64_next_free_dtlb_entry(void) 49unsigned long long sh64_next_free_dtlb_entry(void)
54{ 50{
@@ -56,9 +52,7 @@ unsigned long long sh64_next_free_dtlb_entry(void)
56} 52}
57 53
58/** 54/**
59 * sh64_get_wired_dtlb_entry 55 * sh64_get_wired_dtlb_entry - Allocate a wired (locked-in) entry in the DTLB
60 *
61 * Allocate a wired (locked-in) entry in the DTLB
62 */ 56 */
63unsigned long long sh64_get_wired_dtlb_entry(void) 57unsigned long long sh64_get_wired_dtlb_entry(void)
64{ 58{
@@ -71,12 +65,10 @@ unsigned long long sh64_get_wired_dtlb_entry(void)
71} 65}
72 66
73/** 67/**
74 * sh64_put_wired_dtlb_entry 68 * sh64_put_wired_dtlb_entry - Free a wired (locked-in) entry in the DTLB.
75 * 69 *
76 * @entry: Address of TLB slot. 70 * @entry: Address of TLB slot.
77 * 71 *
78 * Free a wired (locked-in) entry in the DTLB.
79 *
80 * Works like a stack, last one to allocate must be first one to free. 72 * Works like a stack, last one to allocate must be first one to free.
81 */ 73 */
82int sh64_put_wired_dtlb_entry(unsigned long long entry) 74int sh64_put_wired_dtlb_entry(unsigned long long entry)
@@ -115,7 +107,7 @@ int sh64_put_wired_dtlb_entry(unsigned long long entry)
115} 107}
116 108
117/** 109/**
118 * sh64_setup_tlb_slot 110 * sh64_setup_tlb_slot - Load up a translation in a wired slot.
119 * 111 *
120 * @config_addr: Address of TLB slot. 112 * @config_addr: Address of TLB slot.
121 * @eaddr: Virtual address. 113 * @eaddr: Virtual address.
@@ -154,7 +146,7 @@ inline void sh64_setup_tlb_slot(unsigned long long config_addr,
154} 146}
155 147
156/** 148/**
157 * sh64_teardown_tlb_slot 149 * sh64_teardown_tlb_slot - Teardown a translation.
158 * 150 *
159 * @config_addr: Address of TLB slot. 151 * @config_addr: Address of TLB slot.
160 * 152 *