diff options
author | Magnus Damm <damm@igel.co.jp> | 2009-05-28 08:52:29 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-06-01 05:05:37 -0400 |
commit | 6881e8bf3d86b23dd124134fae113ebd05fae08a (patch) | |
tree | 3945557723d26014b6071ceaf5729952cec8a8e9 /arch/sh | |
parent | 98fbe45bea77c1804eae0e71f27673db1824a2a8 (diff) |
sh: shared mstp32 clock code
Add shared 32-bit module stop bit clock support.
Processor specific code can use SH_CLK_MSTP32()
to initialize module stop bit clocks, and then
use sh_clk_mstp32() for registration.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r-- | arch/sh/include/asm/clock.h | 13 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/clock-cpg.c | 35 |
2 files changed, 48 insertions, 0 deletions
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h index aa9480d4aa05..f43d3e72d266 100644 --- a/arch/sh/include/asm/clock.h +++ b/arch/sh/include/asm/clock.h | |||
@@ -117,4 +117,17 @@ long clk_rate_table_round(struct clk *clk, | |||
117 | struct cpufreq_frequency_table *freq_table, | 117 | struct cpufreq_frequency_table *freq_table, |
118 | unsigned long rate); | 118 | unsigned long rate); |
119 | 119 | ||
120 | #define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg, \ | ||
121 | _enable_bit, _flags) \ | ||
122 | { \ | ||
123 | .name = _name, \ | ||
124 | .id = _id, \ | ||
125 | .parent = _parent, \ | ||
126 | .enable_reg = (void __iomem *)_enable_reg, \ | ||
127 | .enable_bit = _enable_bit, \ | ||
128 | .flags = _flags, \ | ||
129 | } | ||
130 | |||
131 | int sh_clk_mstp32_register(struct clk *clks, int nr); | ||
132 | |||
120 | #endif /* __ASM_SH_CLOCK_H */ | 133 | #endif /* __ASM_SH_CLOCK_H */ |
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c index b78c237ab366..72228d2945ac 100644 --- a/arch/sh/kernel/cpu/clock-cpg.c +++ b/arch/sh/kernel/cpu/clock-cpg.c | |||
@@ -1,7 +1,42 @@ | |||
1 | #include <linux/clk.h> | 1 | #include <linux/clk.h> |
2 | #include <linux/compiler.h> | 2 | #include <linux/compiler.h> |
3 | #include <linux/io.h> | ||
3 | #include <asm/clock.h> | 4 | #include <asm/clock.h> |
4 | 5 | ||
6 | static int sh_clk_mstp32_enable(struct clk *clk) | ||
7 | { | ||
8 | __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit), | ||
9 | clk->enable_reg); | ||
10 | return 0; | ||
11 | } | ||
12 | |||
13 | static void sh_clk_mstp32_disable(struct clk *clk) | ||
14 | { | ||
15 | __raw_writel(__raw_readl(clk->enable_reg) | (1 << clk->enable_bit), | ||
16 | clk->enable_reg); | ||
17 | } | ||
18 | |||
19 | static struct clk_ops sh_clk_mstp32_clk_ops = { | ||
20 | .enable = sh_clk_mstp32_enable, | ||
21 | .disable = sh_clk_mstp32_disable, | ||
22 | .recalc = followparent_recalc, | ||
23 | }; | ||
24 | |||
25 | int __init sh_clk_mstp32_register(struct clk *clks, int nr) | ||
26 | { | ||
27 | struct clk *clkp; | ||
28 | int ret = 0; | ||
29 | int k; | ||
30 | |||
31 | for (k = 0; !ret && (k < nr); k++) { | ||
32 | clkp = clks + k; | ||
33 | clkp->ops = &sh_clk_mstp32_clk_ops; | ||
34 | ret |= clk_register(clkp); | ||
35 | } | ||
36 | |||
37 | return ret; | ||
38 | } | ||
39 | |||
5 | #ifdef CONFIG_SH_CLK_CPG_LEGACY | 40 | #ifdef CONFIG_SH_CLK_CPG_LEGACY |
6 | static struct clk master_clk = { | 41 | static struct clk master_clk = { |
7 | .name = "master_clk", | 42 | .name = "master_clk", |