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authorPaul Mundt <lethal@linux-sh.org>2008-09-17 10:24:02 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-09-17 10:24:02 -0400
commit81b669952ed5fe0d6f65f8b9a97d1fdeac93ff10 (patch)
tree219d4c3b78017d2df96457136d61948ccac267ec /arch/sh
parent8a80a5e9e89cf3aacf8165dd34b40c7c3fe91b4d (diff)
sh: Consolidate struct sh_cpuinfo definitions across _32/_64 split.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/include/asm/processor.h40
-rw-r--r--arch/sh/include/asm/processor_32.h19
-rw-r--r--arch/sh/include/asm/processor_64.h41
3 files changed, 39 insertions, 61 deletions
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 58e2be55ab93..693364a20ad7 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -3,6 +3,7 @@
3 3
4#include <asm/cpu-features.h> 4#include <asm/cpu-features.h>
5#include <asm/segment.h> 5#include <asm/segment.h>
6#include <asm/cache.h>
6 7
7#ifndef __ASSEMBLY__ 8#ifndef __ASSEMBLY__
8/* 9/*
@@ -43,8 +44,45 @@ enum cpu_type {
43 CPU_SH_NONE 44 CPU_SH_NONE
44}; 45};
45 46
47/*
48 * TLB information structure
49 *
50 * Defined for both I and D tlb, per-processor.
51 */
52struct tlb_info {
53 unsigned long long next;
54 unsigned long long first;
55 unsigned long long last;
56
57 unsigned int entries;
58 unsigned int step;
59
60 unsigned long flags;
61};
62
63struct sh_cpuinfo {
64 unsigned int type;
65 int cut_major, cut_minor;
66 unsigned long loops_per_jiffy;
67 unsigned long asid_cache;
68
69 struct cache_info icache; /* Primary I-cache */
70 struct cache_info dcache; /* Primary D-cache */
71 struct cache_info scache; /* Secondary cache */
72
73 /* TLB info */
74 struct tlb_info itlb;
75 struct tlb_info dtlb;
76
77 unsigned long flags;
78} __attribute__ ((aligned(L1_CACHE_BYTES)));
79
80extern struct sh_cpuinfo cpu_data[];
81#define boot_cpu_data cpu_data[0]
82#define current_cpu_data cpu_data[smp_processor_id()]
83#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
84
46/* Forward decl */ 85/* Forward decl */
47struct sh_cpuinfo;
48struct seq_operations; 86struct seq_operations;
49 87
50extern struct pt_regs fake_swapper_regs; 88extern struct pt_regs fake_swapper_regs;
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index 1cd3a144c85c..a46a0207e977 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -13,7 +13,6 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <asm/page.h> 14#include <asm/page.h>
15#include <asm/types.h> 15#include <asm/types.h>
16#include <asm/cache.h>
17#include <asm/ptrace.h> 16#include <asm/ptrace.h>
18 17
19/* 18/*
@@ -27,24 +26,6 @@
27#define CCN_CVR 0xff000040 26#define CCN_CVR 0xff000040
28#define CCN_PRR 0xff000044 27#define CCN_PRR 0xff000044
29 28
30struct sh_cpuinfo {
31 unsigned int type;
32 int cut_major, cut_minor;
33 unsigned long loops_per_jiffy;
34 unsigned long asid_cache;
35
36 struct cache_info icache; /* Primary I-cache */
37 struct cache_info dcache; /* Primary D-cache */
38 struct cache_info scache; /* Secondary cache */
39
40 unsigned long flags;
41} __attribute__ ((aligned(L1_CACHE_BYTES)));
42
43extern struct sh_cpuinfo cpu_data[];
44#define boot_cpu_data cpu_data[0]
45#define current_cpu_data cpu_data[smp_processor_id()]
46#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
47
48asmlinkage void __init sh_cpu_init(void); 29asmlinkage void __init sh_cpu_init(void);
49 30
50/* 31/*
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h
index ae19839f1d97..b0b4824dfc4c 100644
--- a/arch/sh/include/asm/processor_64.h
+++ b/arch/sh/include/asm/processor_64.h
@@ -17,7 +17,6 @@
17#include <linux/compiler.h> 17#include <linux/compiler.h>
18#include <asm/page.h> 18#include <asm/page.h>
19#include <asm/types.h> 19#include <asm/types.h>
20#include <asm/cache.h>
21#include <asm/ptrace.h> 20#include <asm/ptrace.h>
22#include <cpu/registers.h> 21#include <cpu/registers.h>
23 22
@@ -36,46 +35,6 @@ __asm__("gettr tr0, %1\n\t" \
36 : "1" (__dummy)); \ 35 : "1" (__dummy)); \
37pc; }) 36pc; })
38 37
39/*
40 * TLB information structure
41 *
42 * Defined for both I and D tlb, per-processor.
43 */
44struct tlb_info {
45 unsigned long long next;
46 unsigned long long first;
47 unsigned long long last;
48
49 unsigned int entries;
50 unsigned int step;
51
52 unsigned long flags;
53};
54
55struct sh_cpuinfo {
56 enum cpu_type type;
57 unsigned long loops_per_jiffy;
58 unsigned long asid_cache;
59
60 unsigned int cpu_clock, master_clock, bus_clock, module_clock;
61
62 /* Cache info */
63 struct cache_info icache;
64 struct cache_info dcache;
65 struct cache_info scache;
66
67 /* TLB info */
68 struct tlb_info itlb;
69 struct tlb_info dtlb;
70
71 unsigned long flags;
72};
73
74extern struct sh_cpuinfo cpu_data[];
75#define boot_cpu_data cpu_data[0]
76#define current_cpu_data cpu_data[smp_processor_id()]
77#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
78
79#endif 38#endif
80 39
81/* 40/*