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authorPaul Mundt <lethal@linux-sh.org>2011-01-13 01:21:27 -0500
committerPaul Mundt <lethal@linux-sh.org>2011-01-13 01:21:27 -0500
commitef7fc9026fe6adef13870c6b2cb4642b6193af67 (patch)
tree6f41f996de6e76161fdfc60a197ec42f0aa0ec7d /arch/sh
parentfac6c2a891a3e7255e4440f09a4c7da954043ba9 (diff)
parentf43dc23d5ea91fca257be02138a255f02d98e806 (diff)
Merge branch 'common/serial-rework' into sh-latest
Diffstat (limited to 'arch/sh')
-rw-r--r--arch/sh/kernel/cpu/sh2/setup-sh7619.c6
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-mxg.c2
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7201.c16
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7203.c8
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c8
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c5
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c6
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7710.c6
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c6
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh4-202.c2
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c36
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7343.c8
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c6
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c20
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7780.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7785.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7786.c12
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-shx3.c6
-rw-r--r--arch/sh/kernel/cpu/sh5/setup-sh5.c2
25 files changed, 214 insertions, 11 deletions
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index c3638516bffc..0f8befccf9fa 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -62,6 +62,8 @@ static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
62static struct plat_sci_port scif0_platform_data = { 62static struct plat_sci_port scif0_platform_data = {
63 .mapbase = 0xf8400000, 63 .mapbase = 0xf8400000,
64 .flags = UPF_BOOT_AUTOCONF, 64 .flags = UPF_BOOT_AUTOCONF,
65 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
66 .scbrr_algo_id = SCBRR_ALGO_2,
65 .type = PORT_SCIF, 67 .type = PORT_SCIF,
66 .irqs = { 88, 88, 88, 88 }, 68 .irqs = { 88, 88, 88, 88 },
67}; 69};
@@ -77,6 +79,8 @@ static struct platform_device scif0_device = {
77static struct plat_sci_port scif1_platform_data = { 79static struct plat_sci_port scif1_platform_data = {
78 .mapbase = 0xf8410000, 80 .mapbase = 0xf8410000,
79 .flags = UPF_BOOT_AUTOCONF, 81 .flags = UPF_BOOT_AUTOCONF,
82 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
83 .scbrr_algo_id = SCBRR_ALGO_2,
80 .type = PORT_SCIF, 84 .type = PORT_SCIF,
81 .irqs = { 92, 92, 92, 92 }, 85 .irqs = { 92, 92, 92, 92 },
82}; 86};
@@ -92,6 +96,8 @@ static struct platform_device scif1_device = {
92static struct plat_sci_port scif2_platform_data = { 96static struct plat_sci_port scif2_platform_data = {
93 .mapbase = 0xf8420000, 97 .mapbase = 0xf8420000,
94 .flags = UPF_BOOT_AUTOCONF, 98 .flags = UPF_BOOT_AUTOCONF,
99 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
100 .scbrr_algo_id = SCBRR_ALGO_2,
95 .type = PORT_SCIF, 101 .type = PORT_SCIF,
96 .irqs = { 96, 96, 96, 96 }, 102 .irqs = { 96, 96, 96, 96 },
97}; 103};
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index 6c96ea02bf8d..949bf2bac28c 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -201,6 +201,8 @@ static struct platform_device mtu2_2_device = {
201static struct plat_sci_port scif0_platform_data = { 201static struct plat_sci_port scif0_platform_data = {
202 .mapbase = 0xff804000, 202 .mapbase = 0xff804000,
203 .flags = UPF_BOOT_AUTOCONF, 203 .flags = UPF_BOOT_AUTOCONF,
204 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
205 .scbrr_algo_id = SCBRR_ALGO_2,
204 .type = PORT_SCIF, 206 .type = PORT_SCIF,
205 .irqs = { 220, 220, 220, 220 }, 207 .irqs = { 220, 220, 220, 220 },
206}; 208};
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index d08bf4c07d60..9df558dcdb86 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -180,6 +180,8 @@ static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
180static struct plat_sci_port scif0_platform_data = { 180static struct plat_sci_port scif0_platform_data = {
181 .mapbase = 0xfffe8000, 181 .mapbase = 0xfffe8000,
182 .flags = UPF_BOOT_AUTOCONF, 182 .flags = UPF_BOOT_AUTOCONF,
183 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
184 .scbrr_algo_id = SCBRR_ALGO_2,
183 .type = PORT_SCIF, 185 .type = PORT_SCIF,
184 .irqs = { 180, 180, 180, 180 } 186 .irqs = { 180, 180, 180, 180 }
185}; 187};
@@ -195,6 +197,8 @@ static struct platform_device scif0_device = {
195static struct plat_sci_port scif1_platform_data = { 197static struct plat_sci_port scif1_platform_data = {
196 .mapbase = 0xfffe8800, 198 .mapbase = 0xfffe8800,
197 .flags = UPF_BOOT_AUTOCONF, 199 .flags = UPF_BOOT_AUTOCONF,
200 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
201 .scbrr_algo_id = SCBRR_ALGO_2,
198 .type = PORT_SCIF, 202 .type = PORT_SCIF,
199 .irqs = { 184, 184, 184, 184 } 203 .irqs = { 184, 184, 184, 184 }
200}; 204};
@@ -210,6 +214,8 @@ static struct platform_device scif1_device = {
210static struct plat_sci_port scif2_platform_data = { 214static struct plat_sci_port scif2_platform_data = {
211 .mapbase = 0xfffe9000, 215 .mapbase = 0xfffe9000,
212 .flags = UPF_BOOT_AUTOCONF, 216 .flags = UPF_BOOT_AUTOCONF,
217 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
218 .scbrr_algo_id = SCBRR_ALGO_2,
213 .type = PORT_SCIF, 219 .type = PORT_SCIF,
214 .irqs = { 188, 188, 188, 188 } 220 .irqs = { 188, 188, 188, 188 }
215}; 221};
@@ -225,6 +231,8 @@ static struct platform_device scif2_device = {
225static struct plat_sci_port scif3_platform_data = { 231static struct plat_sci_port scif3_platform_data = {
226 .mapbase = 0xfffe9800, 232 .mapbase = 0xfffe9800,
227 .flags = UPF_BOOT_AUTOCONF, 233 .flags = UPF_BOOT_AUTOCONF,
234 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
235 .scbrr_algo_id = SCBRR_ALGO_2,
228 .type = PORT_SCIF, 236 .type = PORT_SCIF,
229 .irqs = { 192, 192, 192, 192 } 237 .irqs = { 192, 192, 192, 192 }
230}; 238};
@@ -240,6 +248,8 @@ static struct platform_device scif3_device = {
240static struct plat_sci_port scif4_platform_data = { 248static struct plat_sci_port scif4_platform_data = {
241 .mapbase = 0xfffea000, 249 .mapbase = 0xfffea000,
242 .flags = UPF_BOOT_AUTOCONF, 250 .flags = UPF_BOOT_AUTOCONF,
251 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
252 .scbrr_algo_id = SCBRR_ALGO_2,
243 .type = PORT_SCIF, 253 .type = PORT_SCIF,
244 .irqs = { 196, 196, 196, 196 } 254 .irqs = { 196, 196, 196, 196 }
245}; 255};
@@ -255,6 +265,8 @@ static struct platform_device scif4_device = {
255static struct plat_sci_port scif5_platform_data = { 265static struct plat_sci_port scif5_platform_data = {
256 .mapbase = 0xfffea800, 266 .mapbase = 0xfffea800,
257 .flags = UPF_BOOT_AUTOCONF, 267 .flags = UPF_BOOT_AUTOCONF,
268 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
269 .scbrr_algo_id = SCBRR_ALGO_2,
258 .type = PORT_SCIF, 270 .type = PORT_SCIF,
259 .irqs = { 200, 200, 200, 200 } 271 .irqs = { 200, 200, 200, 200 }
260}; 272};
@@ -270,6 +282,8 @@ static struct platform_device scif5_device = {
270static struct plat_sci_port scif6_platform_data = { 282static struct plat_sci_port scif6_platform_data = {
271 .mapbase = 0xfffeb000, 283 .mapbase = 0xfffeb000,
272 .flags = UPF_BOOT_AUTOCONF, 284 .flags = UPF_BOOT_AUTOCONF,
285 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
286 .scbrr_algo_id = SCBRR_ALGO_2,
273 .type = PORT_SCIF, 287 .type = PORT_SCIF,
274 .irqs = { 204, 204, 204, 204 } 288 .irqs = { 204, 204, 204, 204 }
275}; 289};
@@ -285,6 +299,8 @@ static struct platform_device scif6_device = {
285static struct plat_sci_port scif7_platform_data = { 299static struct plat_sci_port scif7_platform_data = {
286 .mapbase = 0xfffeb800, 300 .mapbase = 0xfffeb800,
287 .flags = UPF_BOOT_AUTOCONF, 301 .flags = UPF_BOOT_AUTOCONF,
302 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
303 .scbrr_algo_id = SCBRR_ALGO_2,
288 .type = PORT_SCIF, 304 .type = PORT_SCIF,
289 .irqs = { 208, 208, 208, 208 } 305 .irqs = { 208, 208, 208, 208 }
290}; 306};
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index 832f401b5860..a43124e608c3 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -176,6 +176,8 @@ static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
176static struct plat_sci_port scif0_platform_data = { 176static struct plat_sci_port scif0_platform_data = {
177 .mapbase = 0xfffe8000, 177 .mapbase = 0xfffe8000,
178 .flags = UPF_BOOT_AUTOCONF, 178 .flags = UPF_BOOT_AUTOCONF,
179 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
180 .scbrr_algo_id = SCBRR_ALGO_2,
179 .type = PORT_SCIF, 181 .type = PORT_SCIF,
180 .irqs = { 192, 192, 192, 192 }, 182 .irqs = { 192, 192, 192, 192 },
181}; 183};
@@ -191,6 +193,8 @@ static struct platform_device scif0_device = {
191static struct plat_sci_port scif1_platform_data = { 193static struct plat_sci_port scif1_platform_data = {
192 .mapbase = 0xfffe8800, 194 .mapbase = 0xfffe8800,
193 .flags = UPF_BOOT_AUTOCONF, 195 .flags = UPF_BOOT_AUTOCONF,
196 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
197 .scbrr_algo_id = SCBRR_ALGO_2,
194 .type = PORT_SCIF, 198 .type = PORT_SCIF,
195 .irqs = { 196, 196, 196, 196 }, 199 .irqs = { 196, 196, 196, 196 },
196}; 200};
@@ -206,6 +210,8 @@ static struct platform_device scif1_device = {
206static struct plat_sci_port scif2_platform_data = { 210static struct plat_sci_port scif2_platform_data = {
207 .mapbase = 0xfffe9000, 211 .mapbase = 0xfffe9000,
208 .flags = UPF_BOOT_AUTOCONF, 212 .flags = UPF_BOOT_AUTOCONF,
213 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
214 .scbrr_algo_id = SCBRR_ALGO_2,
209 .type = PORT_SCIF, 215 .type = PORT_SCIF,
210 .irqs = { 200, 200, 200, 200 }, 216 .irqs = { 200, 200, 200, 200 },
211}; 217};
@@ -221,6 +227,8 @@ static struct platform_device scif2_device = {
221static struct plat_sci_port scif3_platform_data = { 227static struct plat_sci_port scif3_platform_data = {
222 .mapbase = 0xfffe9800, 228 .mapbase = 0xfffe9800,
223 .flags = UPF_BOOT_AUTOCONF, 229 .flags = UPF_BOOT_AUTOCONF,
230 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
231 .scbrr_algo_id = SCBRR_ALGO_2,
224 .type = PORT_SCIF, 232 .type = PORT_SCIF,
225 .irqs = { 204, 204, 204, 204 }, 233 .irqs = { 204, 204, 204, 204 },
226}; 234};
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index dc47b04e1049..5d14f849aea3 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -136,6 +136,8 @@ static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
136static struct plat_sci_port scif0_platform_data = { 136static struct plat_sci_port scif0_platform_data = {
137 .mapbase = 0xfffe8000, 137 .mapbase = 0xfffe8000,
138 .flags = UPF_BOOT_AUTOCONF, 138 .flags = UPF_BOOT_AUTOCONF,
139 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
140 .scbrr_algo_id = SCBRR_ALGO_2,
139 .type = PORT_SCIF, 141 .type = PORT_SCIF,
140 .irqs = { 240, 240, 240, 240 }, 142 .irqs = { 240, 240, 240, 240 },
141}; 143};
@@ -151,6 +153,8 @@ static struct platform_device scif0_device = {
151static struct plat_sci_port scif1_platform_data = { 153static struct plat_sci_port scif1_platform_data = {
152 .mapbase = 0xfffe8800, 154 .mapbase = 0xfffe8800,
153 .flags = UPF_BOOT_AUTOCONF, 155 .flags = UPF_BOOT_AUTOCONF,
156 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
157 .scbrr_algo_id = SCBRR_ALGO_2,
154 .type = PORT_SCIF, 158 .type = PORT_SCIF,
155 .irqs = { 244, 244, 244, 244 }, 159 .irqs = { 244, 244, 244, 244 },
156}; 160};
@@ -166,6 +170,8 @@ static struct platform_device scif1_device = {
166static struct plat_sci_port scif2_platform_data = { 170static struct plat_sci_port scif2_platform_data = {
167 .mapbase = 0xfffe9000, 171 .mapbase = 0xfffe9000,
168 .flags = UPF_BOOT_AUTOCONF, 172 .flags = UPF_BOOT_AUTOCONF,
173 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
174 .scbrr_algo_id = SCBRR_ALGO_2,
169 .type = PORT_SCIF, 175 .type = PORT_SCIF,
170 .irqs = { 248, 248, 248, 248 }, 176 .irqs = { 248, 248, 248, 248 },
171}; 177};
@@ -181,6 +187,8 @@ static struct platform_device scif2_device = {
181static struct plat_sci_port scif3_platform_data = { 187static struct plat_sci_port scif3_platform_data = {
182 .mapbase = 0xfffe9800, 188 .mapbase = 0xfffe9800,
183 .flags = UPF_BOOT_AUTOCONF, 189 .flags = UPF_BOOT_AUTOCONF,
190 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
191 .scbrr_algo_id = SCBRR_ALGO_2,
184 .type = PORT_SCIF, 192 .type = PORT_SCIF,
185 .irqs = { 252, 252, 252, 252 }, 193 .irqs = { 252, 252, 252, 252 },
186}; 194};
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index baadd7f54d94..cd2e702feb7e 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -70,6 +70,9 @@ static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
70static struct plat_sci_port scif0_platform_data = { 70static struct plat_sci_port scif0_platform_data = {
71 .mapbase = 0xa4410000, 71 .mapbase = 0xa4410000,
72 .flags = UPF_BOOT_AUTOCONF, 72 .flags = UPF_BOOT_AUTOCONF,
73 .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE |
74 SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0,
75 .scbrr_algo_id = SCBRR_ALGO_4,
73 .type = PORT_SCIF, 76 .type = PORT_SCIF,
74 .irqs = { 56, 56, 56 }, 77 .irqs = { 56, 56, 56 },
75}; 78};
@@ -85,6 +88,8 @@ static struct platform_device scif0_device = {
85static struct plat_sci_port scif1_platform_data = { 88static struct plat_sci_port scif1_platform_data = {
86 .mapbase = 0xa4400000, 89 .mapbase = 0xa4400000,
87 .flags = UPF_BOOT_AUTOCONF, 90 .flags = UPF_BOOT_AUTOCONF,
91 .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE,
92 .scbrr_algo_id = SCBRR_ALGO_4,
88 .type = PORT_SCIF, 93 .type = PORT_SCIF,
89 .irqs = { 52, 52, 52 }, 94 .irqs = { 52, 52, 52 },
90}; 95};
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index 3cf8c8ef7b32..4551ad647c2c 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -109,6 +109,8 @@ static struct platform_device rtc_device = {
109static struct plat_sci_port scif0_platform_data = { 109static struct plat_sci_port scif0_platform_data = {
110 .mapbase = 0xfffffe80, 110 .mapbase = 0xfffffe80,
111 .flags = UPF_BOOT_AUTOCONF, 111 .flags = UPF_BOOT_AUTOCONF,
112 .scscr = SCSCR_TE | SCSCR_RE,
113 .scbrr_algo_id = SCBRR_ALGO_2,
112 .type = PORT_SCI, 114 .type = PORT_SCI,
113 .irqs = { 23, 23, 23, 0 }, 115 .irqs = { 23, 23, 23, 0 },
114}; 116};
@@ -126,6 +128,8 @@ static struct platform_device scif0_device = {
126static struct plat_sci_port scif1_platform_data = { 128static struct plat_sci_port scif1_platform_data = {
127 .mapbase = 0xa4000150, 129 .mapbase = 0xa4000150,
128 .flags = UPF_BOOT_AUTOCONF, 130 .flags = UPF_BOOT_AUTOCONF,
131 .scscr = SCSCR_TE | SCSCR_RE,
132 .scbrr_algo_id = SCBRR_ALGO_2,
129 .type = PORT_SCIF, 133 .type = PORT_SCIF,
130 .irqs = { 56, 56, 56, 56 }, 134 .irqs = { 56, 56, 56, 56 },
131}; 135};
@@ -143,6 +147,8 @@ static struct platform_device scif1_device = {
143static struct plat_sci_port scif2_platform_data = { 147static struct plat_sci_port scif2_platform_data = {
144 .mapbase = 0xa4000140, 148 .mapbase = 0xa4000140,
145 .flags = UPF_BOOT_AUTOCONF, 149 .flags = UPF_BOOT_AUTOCONF,
150 .scscr = SCSCR_TE | SCSCR_RE,
151 .scbrr_algo_id = SCBRR_ALGO_2,
146 .type = PORT_IRDA, 152 .type = PORT_IRDA,
147 .irqs = { 52, 52, 52, 52 }, 153 .irqs = { 52, 52, 52, 52 },
148}; 154};
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index b0c2fb4ab479..78f6b01d42c3 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -99,6 +99,9 @@ static struct platform_device rtc_device = {
99static struct plat_sci_port scif0_platform_data = { 99static struct plat_sci_port scif0_platform_data = {
100 .mapbase = 0xa4400000, 100 .mapbase = 0xa4400000,
101 .flags = UPF_BOOT_AUTOCONF, 101 .flags = UPF_BOOT_AUTOCONF,
102 .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE |
103 SCSCR_CKE1 | SCSCR_CKE0,
104 .scbrr_algo_id = SCBRR_ALGO_2,
102 .type = PORT_SCIF, 105 .type = PORT_SCIF,
103 .irqs = { 52, 52, 52, 52 }, 106 .irqs = { 52, 52, 52, 52 },
104}; 107};
@@ -114,6 +117,9 @@ static struct platform_device scif0_device = {
114static struct plat_sci_port scif1_platform_data = { 117static struct plat_sci_port scif1_platform_data = {
115 .mapbase = 0xa4410000, 118 .mapbase = 0xa4410000,
116 .flags = UPF_BOOT_AUTOCONF, 119 .flags = UPF_BOOT_AUTOCONF,
120 .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE |
121 SCSCR_CKE1 | SCSCR_CKE0,
122 .scbrr_algo_id = SCBRR_ALGO_2,
117 .type = PORT_SCIF, 123 .type = PORT_SCIF,
118 .irqs = { 56, 56, 56, 56 }, 124 .irqs = { 56, 56, 56, 56 },
119}; 125};
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 24b17135d5d2..365b94a6fcb7 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * SH7720 Setup 2 * Setup code for SH7720, SH7721.
3 * 3 *
4 * Copyright (C) 2007 Markus Brunner, Mark Jonas 4 * Copyright (C) 2007 Markus Brunner, Mark Jonas
5 * Copyright (C) 2009 Paul Mundt 5 * Copyright (C) 2009 Paul Mundt
@@ -51,6 +51,8 @@ static struct platform_device rtc_device = {
51static struct plat_sci_port scif0_platform_data = { 51static struct plat_sci_port scif0_platform_data = {
52 .mapbase = 0xa4430000, 52 .mapbase = 0xa4430000,
53 .flags = UPF_BOOT_AUTOCONF, 53 .flags = UPF_BOOT_AUTOCONF,
54 .scscr = SCSCR_RE | SCSCR_TE,
55 .scbrr_algo_id = SCBRR_ALGO_4,
54 .type = PORT_SCIF, 56 .type = PORT_SCIF,
55 .irqs = { 80, 80, 80, 80 }, 57 .irqs = { 80, 80, 80, 80 },
56}; 58};
@@ -66,6 +68,8 @@ static struct platform_device scif0_device = {
66static struct plat_sci_port scif1_platform_data = { 68static struct plat_sci_port scif1_platform_data = {
67 .mapbase = 0xa4438000, 69 .mapbase = 0xa4438000,
68 .flags = UPF_BOOT_AUTOCONF, 70 .flags = UPF_BOOT_AUTOCONF,
71 .scscr = SCSCR_RE | SCSCR_TE,
72 .scbrr_algo_id = SCBRR_ALGO_4,
69 .type = PORT_SCIF, 73 .type = PORT_SCIF,
70 .irqs = { 81, 81, 81, 81 }, 74 .irqs = { 81, 81, 81, 81 },
71}; 75};
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index e916b18e1f7c..5b2833159b7d 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -18,6 +18,8 @@
18static struct plat_sci_port scif0_platform_data = { 18static struct plat_sci_port scif0_platform_data = {
19 .mapbase = 0xffe80000, 19 .mapbase = 0xffe80000,
20 .flags = UPF_BOOT_AUTOCONF, 20 .flags = UPF_BOOT_AUTOCONF,
21 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
22 .scbrr_algo_id = SCBRR_ALGO_2,
21 .type = PORT_SCIF, 23 .type = PORT_SCIF,
22 .irqs = { 40, 41, 43, 42 }, 24 .irqs = { 40, 41, 43, 42 },
23}; 25};
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index 911d196e86b5..c2b0aaaedcae 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -14,6 +14,7 @@
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/sh_timer.h> 15#include <linux/sh_timer.h>
16#include <linux/serial_sci.h> 16#include <linux/serial_sci.h>
17#include <asm/machtypes.h>
17 18
18static struct resource rtc_resources[] = { 19static struct resource rtc_resources[] = {
19 [0] = { 20 [0] = {
@@ -35,33 +36,37 @@ static struct platform_device rtc_device = {
35 .resource = rtc_resources, 36 .resource = rtc_resources,
36}; 37};
37 38
38static struct plat_sci_port scif0_platform_data = { 39static struct plat_sci_port sci_platform_data = {
39 .mapbase = 0xffe00000, 40 .mapbase = 0xffe00000,
40 .flags = UPF_BOOT_AUTOCONF, 41 .flags = UPF_BOOT_AUTOCONF,
42 .scscr = SCSCR_TE | SCSCR_RE,
43 .scbrr_algo_id = SCBRR_ALGO_2,
41 .type = PORT_SCI, 44 .type = PORT_SCI,
42 .irqs = { 23, 23, 23, 0 }, 45 .irqs = { 23, 23, 23, 0 },
43}; 46};
44 47
45static struct platform_device scif0_device = { 48static struct platform_device sci_device = {
46 .name = "sh-sci", 49 .name = "sh-sci",
47 .id = 0, 50 .id = 0,
48 .dev = { 51 .dev = {
49 .platform_data = &scif0_platform_data, 52 .platform_data = &sci_platform_data,
50 }, 53 },
51}; 54};
52 55
53static struct plat_sci_port scif1_platform_data = { 56static struct plat_sci_port scif_platform_data = {
54 .mapbase = 0xffe80000, 57 .mapbase = 0xffe80000,
55 .flags = UPF_BOOT_AUTOCONF, 58 .flags = UPF_BOOT_AUTOCONF,
59 .scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE,
60 .scbrr_algo_id = SCBRR_ALGO_2,
56 .type = PORT_SCIF, 61 .type = PORT_SCIF,
57 .irqs = { 40, 40, 40, 40 }, 62 .irqs = { 40, 40, 40, 40 },
58}; 63};
59 64
60static struct platform_device scif1_device = { 65static struct platform_device scif_device = {
61 .name = "sh-sci", 66 .name = "sh-sci",
62 .id = 1, 67 .id = 1,
63 .dev = { 68 .dev = {
64 .platform_data = &scif1_platform_data, 69 .platform_data = &scif_platform_data,
65 }, 70 },
66}; 71};
67 72
@@ -210,8 +215,6 @@ static struct platform_device tmu4_device = {
210#endif 215#endif
211 216
212static struct platform_device *sh7750_devices[] __initdata = { 217static struct platform_device *sh7750_devices[] __initdata = {
213 &scif0_device,
214 &scif1_device,
215 &rtc_device, 218 &rtc_device,
216 &tmu0_device, 219 &tmu0_device,
217 &tmu1_device, 220 &tmu1_device,
@@ -226,14 +229,19 @@ static struct platform_device *sh7750_devices[] __initdata = {
226 229
227static int __init sh7750_devices_setup(void) 230static int __init sh7750_devices_setup(void)
228{ 231{
232 if (mach_is_rts7751r2d()) {
233 platform_register_device(&scif_device);
234 } else {
235 platform_register_device(&sci_device);
236 platform_register_device(&scif_device);
237 }
238
229 return platform_add_devices(sh7750_devices, 239 return platform_add_devices(sh7750_devices,
230 ARRAY_SIZE(sh7750_devices)); 240 ARRAY_SIZE(sh7750_devices));
231} 241}
232arch_initcall(sh7750_devices_setup); 242arch_initcall(sh7750_devices_setup);
233 243
234static struct platform_device *sh7750_early_devices[] __initdata = { 244static struct platform_device *sh7750_early_devices[] __initdata = {
235 &scif0_device,
236 &scif1_device,
237 &tmu0_device, 245 &tmu0_device,
238 &tmu1_device, 246 &tmu1_device,
239 &tmu2_device, 247 &tmu2_device,
@@ -247,6 +255,14 @@ static struct platform_device *sh7750_early_devices[] __initdata = {
247 255
248void __init plat_early_device_setup(void) 256void __init plat_early_device_setup(void)
249{ 257{
258 if (mach_is_rts7751r2d()) {
259 scif_platform_data.scscr |= SCSCR_CKE1;
260 early_platform_add_devices(&scif_device, 1);
261 } else {
262 early_platform_add_devices(&sci_device, 1);
263 early_platform_add_devices(&scif_device, 1);
264 }
265
250 early_platform_add_devices(sh7750_early_devices, 266 early_platform_add_devices(sh7750_early_devices,
251 ARRAY_SIZE(sh7750_early_devices)); 267 ARRAY_SIZE(sh7750_early_devices));
252} 268}
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 48ea8fe85dc5..78bbf232e391 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -129,6 +129,8 @@ static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
129static struct plat_sci_port scif0_platform_data = { 129static struct plat_sci_port scif0_platform_data = {
130 .mapbase = 0xfe600000, 130 .mapbase = 0xfe600000,
131 .flags = UPF_BOOT_AUTOCONF, 131 .flags = UPF_BOOT_AUTOCONF,
132 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
133 .scbrr_algo_id = SCBRR_ALGO_2,
132 .type = PORT_SCIF, 134 .type = PORT_SCIF,
133 .irqs = { 52, 53, 55, 54 }, 135 .irqs = { 52, 53, 55, 54 },
134}; 136};
@@ -145,6 +147,8 @@ static struct plat_sci_port scif1_platform_data = {
145 .mapbase = 0xfe610000, 147 .mapbase = 0xfe610000,
146 .flags = UPF_BOOT_AUTOCONF, 148 .flags = UPF_BOOT_AUTOCONF,
147 .type = PORT_SCIF, 149 .type = PORT_SCIF,
150 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
151 .scbrr_algo_id = SCBRR_ALGO_2,
148 .irqs = { 72, 73, 75, 74 }, 152 .irqs = { 72, 73, 75, 74 },
149}; 153};
150 154
@@ -159,6 +163,8 @@ static struct platform_device scif1_device = {
159static struct plat_sci_port scif2_platform_data = { 163static struct plat_sci_port scif2_platform_data = {
160 .mapbase = 0xfe620000, 164 .mapbase = 0xfe620000,
161 .flags = UPF_BOOT_AUTOCONF, 165 .flags = UPF_BOOT_AUTOCONF,
166 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
167 .scbrr_algo_id = SCBRR_ALGO_2,
162 .type = PORT_SCIF, 168 .type = PORT_SCIF,
163 .irqs = { 76, 77, 79, 78 }, 169 .irqs = { 76, 77, 79, 78 },
164}; 170};
@@ -174,6 +180,8 @@ static struct platform_device scif2_device = {
174static struct plat_sci_port scif3_platform_data = { 180static struct plat_sci_port scif3_platform_data = {
175 .mapbase = 0xfe480000, 181 .mapbase = 0xfe480000,
176 .flags = UPF_BOOT_AUTOCONF, 182 .flags = UPF_BOOT_AUTOCONF,
183 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
184 .scbrr_algo_id = SCBRR_ALGO_2,
177 .type = PORT_SCI, 185 .type = PORT_SCI,
178 .irqs = { 80, 81, 82, 0 }, 186 .irqs = { 80, 81, 82, 0 },
179}; 187};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index b8e5bc80aa4a..1b8848317e9c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -19,6 +19,8 @@
19static struct plat_sci_port scif0_platform_data = { 19static struct plat_sci_port scif0_platform_data = {
20 .mapbase = 0xffe00000, 20 .mapbase = 0xffe00000,
21 .flags = UPF_BOOT_AUTOCONF, 21 .flags = UPF_BOOT_AUTOCONF,
22 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
23 .scbrr_algo_id = SCBRR_ALGO_2,
22 .type = PORT_SCIF, 24 .type = PORT_SCIF,
23 .irqs = { 80, 80, 80, 80 }, 25 .irqs = { 80, 80, 80, 80 },
24}; 26};
@@ -34,6 +36,8 @@ static struct platform_device scif0_device = {
34static struct plat_sci_port scif1_platform_data = { 36static struct plat_sci_port scif1_platform_data = {
35 .mapbase = 0xffe10000, 37 .mapbase = 0xffe10000,
36 .flags = UPF_BOOT_AUTOCONF, 38 .flags = UPF_BOOT_AUTOCONF,
39 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
40 .scbrr_algo_id = SCBRR_ALGO_2,
37 .type = PORT_SCIF, 41 .type = PORT_SCIF,
38 .irqs = { 81, 81, 81, 81 }, 42 .irqs = { 81, 81, 81, 81 },
39}; 43};
@@ -49,6 +53,8 @@ static struct platform_device scif1_device = {
49static struct plat_sci_port scif2_platform_data = { 53static struct plat_sci_port scif2_platform_data = {
50 .mapbase = 0xffe20000, 54 .mapbase = 0xffe20000,
51 .flags = UPF_BOOT_AUTOCONF, 55 .flags = UPF_BOOT_AUTOCONF,
56 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
57 .scbrr_algo_id = SCBRR_ALGO_2,
52 .type = PORT_SCIF, 58 .type = PORT_SCIF,
53 .irqs = { 82, 82, 82, 82 }, 59 .irqs = { 82, 82, 82, 82 },
54}; 60};
@@ -64,6 +70,8 @@ static struct platform_device scif2_device = {
64static struct plat_sci_port scif3_platform_data = { 70static struct plat_sci_port scif3_platform_data = {
65 .mapbase = 0xffe30000, 71 .mapbase = 0xffe30000,
66 .flags = UPF_BOOT_AUTOCONF, 72 .flags = UPF_BOOT_AUTOCONF,
73 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
74 .scbrr_algo_id = SCBRR_ALGO_2,
67 .type = PORT_SCIF, 75 .type = PORT_SCIF,
68 .irqs = { 83, 83, 83, 83 }, 76 .irqs = { 83, 83, 83, 83 },
69}; 77};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 9b3a6aa9081c..82616af64d62 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -21,6 +21,8 @@
21static struct plat_sci_port scif0_platform_data = { 21static struct plat_sci_port scif0_platform_data = {
22 .mapbase = 0xffe00000, 22 .mapbase = 0xffe00000,
23 .flags = UPF_BOOT_AUTOCONF, 23 .flags = UPF_BOOT_AUTOCONF,
24 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
25 .scbrr_algo_id = SCBRR_ALGO_2,
24 .type = PORT_SCIF, 26 .type = PORT_SCIF,
25 .irqs = { 80, 80, 80, 80 }, 27 .irqs = { 80, 80, 80, 80 },
26}; 28};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index a164f8924258..5813d8023619 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -181,6 +181,8 @@ struct platform_device dma_device = {
181static struct plat_sci_port scif0_platform_data = { 181static struct plat_sci_port scif0_platform_data = {
182 .mapbase = 0xffe00000, 182 .mapbase = 0xffe00000,
183 .flags = UPF_BOOT_AUTOCONF, 183 .flags = UPF_BOOT_AUTOCONF,
184 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
185 .scbrr_algo_id = SCBRR_ALGO_2,
184 .type = PORT_SCIF, 186 .type = PORT_SCIF,
185 .irqs = { 80, 80, 80, 80 }, 187 .irqs = { 80, 80, 80, 80 },
186}; 188};
@@ -196,6 +198,8 @@ static struct platform_device scif0_device = {
196static struct plat_sci_port scif1_platform_data = { 198static struct plat_sci_port scif1_platform_data = {
197 .mapbase = 0xffe10000, 199 .mapbase = 0xffe10000,
198 .flags = UPF_BOOT_AUTOCONF, 200 .flags = UPF_BOOT_AUTOCONF,
201 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
202 .scbrr_algo_id = SCBRR_ALGO_2,
199 .type = PORT_SCIF, 203 .type = PORT_SCIF,
200 .irqs = { 81, 81, 81, 81 }, 204 .irqs = { 81, 81, 81, 81 },
201}; 205};
@@ -211,6 +215,8 @@ static struct platform_device scif1_device = {
211static struct plat_sci_port scif2_platform_data = { 215static struct plat_sci_port scif2_platform_data = {
212 .mapbase = 0xffe20000, 216 .mapbase = 0xffe20000,
213 .flags = UPF_BOOT_AUTOCONF, 217 .flags = UPF_BOOT_AUTOCONF,
218 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
219 .scbrr_algo_id = SCBRR_ALGO_2,
214 .type = PORT_SCIF, 220 .type = PORT_SCIF,
215 .irqs = { 82, 82, 82, 82 }, 221 .irqs = { 82, 82, 82, 82 },
216}; 222};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index d7641221ee42..072382280f96 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -24,6 +24,8 @@
24static struct plat_sci_port scif0_platform_data = { 24static struct plat_sci_port scif0_platform_data = {
25 .mapbase = 0xffe00000, 25 .mapbase = 0xffe00000,
26 .flags = UPF_BOOT_AUTOCONF, 26 .flags = UPF_BOOT_AUTOCONF,
27 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
28 .scbrr_algo_id = SCBRR_ALGO_2,
27 .type = PORT_SCIF, 29 .type = PORT_SCIF,
28 .irqs = { 80, 80, 80, 80 }, 30 .irqs = { 80, 80, 80, 80 },
29}; 31};
@@ -39,6 +41,8 @@ static struct platform_device scif0_device = {
39static struct plat_sci_port scif1_platform_data = { 41static struct plat_sci_port scif1_platform_data = {
40 .mapbase = 0xffe10000, 42 .mapbase = 0xffe10000,
41 .flags = UPF_BOOT_AUTOCONF, 43 .flags = UPF_BOOT_AUTOCONF,
44 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
45 .scbrr_algo_id = SCBRR_ALGO_2,
42 .type = PORT_SCIF, 46 .type = PORT_SCIF,
43 .irqs = { 81, 81, 81, 81 }, 47 .irqs = { 81, 81, 81, 81 },
44}; 48};
@@ -54,6 +58,8 @@ static struct platform_device scif1_device = {
54static struct plat_sci_port scif2_platform_data = { 58static struct plat_sci_port scif2_platform_data = {
55 .mapbase = 0xffe20000, 59 .mapbase = 0xffe20000,
56 .flags = UPF_BOOT_AUTOCONF, 60 .flags = UPF_BOOT_AUTOCONF,
61 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
62 .scbrr_algo_id = SCBRR_ALGO_2,
57 .type = PORT_SCIF, 63 .type = PORT_SCIF,
58 .irqs = { 82, 82, 82, 82 }, 64 .irqs = { 82, 82, 82, 82 },
59}; 65};
@@ -69,6 +75,8 @@ static struct platform_device scif2_device = {
69static struct plat_sci_port scif3_platform_data = { 75static struct plat_sci_port scif3_platform_data = {
70 .mapbase = 0xa4e30000, 76 .mapbase = 0xa4e30000,
71 .flags = UPF_BOOT_AUTOCONF, 77 .flags = UPF_BOOT_AUTOCONF,
78 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
79 .scbrr_algo_id = SCBRR_ALGO_3,
72 .type = PORT_SCIFA, 80 .type = PORT_SCIFA,
73 .irqs = { 56, 56, 56, 56 }, 81 .irqs = { 56, 56, 56, 56 },
74}; 82};
@@ -84,6 +92,8 @@ static struct platform_device scif3_device = {
84static struct plat_sci_port scif4_platform_data = { 92static struct plat_sci_port scif4_platform_data = {
85 .mapbase = 0xa4e40000, 93 .mapbase = 0xa4e40000,
86 .flags = UPF_BOOT_AUTOCONF, 94 .flags = UPF_BOOT_AUTOCONF,
95 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
96 .scbrr_algo_id = SCBRR_ALGO_3,
87 .type = PORT_SCIFA, 97 .type = PORT_SCIFA,
88 .irqs = { 88, 88, 88, 88 }, 98 .irqs = { 88, 88, 88, 88 },
89}; 99};
@@ -99,6 +109,8 @@ static struct platform_device scif4_device = {
99static struct plat_sci_port scif5_platform_data = { 109static struct plat_sci_port scif5_platform_data = {
100 .mapbase = 0xa4e50000, 110 .mapbase = 0xa4e50000,
101 .flags = UPF_BOOT_AUTOCONF, 111 .flags = UPF_BOOT_AUTOCONF,
112 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
113 .scbrr_algo_id = SCBRR_ALGO_3,
102 .type = PORT_SCIFA, 114 .type = PORT_SCIFA,
103 .irqs = { 109, 109, 109, 109 }, 115 .irqs = { 109, 109, 109, 109 },
104}; 116};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index c598a7f61b7f..0333fe9e3881 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -257,6 +257,8 @@ static struct platform_device dma1_device = {
257static struct plat_sci_port scif0_platform_data = { 257static struct plat_sci_port scif0_platform_data = {
258 .mapbase = 0xffe00000, 258 .mapbase = 0xffe00000,
259 .flags = UPF_BOOT_AUTOCONF, 259 .flags = UPF_BOOT_AUTOCONF,
260 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
261 .scbrr_algo_id = SCBRR_ALGO_2,
260 .type = PORT_SCIF, 262 .type = PORT_SCIF,
261 .irqs = { 80, 80, 80, 80 }, 263 .irqs = { 80, 80, 80, 80 },
262}; 264};
@@ -272,6 +274,8 @@ static struct platform_device scif0_device = {
272static struct plat_sci_port scif1_platform_data = { 274static struct plat_sci_port scif1_platform_data = {
273 .mapbase = 0xffe10000, 275 .mapbase = 0xffe10000,
274 .flags = UPF_BOOT_AUTOCONF, 276 .flags = UPF_BOOT_AUTOCONF,
277 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
278 .scbrr_algo_id = SCBRR_ALGO_2,
275 .type = PORT_SCIF, 279 .type = PORT_SCIF,
276 .irqs = { 81, 81, 81, 81 }, 280 .irqs = { 81, 81, 81, 81 },
277}; 281};
@@ -287,6 +291,8 @@ static struct platform_device scif1_device = {
287static struct plat_sci_port scif2_platform_data = { 291static struct plat_sci_port scif2_platform_data = {
288 .mapbase = 0xffe20000, 292 .mapbase = 0xffe20000,
289 .flags = UPF_BOOT_AUTOCONF, 293 .flags = UPF_BOOT_AUTOCONF,
294 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
295 .scbrr_algo_id = SCBRR_ALGO_2,
290 .type = PORT_SCIF, 296 .type = PORT_SCIF,
291 .irqs = { 82, 82, 82, 82 }, 297 .irqs = { 82, 82, 82, 82 },
292}; 298};
@@ -302,6 +308,8 @@ static struct platform_device scif2_device = {
302static struct plat_sci_port scif3_platform_data = { 308static struct plat_sci_port scif3_platform_data = {
303 .mapbase = 0xa4e30000, 309 .mapbase = 0xa4e30000,
304 .flags = UPF_BOOT_AUTOCONF, 310 .flags = UPF_BOOT_AUTOCONF,
311 .scscr = SCSCR_RE | SCSCR_TE,
312 .scbrr_algo_id = SCBRR_ALGO_3,
305 .type = PORT_SCIFA, 313 .type = PORT_SCIFA,
306 .irqs = { 56, 56, 56, 56 }, 314 .irqs = { 56, 56, 56, 56 },
307}; 315};
@@ -317,6 +325,8 @@ static struct platform_device scif3_device = {
317static struct plat_sci_port scif4_platform_data = { 325static struct plat_sci_port scif4_platform_data = {
318 .mapbase = 0xa4e40000, 326 .mapbase = 0xa4e40000,
319 .flags = UPF_BOOT_AUTOCONF, 327 .flags = UPF_BOOT_AUTOCONF,
328 .scscr = SCSCR_RE | SCSCR_TE,
329 .scbrr_algo_id = SCBRR_ALGO_3,
320 .type = PORT_SCIFA, 330 .type = PORT_SCIFA,
321 .irqs = { 88, 88, 88, 88 }, 331 .irqs = { 88, 88, 88, 88 },
322}; 332};
@@ -332,6 +342,8 @@ static struct platform_device scif4_device = {
332static struct plat_sci_port scif5_platform_data = { 342static struct plat_sci_port scif5_platform_data = {
333 .mapbase = 0xa4e50000, 343 .mapbase = 0xa4e50000,
334 .flags = UPF_BOOT_AUTOCONF, 344 .flags = UPF_BOOT_AUTOCONF,
345 .scscr = SCSCR_RE | SCSCR_TE,
346 .scbrr_algo_id = SCBRR_ALGO_3,
335 .type = PORT_SCIFA, 347 .type = PORT_SCIFA,
336 .irqs = { 109, 109, 109, 109 }, 348 .irqs = { 109, 109, 109, 109 },
337}; 349};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 749c6388d5a5..9c1de2633ac3 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -20,6 +20,8 @@
20static struct plat_sci_port scif2_platform_data = { 20static struct plat_sci_port scif2_platform_data = {
21 .mapbase = 0xfe4b0000, /* SCIF2 */ 21 .mapbase = 0xfe4b0000, /* SCIF2 */
22 .flags = UPF_BOOT_AUTOCONF, 22 .flags = UPF_BOOT_AUTOCONF,
23 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
24 .scbrr_algo_id = SCBRR_ALGO_2,
23 .type = PORT_SCIF, 25 .type = PORT_SCIF,
24 .irqs = { 40, 40, 40, 40 }, 26 .irqs = { 40, 40, 40, 40 },
25}; 27};
@@ -35,6 +37,8 @@ static struct platform_device scif2_device = {
35static struct plat_sci_port scif3_platform_data = { 37static struct plat_sci_port scif3_platform_data = {
36 .mapbase = 0xfe4c0000, /* SCIF3 */ 38 .mapbase = 0xfe4c0000, /* SCIF3 */
37 .flags = UPF_BOOT_AUTOCONF, 39 .flags = UPF_BOOT_AUTOCONF,
40 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
41 .scbrr_algo_id = SCBRR_ALGO_2,
38 .type = PORT_SCIF, 42 .type = PORT_SCIF,
39 .irqs = { 76, 76, 76, 76 }, 43 .irqs = { 76, 76, 76, 76 },
40}; 44};
@@ -50,6 +54,8 @@ static struct platform_device scif3_device = {
50static struct plat_sci_port scif4_platform_data = { 54static struct plat_sci_port scif4_platform_data = {
51 .mapbase = 0xfe4d0000, /* SCIF4 */ 55 .mapbase = 0xfe4d0000, /* SCIF4 */
52 .flags = UPF_BOOT_AUTOCONF, 56 .flags = UPF_BOOT_AUTOCONF,
57 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
58 .scbrr_algo_id = SCBRR_ALGO_2,
53 .type = PORT_SCIF, 59 .type = PORT_SCIF,
54 .irqs = { 104, 104, 104, 104 }, 60 .irqs = { 104, 104, 104, 104 },
55}; 61};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 5b5f6b005fc5..593eca6509b5 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -19,6 +19,8 @@
19static struct plat_sci_port scif0_platform_data = { 19static struct plat_sci_port scif0_platform_data = {
20 .mapbase = 0xffe00000, 20 .mapbase = 0xffe00000,
21 .flags = UPF_BOOT_AUTOCONF, 21 .flags = UPF_BOOT_AUTOCONF,
22 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
23 .scbrr_algo_id = SCBRR_ALGO_2,
22 .type = PORT_SCIF, 24 .type = PORT_SCIF,
23 .irqs = { 40, 40, 40, 40 }, 25 .irqs = { 40, 40, 40, 40 },
24}; 26};
@@ -34,6 +36,8 @@ static struct platform_device scif0_device = {
34static struct plat_sci_port scif1_platform_data = { 36static struct plat_sci_port scif1_platform_data = {
35 .mapbase = 0xffe08000, 37 .mapbase = 0xffe08000,
36 .flags = UPF_BOOT_AUTOCONF, 38 .flags = UPF_BOOT_AUTOCONF,
39 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
40 .scbrr_algo_id = SCBRR_ALGO_2,
37 .type = PORT_SCIF, 41 .type = PORT_SCIF,
38 .irqs = { 76, 76, 76, 76 }, 42 .irqs = { 76, 76, 76, 76 },
39}; 43};
@@ -49,6 +53,8 @@ static struct platform_device scif1_device = {
49static struct plat_sci_port scif2_platform_data = { 53static struct plat_sci_port scif2_platform_data = {
50 .mapbase = 0xffe10000, 54 .mapbase = 0xffe10000,
51 .flags = UPF_BOOT_AUTOCONF, 55 .flags = UPF_BOOT_AUTOCONF,
56 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
57 .scbrr_algo_id = SCBRR_ALGO_2,
52 .type = PORT_SCIF, 58 .type = PORT_SCIF,
53 .irqs = { 104, 104, 104, 104 }, 59 .irqs = { 104, 104, 104, 104 },
54}; 60};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index 7270d7fd6761..2c6aa22cf5f6 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -17,6 +17,8 @@
17static struct plat_sci_port scif0_platform_data = { 17static struct plat_sci_port scif0_platform_data = {
18 .mapbase = 0xff923000, 18 .mapbase = 0xff923000,
19 .flags = UPF_BOOT_AUTOCONF, 19 .flags = UPF_BOOT_AUTOCONF,
20 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
21 .scbrr_algo_id = SCBRR_ALGO_2,
20 .type = PORT_SCIF, 22 .type = PORT_SCIF,
21 .irqs = { 61, 61, 61, 61 }, 23 .irqs = { 61, 61, 61, 61 },
22}; 24};
@@ -32,6 +34,8 @@ static struct platform_device scif0_device = {
32static struct plat_sci_port scif1_platform_data = { 34static struct plat_sci_port scif1_platform_data = {
33 .mapbase = 0xff924000, 35 .mapbase = 0xff924000,
34 .flags = UPF_BOOT_AUTOCONF, 36 .flags = UPF_BOOT_AUTOCONF,
37 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
38 .scbrr_algo_id = SCBRR_ALGO_2,
35 .type = PORT_SCIF, 39 .type = PORT_SCIF,
36 .irqs = { 62, 62, 62, 62 }, 40 .irqs = { 62, 62, 62, 62 },
37}; 41};
@@ -47,6 +51,8 @@ static struct platform_device scif1_device = {
47static struct plat_sci_port scif2_platform_data = { 51static struct plat_sci_port scif2_platform_data = {
48 .mapbase = 0xff925000, 52 .mapbase = 0xff925000,
49 .flags = UPF_BOOT_AUTOCONF, 53 .flags = UPF_BOOT_AUTOCONF,
54 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
55 .scbrr_algo_id = SCBRR_ALGO_2,
50 .type = PORT_SCIF, 56 .type = PORT_SCIF,
51 .irqs = { 63, 63, 63, 63 }, 57 .irqs = { 63, 63, 63, 63 },
52}; 58};
@@ -62,6 +68,8 @@ static struct platform_device scif2_device = {
62static struct plat_sci_port scif3_platform_data = { 68static struct plat_sci_port scif3_platform_data = {
63 .mapbase = 0xff926000, 69 .mapbase = 0xff926000,
64 .flags = UPF_BOOT_AUTOCONF, 70 .flags = UPF_BOOT_AUTOCONF,
71 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
72 .scbrr_algo_id = SCBRR_ALGO_2,
65 .type = PORT_SCIF, 73 .type = PORT_SCIF,
66 .irqs = { 64, 64, 64, 64 }, 74 .irqs = { 64, 64, 64, 64 },
67}; 75};
@@ -77,6 +85,8 @@ static struct platform_device scif3_device = {
77static struct plat_sci_port scif4_platform_data = { 85static struct plat_sci_port scif4_platform_data = {
78 .mapbase = 0xff927000, 86 .mapbase = 0xff927000,
79 .flags = UPF_BOOT_AUTOCONF, 87 .flags = UPF_BOOT_AUTOCONF,
88 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
89 .scbrr_algo_id = SCBRR_ALGO_2,
80 .type = PORT_SCIF, 90 .type = PORT_SCIF,
81 .irqs = { 65, 65, 65, 65 }, 91 .irqs = { 65, 65, 65, 65 },
82}; 92};
@@ -92,6 +102,8 @@ static struct platform_device scif4_device = {
92static struct plat_sci_port scif5_platform_data = { 102static struct plat_sci_port scif5_platform_data = {
93 .mapbase = 0xff928000, 103 .mapbase = 0xff928000,
94 .flags = UPF_BOOT_AUTOCONF, 104 .flags = UPF_BOOT_AUTOCONF,
105 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
106 .scbrr_algo_id = SCBRR_ALGO_2,
95 .type = PORT_SCIF, 107 .type = PORT_SCIF,
96 .irqs = { 66, 66, 66, 66 }, 108 .irqs = { 66, 66, 66, 66 },
97}; 109};
@@ -107,6 +119,8 @@ static struct platform_device scif5_device = {
107static struct plat_sci_port scif6_platform_data = { 119static struct plat_sci_port scif6_platform_data = {
108 .mapbase = 0xff929000, 120 .mapbase = 0xff929000,
109 .flags = UPF_BOOT_AUTOCONF, 121 .flags = UPF_BOOT_AUTOCONF,
122 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
123 .scbrr_algo_id = SCBRR_ALGO_2,
110 .type = PORT_SCIF, 124 .type = PORT_SCIF,
111 .irqs = { 67, 67, 67, 67 }, 125 .irqs = { 67, 67, 67, 67 },
112}; 126};
@@ -122,6 +136,8 @@ static struct platform_device scif6_device = {
122static struct plat_sci_port scif7_platform_data = { 136static struct plat_sci_port scif7_platform_data = {
123 .mapbase = 0xff92a000, 137 .mapbase = 0xff92a000,
124 .flags = UPF_BOOT_AUTOCONF, 138 .flags = UPF_BOOT_AUTOCONF,
139 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
140 .scbrr_algo_id = SCBRR_ALGO_2,
125 .type = PORT_SCIF, 141 .type = PORT_SCIF,
126 .irqs = { 68, 68, 68, 68 }, 142 .irqs = { 68, 68, 68, 68 },
127}; 143};
@@ -137,6 +153,8 @@ static struct platform_device scif7_device = {
137static struct plat_sci_port scif8_platform_data = { 153static struct plat_sci_port scif8_platform_data = {
138 .mapbase = 0xff92b000, 154 .mapbase = 0xff92b000,
139 .flags = UPF_BOOT_AUTOCONF, 155 .flags = UPF_BOOT_AUTOCONF,
156 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
157 .scbrr_algo_id = SCBRR_ALGO_2,
140 .type = PORT_SCIF, 158 .type = PORT_SCIF,
141 .irqs = { 69, 69, 69, 69 }, 159 .irqs = { 69, 69, 69, 69 },
142}; 160};
@@ -152,6 +170,8 @@ static struct platform_device scif8_device = {
152static struct plat_sci_port scif9_platform_data = { 170static struct plat_sci_port scif9_platform_data = {
153 .mapbase = 0xff92c000, 171 .mapbase = 0xff92c000,
154 .flags = UPF_BOOT_AUTOCONF, 172 .flags = UPF_BOOT_AUTOCONF,
173 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
174 .scbrr_algo_id = SCBRR_ALGO_2,
155 .type = PORT_SCIF, 175 .type = PORT_SCIF,
156 .irqs = { 70, 70, 70, 70 }, 176 .irqs = { 70, 70, 70, 70 },
157}; 177};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 0f414864f76b..08add7fa6849 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -20,6 +20,8 @@
20static struct plat_sci_port scif0_platform_data = { 20static struct plat_sci_port scif0_platform_data = {
21 .mapbase = 0xffe00000, 21 .mapbase = 0xffe00000,
22 .flags = UPF_BOOT_AUTOCONF, 22 .flags = UPF_BOOT_AUTOCONF,
23 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
24 .scbrr_algo_id = SCBRR_ALGO_1,
23 .type = PORT_SCIF, 25 .type = PORT_SCIF,
24 .irqs = { 40, 40, 40, 40 }, 26 .irqs = { 40, 40, 40, 40 },
25}; 27};
@@ -35,6 +37,8 @@ static struct platform_device scif0_device = {
35static struct plat_sci_port scif1_platform_data = { 37static struct plat_sci_port scif1_platform_data = {
36 .mapbase = 0xffe10000, 38 .mapbase = 0xffe10000,
37 .flags = UPF_BOOT_AUTOCONF, 39 .flags = UPF_BOOT_AUTOCONF,
40 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
41 .scbrr_algo_id = SCBRR_ALGO_1,
38 .type = PORT_SCIF, 42 .type = PORT_SCIF,
39 .irqs = { 76, 76, 76, 76 }, 43 .irqs = { 76, 76, 76, 76 },
40}; 44};
@@ -379,6 +383,7 @@ static int __init sh7780_devices_setup(void)
379 ARRAY_SIZE(sh7780_devices)); 383 ARRAY_SIZE(sh7780_devices));
380} 384}
381arch_initcall(sh7780_devices_setup); 385arch_initcall(sh7780_devices_setup);
386
382static struct platform_device *sh7780_early_devices[] __initdata = { 387static struct platform_device *sh7780_early_devices[] __initdata = {
383 &scif0_device, 388 &scif0_device,
384 &scif1_device, 389 &scif1_device,
@@ -392,6 +397,13 @@ static struct platform_device *sh7780_early_devices[] __initdata = {
392 397
393void __init plat_early_device_setup(void) 398void __init plat_early_device_setup(void)
394{ 399{
400 if (mach_is_sh2007()) {
401 scif0_platform_data.scscr &= ~SCSCR_CKE1;
402 scif0_platform_data.scbrr_algo_id = SCBRR_ALGO_2;
403 scif1_platform_data.scscr &= ~SCSCR_CKE1;
404 scif1_platform_data.scbrr_algo_id = SCBRR_ALGO_2;
405 }
406
395 early_platform_add_devices(sh7780_early_devices, 407 early_platform_add_devices(sh7780_early_devices,
396 ARRAY_SIZE(sh7780_early_devices)); 408 ARRAY_SIZE(sh7780_early_devices));
397} 409}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index c9a572bc6dc8..18d8fc136fb2 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -23,6 +23,8 @@
23static struct plat_sci_port scif0_platform_data = { 23static struct plat_sci_port scif0_platform_data = {
24 .mapbase = 0xffea0000, 24 .mapbase = 0xffea0000,
25 .flags = UPF_BOOT_AUTOCONF, 25 .flags = UPF_BOOT_AUTOCONF,
26 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
27 .scbrr_algo_id = SCBRR_ALGO_1,
26 .type = PORT_SCIF, 28 .type = PORT_SCIF,
27 .irqs = { 40, 40, 40, 40 }, 29 .irqs = { 40, 40, 40, 40 },
28}; 30};
@@ -38,6 +40,8 @@ static struct platform_device scif0_device = {
38static struct plat_sci_port scif1_platform_data = { 40static struct plat_sci_port scif1_platform_data = {
39 .mapbase = 0xffeb0000, 41 .mapbase = 0xffeb0000,
40 .flags = UPF_BOOT_AUTOCONF, 42 .flags = UPF_BOOT_AUTOCONF,
43 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
44 .scbrr_algo_id = SCBRR_ALGO_1,
41 .type = PORT_SCIF, 45 .type = PORT_SCIF,
42 .irqs = { 44, 44, 44, 44 }, 46 .irqs = { 44, 44, 44, 44 },
43}; 47};
@@ -53,6 +57,8 @@ static struct platform_device scif1_device = {
53static struct plat_sci_port scif2_platform_data = { 57static struct plat_sci_port scif2_platform_data = {
54 .mapbase = 0xffec0000, 58 .mapbase = 0xffec0000,
55 .flags = UPF_BOOT_AUTOCONF, 59 .flags = UPF_BOOT_AUTOCONF,
60 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
61 .scbrr_algo_id = SCBRR_ALGO_1,
56 .type = PORT_SCIF, 62 .type = PORT_SCIF,
57 .irqs = { 60, 60, 60, 60 }, 63 .irqs = { 60, 60, 60, 60 },
58}; 64};
@@ -68,6 +74,8 @@ static struct platform_device scif2_device = {
68static struct plat_sci_port scif3_platform_data = { 74static struct plat_sci_port scif3_platform_data = {
69 .mapbase = 0xffed0000, 75 .mapbase = 0xffed0000,
70 .flags = UPF_BOOT_AUTOCONF, 76 .flags = UPF_BOOT_AUTOCONF,
77 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
78 .scbrr_algo_id = SCBRR_ALGO_1,
71 .type = PORT_SCIF, 79 .type = PORT_SCIF,
72 .irqs = { 61, 61, 61, 61 }, 80 .irqs = { 61, 61, 61, 61 },
73}; 81};
@@ -83,6 +91,8 @@ static struct platform_device scif3_device = {
83static struct plat_sci_port scif4_platform_data = { 91static struct plat_sci_port scif4_platform_data = {
84 .mapbase = 0xffee0000, 92 .mapbase = 0xffee0000,
85 .flags = UPF_BOOT_AUTOCONF, 93 .flags = UPF_BOOT_AUTOCONF,
94 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
95 .scbrr_algo_id = SCBRR_ALGO_1,
86 .type = PORT_SCIF, 96 .type = PORT_SCIF,
87 .irqs = { 62, 62, 62, 62 }, 97 .irqs = { 62, 62, 62, 62 },
88}; 98};
@@ -98,6 +108,8 @@ static struct platform_device scif4_device = {
98static struct plat_sci_port scif5_platform_data = { 108static struct plat_sci_port scif5_platform_data = {
99 .mapbase = 0xffef0000, 109 .mapbase = 0xffef0000,
100 .flags = UPF_BOOT_AUTOCONF, 110 .flags = UPF_BOOT_AUTOCONF,
111 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
112 .scbrr_algo_id = SCBRR_ALGO_1,
101 .type = PORT_SCIF, 113 .type = PORT_SCIF,
102 .irqs = { 63, 63, 63, 63 }, 114 .irqs = { 63, 63, 63, 63 },
103}; 115};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 0170dbda1d00..1656b8c91faf 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -29,6 +29,8 @@
29static struct plat_sci_port scif0_platform_data = { 29static struct plat_sci_port scif0_platform_data = {
30 .mapbase = 0xffea0000, 30 .mapbase = 0xffea0000,
31 .flags = UPF_BOOT_AUTOCONF, 31 .flags = UPF_BOOT_AUTOCONF,
32 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
33 .scbrr_algo_id = SCBRR_ALGO_1,
32 .type = PORT_SCIF, 34 .type = PORT_SCIF,
33 .irqs = { 40, 41, 43, 42 }, 35 .irqs = { 40, 41, 43, 42 },
34}; 36};
@@ -47,6 +49,8 @@ static struct platform_device scif0_device = {
47static struct plat_sci_port scif1_platform_data = { 49static struct plat_sci_port scif1_platform_data = {
48 .mapbase = 0xffeb0000, 50 .mapbase = 0xffeb0000,
49 .flags = UPF_BOOT_AUTOCONF, 51 .flags = UPF_BOOT_AUTOCONF,
52 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
53 .scbrr_algo_id = SCBRR_ALGO_1,
50 .type = PORT_SCIF, 54 .type = PORT_SCIF,
51 .irqs = { 44, 44, 44, 44 }, 55 .irqs = { 44, 44, 44, 44 },
52}; 56};
@@ -62,6 +66,8 @@ static struct platform_device scif1_device = {
62static struct plat_sci_port scif2_platform_data = { 66static struct plat_sci_port scif2_platform_data = {
63 .mapbase = 0xffec0000, 67 .mapbase = 0xffec0000,
64 .flags = UPF_BOOT_AUTOCONF, 68 .flags = UPF_BOOT_AUTOCONF,
69 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
70 .scbrr_algo_id = SCBRR_ALGO_1,
65 .type = PORT_SCIF, 71 .type = PORT_SCIF,
66 .irqs = { 50, 50, 50, 50 }, 72 .irqs = { 50, 50, 50, 50 },
67}; 73};
@@ -77,6 +83,8 @@ static struct platform_device scif2_device = {
77static struct plat_sci_port scif3_platform_data = { 83static struct plat_sci_port scif3_platform_data = {
78 .mapbase = 0xffed0000, 84 .mapbase = 0xffed0000,
79 .flags = UPF_BOOT_AUTOCONF, 85 .flags = UPF_BOOT_AUTOCONF,
86 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
87 .scbrr_algo_id = SCBRR_ALGO_1,
80 .type = PORT_SCIF, 88 .type = PORT_SCIF,
81 .irqs = { 51, 51, 51, 51 }, 89 .irqs = { 51, 51, 51, 51 },
82}; 90};
@@ -92,6 +100,8 @@ static struct platform_device scif3_device = {
92static struct plat_sci_port scif4_platform_data = { 100static struct plat_sci_port scif4_platform_data = {
93 .mapbase = 0xffee0000, 101 .mapbase = 0xffee0000,
94 .flags = UPF_BOOT_AUTOCONF, 102 .flags = UPF_BOOT_AUTOCONF,
103 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
104 .scbrr_algo_id = SCBRR_ALGO_1,
95 .type = PORT_SCIF, 105 .type = PORT_SCIF,
96 .irqs = { 52, 52, 52, 52 }, 106 .irqs = { 52, 52, 52, 52 },
97}; 107};
@@ -107,6 +117,8 @@ static struct platform_device scif4_device = {
107static struct plat_sci_port scif5_platform_data = { 117static struct plat_sci_port scif5_platform_data = {
108 .mapbase = 0xffef0000, 118 .mapbase = 0xffef0000,
109 .flags = UPF_BOOT_AUTOCONF, 119 .flags = UPF_BOOT_AUTOCONF,
120 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
121 .scbrr_algo_id = SCBRR_ALGO_1,
110 .type = PORT_SCIF, 122 .type = PORT_SCIF,
111 .irqs = { 53, 53, 53, 53 }, 123 .irqs = { 53, 53, 53, 53 },
112}; 124};
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index 013f0b144489..bb208806dc1a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -29,6 +29,8 @@
29static struct plat_sci_port scif0_platform_data = { 29static struct plat_sci_port scif0_platform_data = {
30 .mapbase = 0xffc30000, 30 .mapbase = 0xffc30000,
31 .flags = UPF_BOOT_AUTOCONF, 31 .flags = UPF_BOOT_AUTOCONF,
32 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
33 .scbrr_algo_id = SCBRR_ALGO_2,
32 .type = PORT_SCIF, 34 .type = PORT_SCIF,
33 .irqs = { 40, 41, 43, 42 }, 35 .irqs = { 40, 41, 43, 42 },
34}; 36};
@@ -44,6 +46,8 @@ static struct platform_device scif0_device = {
44static struct plat_sci_port scif1_platform_data = { 46static struct plat_sci_port scif1_platform_data = {
45 .mapbase = 0xffc40000, 47 .mapbase = 0xffc40000,
46 .flags = UPF_BOOT_AUTOCONF, 48 .flags = UPF_BOOT_AUTOCONF,
49 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
50 .scbrr_algo_id = SCBRR_ALGO_2,
47 .type = PORT_SCIF, 51 .type = PORT_SCIF,
48 .irqs = { 44, 45, 47, 46 }, 52 .irqs = { 44, 45, 47, 46 },
49}; 53};
@@ -59,6 +63,8 @@ static struct platform_device scif1_device = {
59static struct plat_sci_port scif2_platform_data = { 63static struct plat_sci_port scif2_platform_data = {
60 .mapbase = 0xffc60000, 64 .mapbase = 0xffc60000,
61 .flags = UPF_BOOT_AUTOCONF, 65 .flags = UPF_BOOT_AUTOCONF,
66 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
67 .scbrr_algo_id = SCBRR_ALGO_2,
62 .type = PORT_SCIF, 68 .type = PORT_SCIF,
63 .irqs = { 52, 53, 55, 54 }, 69 .irqs = { 52, 53, 55, 54 },
64}; 70};
diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
index d910666142b1..18419f1de963 100644
--- a/arch/sh/kernel/cpu/sh5/setup-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
@@ -19,6 +19,8 @@
19static struct plat_sci_port scif0_platform_data = { 19static struct plat_sci_port scif0_platform_data = {
20 .mapbase = PHYS_PERIPHERAL_BLOCK + 0x01030000, 20 .mapbase = PHYS_PERIPHERAL_BLOCK + 0x01030000,
21 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, 21 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
22 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
23 .scbrr_algo_id = SCBRR_ALGO_2,
22 .type = PORT_SCIF, 24 .type = PORT_SCIF,
23 .irqs = { 39, 40, 42, 0 }, 25 .irqs = { 39, 40, 42, 0 },
24}; 26};