sh: add DMA slave definitions to sh7724

Add a list of SCIF and SDHI DMA slave definitions to sh7724. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
author: Guennadi Liakhovetski <g.liakhovetski@gmx.de> 2010-05-19 14:34:03 -0400
committer: Paul Mundt <lethal@linux-sh.org> 2010-05-22 03:51:17 -0400
commit: d62b8a985b74ac741233396b847562dacc45a5c1 (patch)
tree: 92945faeaf9ec950ddaa08018abe9a871f17e0cc /arch/sh
parent: afd46501586a399bba73e4a5879e8a864ad083fe (diff)
1 files changed, 86 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index abd4c2e501db..79c556e56262 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -31,6 +31,90 @@
 #include <cpu/sh7724.h>
 /* DMA */
+static const struct sh_dmae_slave_config sh7724_dmae_slaves[] = {
+        {
+                .slave_id       = SHDMA_SLAVE_SCIF0_TX,
+                .addr           = 0xffe0000c,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x21,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF0_RX,
+                .addr           = 0xffe00014,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x22,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF1_TX,
+                .addr           = 0xffe1000c,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x25,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF1_RX,
+                .addr           = 0xffe10014,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x26,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF2_TX,
+                .addr           = 0xffe2000c,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x29,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF2_RX,
+                .addr           = 0xffe20014,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x2a,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF3_TX,
+                .addr           = 0xa4e30020,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x2d,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF3_RX,
+                .addr           = 0xa4e30024,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x2e,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF4_TX,
+                .addr           = 0xa4e40020,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x31,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF4_RX,
+                .addr           = 0xa4e40024,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x32,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF5_TX,
+                .addr           = 0xa4e50020,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x35,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SCIF5_RX,
+                .addr           = 0xa4e50024,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_8BIT),
+                .mid_rid        = 0x36,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SDHI0_TX,
+                .addr           = 0x04ce0030,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+                .mid_rid        = 0xc1,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SDHI0_RX,
+                .addr           = 0x04ce0030,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+                .mid_rid        = 0xc2,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SDHI1_TX,
+                .addr           = 0x04cf0030,
+                .chcr           = DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+                .mid_rid        = 0xc9,
+        }, {
+                .slave_id       = SHDMA_SLAVE_SDHI1_RX,
+                .addr           = 0x04cf0030,
+                .chcr           = DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL(XMIT_SZ_16BIT),
+                .mid_rid        = 0xca,
+        },
+};
 static const struct sh_dmae_channel sh7724_dmae_channels[] = {
        {
                .offset = 0,
@@ -62,6 +146,8 @@ static const struct sh_dmae_channel sh7724_dmae_channels[] = {
 static const unsigned int ts_shift[] = TS_SHIFT;
 static struct sh_dmae_pdata dma_platform_data = {
+        .slave          = sh7724_dmae_slaves,
+        .slave_num      = ARRAY_SIZE(sh7724_dmae_slaves),
        .channel        = sh7724_dmae_channels,
        .channel_num    = ARRAY_SIZE(sh7724_dmae_channels),
        .ts_low_shift   = CHCR_TS_LOW_SHIFT,
author	Guennadi Liakhovetski <g.liakhovetski@gmx.de>	2010-05-19 14:34:03 -0400
committer	Paul Mundt <lethal@linux-sh.org>	2010-05-22 03:51:17 -0400
commit	d62b8a985b74ac741233396b847562dacc45a5c1 (patch)
tree	92945faeaf9ec950ddaa08018abe9a871f17e0cc /arch/sh
parent	afd46501586a399bba73e4a5879e8a864ad083fe (diff)

diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index abd4c2e501db..79c556e56262 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -31,6 +31,90 @@
31	#include <cpu/sh7724.h>	31	#include <cpu/sh7724.h>
32		32
33	/* DMA */	33	/* DMA */
		34	static const struct sh_dmae_slave_config sh7724_dmae_slaves[] = {
		35	{
		36	.slave_id = SHDMA_SLAVE_SCIF0_TX,
		37	.addr = 0xffe0000c,
		38	.chcr = DM_FIX \| SM_INC \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		39	.mid_rid = 0x21,
		40	}, {
		41	.slave_id = SHDMA_SLAVE_SCIF0_RX,
		42	.addr = 0xffe00014,
		43	.chcr = DM_INC \| SM_FIX \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		44	.mid_rid = 0x22,
		45	}, {
		46	.slave_id = SHDMA_SLAVE_SCIF1_TX,
		47	.addr = 0xffe1000c,
		48	.chcr = DM_FIX \| SM_INC \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		49	.mid_rid = 0x25,
		50	}, {
		51	.slave_id = SHDMA_SLAVE_SCIF1_RX,
		52	.addr = 0xffe10014,
		53	.chcr = DM_INC \| SM_FIX \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		54	.mid_rid = 0x26,
		55	}, {
		56	.slave_id = SHDMA_SLAVE_SCIF2_TX,
		57	.addr = 0xffe2000c,
		58	.chcr = DM_FIX \| SM_INC \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		59	.mid_rid = 0x29,
		60	}, {
		61	.slave_id = SHDMA_SLAVE_SCIF2_RX,
		62	.addr = 0xffe20014,
		63	.chcr = DM_INC \| SM_FIX \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		64	.mid_rid = 0x2a,
		65	}, {
		66	.slave_id = SHDMA_SLAVE_SCIF3_TX,
		67	.addr = 0xa4e30020,
		68	.chcr = DM_FIX \| SM_INC \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		69	.mid_rid = 0x2d,
		70	}, {
		71	.slave_id = SHDMA_SLAVE_SCIF3_RX,
		72	.addr = 0xa4e30024,
		73	.chcr = DM_INC \| SM_FIX \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		74	.mid_rid = 0x2e,
		75	}, {
		76	.slave_id = SHDMA_SLAVE_SCIF4_TX,
		77	.addr = 0xa4e40020,
		78	.chcr = DM_FIX \| SM_INC \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		79	.mid_rid = 0x31,
		80	}, {
		81	.slave_id = SHDMA_SLAVE_SCIF4_RX,
		82	.addr = 0xa4e40024,
		83	.chcr = DM_INC \| SM_FIX \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		84	.mid_rid = 0x32,
		85	}, {
		86	.slave_id = SHDMA_SLAVE_SCIF5_TX,
		87	.addr = 0xa4e50020,
		88	.chcr = DM_FIX \| SM_INC \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		89	.mid_rid = 0x35,
		90	}, {
		91	.slave_id = SHDMA_SLAVE_SCIF5_RX,
		92	.addr = 0xa4e50024,
		93	.chcr = DM_INC \| SM_FIX \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_8BIT),
		94	.mid_rid = 0x36,
		95	}, {
		96	.slave_id = SHDMA_SLAVE_SDHI0_TX,
		97	.addr = 0x04ce0030,
		98	.chcr = DM_FIX \| SM_INC \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_16BIT),
		99	.mid_rid = 0xc1,
		100	}, {
		101	.slave_id = SHDMA_SLAVE_SDHI0_RX,
		102	.addr = 0x04ce0030,
		103	.chcr = DM_INC \| SM_FIX \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_16BIT),
		104	.mid_rid = 0xc2,
		105	}, {
		106	.slave_id = SHDMA_SLAVE_SDHI1_TX,
		107	.addr = 0x04cf0030,
		108	.chcr = DM_FIX \| SM_INC \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_16BIT),
		109	.mid_rid = 0xc9,
		110	}, {
		111	.slave_id = SHDMA_SLAVE_SDHI1_RX,
		112	.addr = 0x04cf0030,
		113	.chcr = DM_INC \| SM_FIX \| 0x800 \| TS_INDEX2VAL(XMIT_SZ_16BIT),
		114	.mid_rid = 0xca,
		115	},
		116	};
		117
34	static const struct sh_dmae_channel sh7724_dmae_channels[] = {	118	static const struct sh_dmae_channel sh7724_dmae_channels[] = {
35	{	119	{
36	.offset = 0,	120	.offset = 0,
@@ -62,6 +146,8 @@ static const struct sh_dmae_channel sh7724_dmae_channels[] = {
62	static const unsigned int ts_shift[] = TS_SHIFT;	146	static const unsigned int ts_shift[] = TS_SHIFT;
63		147
64	static struct sh_dmae_pdata dma_platform_data = {	148	static struct sh_dmae_pdata dma_platform_data = {
		149	.slave = sh7724_dmae_slaves,
		150	.slave_num = ARRAY_SIZE(sh7724_dmae_slaves),
65	.channel = sh7724_dmae_channels,	151	.channel = sh7724_dmae_channels,
66	.channel_num = ARRAY_SIZE(sh7724_dmae_channels),	152	.channel_num = ARRAY_SIZE(sh7724_dmae_channels),
67	.ts_low_shift = CHCR_TS_LOW_SHIFT,	153	.ts_low_shift = CHCR_TS_LOW_SHIFT,