diff options
author | Paul Mundt <lethal@linux-sh.org> | 2010-08-20 07:26:41 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-08-20 07:26:41 -0400 |
commit | 65c23f54c01fabae171d54c0e78df354b3709b93 (patch) | |
tree | c661e4e44604849078dd83ba6f26e9f4fe665e12 /arch/sh | |
parent | 53178d71b9f2d5c96bfcd2dd2c4b99c4e95a77d5 (diff) |
sh: Relax devfn constraints for SH7786 PCIe.
SH7786 PCIe has 1 slot per port, but no specific restriction on function.
Relax the devfn restriction and look to the slot number instead when
configured as a root complex.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r-- | arch/sh/drivers/pci/ops-sh7786.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/arch/sh/drivers/pci/ops-sh7786.c b/arch/sh/drivers/pci/ops-sh7786.c index 57134a38686a..79a5ddae733d 100644 --- a/arch/sh/drivers/pci/ops-sh7786.c +++ b/arch/sh/drivers/pci/ops-sh7786.c | |||
@@ -25,14 +25,15 @@ static int sh7786_pcie_config_access(unsigned char access_type, | |||
25 | struct pci_bus *bus, unsigned int devfn, int where, u32 *data) | 25 | struct pci_bus *bus, unsigned int devfn, int where, u32 *data) |
26 | { | 26 | { |
27 | struct pci_channel *chan = bus->sysdata; | 27 | struct pci_channel *chan = bus->sysdata; |
28 | int dev, func; | 28 | int dev, func, type; |
29 | 29 | ||
30 | dev = PCI_SLOT(devfn); | 30 | dev = PCI_SLOT(devfn); |
31 | func = PCI_FUNC(devfn); | 31 | func = PCI_FUNC(devfn); |
32 | type = !!bus->parent; | ||
32 | 33 | ||
33 | if (bus->number > 255 || dev > 31 || func > 7) | 34 | if (bus->number > 255 || dev > 31 || func > 7) |
34 | return PCIBIOS_FUNC_NOT_SUPPORTED; | 35 | return PCIBIOS_FUNC_NOT_SUPPORTED; |
35 | if (devfn) | 36 | if (bus->parent == NULL && dev) |
36 | return PCIBIOS_DEVICE_NOT_FOUND; | 37 | return PCIBIOS_DEVICE_NOT_FOUND; |
37 | 38 | ||
38 | /* Clear errors */ | 39 | /* Clear errors */ |
@@ -43,13 +44,7 @@ static int sh7786_pcie_config_access(unsigned char access_type, | |||
43 | (func << 16) | (where & ~3), SH4A_PCIEPAR); | 44 | (func << 16) | (where & ~3), SH4A_PCIEPAR); |
44 | 45 | ||
45 | /* Enable the configuration access */ | 46 | /* Enable the configuration access */ |
46 | if (bus->number) { | 47 | pci_write_reg(chan, (1 << 31) | (type << 8), SH4A_PCIEPCTLR); |
47 | /* Type 1 */ | ||
48 | pci_write_reg(chan, (1 << 31) | (1 << 8), SH4A_PCIEPCTLR); | ||
49 | } else { | ||
50 | /* Type 0 */ | ||
51 | pci_write_reg(chan, (1 << 31), SH4A_PCIEPCTLR); | ||
52 | } | ||
53 | 48 | ||
54 | /* Check for errors */ | 49 | /* Check for errors */ |
55 | if (pci_read_reg(chan, SH4A_PCIEERRFR) & 0x10) | 50 | if (pci_read_reg(chan, SH4A_PCIEERRFR) & 0x10) |