diff options
author | Magnus Damm <magnus.damm@gmail.com> | 2008-02-08 03:31:24 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2008-02-14 00:22:10 -0500 |
commit | 9109a30e5a548b39463b5a777943cf103da507af (patch) | |
tree | 30c9e05311a3a76acef42ebcc6f00f08cdacd605 /arch/sh | |
parent | d847afe7d4966d35eb7a6fe6f196a0d7e5633f35 (diff) |
sh: add support for sh7366 processor
This patch adds sh7366 cpu supports. Just the most basic things like interrupt
controller, clocks and serial port are included at this point.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r-- | arch/sh/Kconfig | 7 | ||||
-rw-r--r-- | arch/sh/Kconfig.debug | 2 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4/probe.c | 6 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/Makefile | 2 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7722.c | 10 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7366.c | 177 | ||||
-rw-r--r-- | arch/sh/kernel/setup.c | 2 |
7 files changed, 203 insertions, 3 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 3297b87a40d6..b3400b5ad5c6 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig | |||
@@ -315,6 +315,13 @@ config CPU_SUBTYPE_SH7722 | |||
315 | select ARCH_SPARSEMEM_ENABLE | 315 | select ARCH_SPARSEMEM_ENABLE |
316 | select SYS_SUPPORTS_NUMA | 316 | select SYS_SUPPORTS_NUMA |
317 | 317 | ||
318 | config CPU_SUBTYPE_SH7366 | ||
319 | bool "Support SH7366 processor" | ||
320 | select CPU_SH4AL_DSP | ||
321 | select CPU_SHX2 | ||
322 | select ARCH_SPARSEMEM_ENABLE | ||
323 | select SYS_SUPPORTS_NUMA | ||
324 | |||
318 | # SH-5 Processor Support | 325 | # SH-5 Processor Support |
319 | 326 | ||
320 | config CPU_SUBTYPE_SH5_101 | 327 | config CPU_SUBTYPE_SH5_101 |
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug index ccfa0b23d366..93722d099e7a 100644 --- a/arch/sh/Kconfig.debug +++ b/arch/sh/Kconfig.debug | |||
@@ -30,7 +30,7 @@ config EARLY_SCIF_CONSOLE_PORT | |||
30 | hex | 30 | hex |
31 | depends on EARLY_SCIF_CONSOLE | 31 | depends on EARLY_SCIF_CONSOLE |
32 | default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 | 32 | default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 |
33 | default "0xffe00000" if CPU_SUBTYPE_SH7722 | 33 | default "0xffe00000" if CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 |
34 | default "0xffea0000" if CPU_SUBTYPE_SH7785 | 34 | default "0xffea0000" if CPU_SUBTYPE_SH7785 |
35 | default "0xfffe8000" if CPU_SUBTYPE_SH7203 | 35 | default "0xfffe8000" if CPU_SUBTYPE_SH7203 |
36 | default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263 | 36 | default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263 |
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 89b454b1f0f1..9e89984c4f1d 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c | |||
@@ -132,6 +132,12 @@ int __init detect_cpu_and_cache_system(void) | |||
132 | boot_cpu_data.dcache.ways = 4; | 132 | boot_cpu_data.dcache.ways = 4; |
133 | boot_cpu_data.flags |= CPU_HAS_LLSC; | 133 | boot_cpu_data.flags |= CPU_HAS_LLSC; |
134 | } | 134 | } |
135 | else if (prr == 0x70) { | ||
136 | boot_cpu_data.type = CPU_SH7366; | ||
137 | boot_cpu_data.icache.ways = 4; | ||
138 | boot_cpu_data.dcache.ways = 4; | ||
139 | boot_cpu_data.flags |= CPU_HAS_LLSC; | ||
140 | } | ||
135 | break; | 141 | break; |
136 | case 0x4000: /* 1st cut */ | 142 | case 0x4000: /* 1st cut */ |
137 | case 0x4001: /* 2nd cut */ | 143 | case 0x4001: /* 2nd cut */ |
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile index 08ac6387bf17..5d890ac8e793 100644 --- a/arch/sh/kernel/cpu/sh4a/Makefile +++ b/arch/sh/kernel/cpu/sh4a/Makefile | |||
@@ -9,6 +9,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o | |||
9 | obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o | 9 | obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o |
10 | obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o | 10 | obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o |
11 | obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o | 11 | obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o |
12 | obj-$(CONFIG_CPU_SUBTYPE_SH7366) += setup-sh7366.o | ||
12 | obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o | 13 | obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o |
13 | 14 | ||
14 | # SMP setup | 15 | # SMP setup |
@@ -21,6 +22,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o | |||
21 | clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o | 22 | clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o |
22 | clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o | 23 | clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o |
23 | clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o | 24 | clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o |
25 | clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o | ||
24 | clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o | 26 | clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o |
25 | 27 | ||
26 | obj-y += $(clock-y) | 28 | obj-y += $(clock-y) |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c index a0fd8bb21f7c..299138ebe160 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * arch/sh/kernel/cpu/sh4a/clock-sh7722.c | 2 | * arch/sh/kernel/cpu/sh4a/clock-sh7722.c |
3 | * | 3 | * |
4 | * SH7722 support for the clock framework | 4 | * SH7722 & SH7366 support for the clock framework |
5 | * | 5 | * |
6 | * Copyright (c) 2006-2007 Nomad Global Solutions Inc | 6 | * Copyright (c) 2006-2007 Nomad Global Solutions Inc |
7 | * Based on code for sh7343 by Paul Mundt | 7 | * Based on code for sh7343 by Paul Mundt |
@@ -417,15 +417,19 @@ static int sh7722_siu_which(struct clk *clk) | |||
417 | return 0; | 417 | return 0; |
418 | if (!strcmp(clk->name, "siu_b_clk")) | 418 | if (!strcmp(clk->name, "siu_b_clk")) |
419 | return 1; | 419 | return 1; |
420 | #if defined(CONFIG_CPU_SUBTYPE_SH7722) | ||
420 | if (!strcmp(clk->name, "irda_clk")) | 421 | if (!strcmp(clk->name, "irda_clk")) |
421 | return 2; | 422 | return 2; |
423 | #endif | ||
422 | return -EINVAL; | 424 | return -EINVAL; |
423 | } | 425 | } |
424 | 426 | ||
425 | static unsigned long sh7722_siu_regs[] = { | 427 | static unsigned long sh7722_siu_regs[] = { |
426 | [0] = SCLKACR, | 428 | [0] = SCLKACR, |
427 | [1] = SCLKBCR, | 429 | [1] = SCLKBCR, |
430 | #if defined(CONFIG_CPU_SUBTYPE_SH7722) | ||
428 | [2] = IrDACLKCR, | 431 | [2] = IrDACLKCR, |
432 | #endif | ||
429 | }; | 433 | }; |
430 | 434 | ||
431 | static int sh7722_siu_start_stop(struct clk *clk, int enable) | 435 | static int sh7722_siu_start_stop(struct clk *clk, int enable) |
@@ -571,10 +575,12 @@ static struct clk sh7722_siu_b_clock = { | |||
571 | .ops = &sh7722_siu_clk_ops, | 575 | .ops = &sh7722_siu_clk_ops, |
572 | }; | 576 | }; |
573 | 577 | ||
578 | #if defined(CONFIG_CPU_SUBTYPE_SH7722) | ||
574 | static struct clk sh7722_irda_clock = { | 579 | static struct clk sh7722_irda_clock = { |
575 | .name = "irda_clk", | 580 | .name = "irda_clk", |
576 | .ops = &sh7722_siu_clk_ops, | 581 | .ops = &sh7722_siu_clk_ops, |
577 | }; | 582 | }; |
583 | #endif | ||
578 | 584 | ||
579 | static struct clk sh7722_video_clock = { | 585 | static struct clk sh7722_video_clock = { |
580 | .name = "video_clk", | 586 | .name = "video_clk", |
@@ -588,7 +594,9 @@ static struct clk *sh7722_clocks[] = { | |||
588 | &sh7722_sdram_clock, | 594 | &sh7722_sdram_clock, |
589 | &sh7722_siu_a_clock, | 595 | &sh7722_siu_a_clock, |
590 | &sh7722_siu_b_clock, | 596 | &sh7722_siu_b_clock, |
597 | #if defined(CONFIG_CPU_SUBTYPE_SH7722) | ||
591 | &sh7722_irda_clock, | 598 | &sh7722_irda_clock, |
599 | #endif | ||
592 | &sh7722_video_clock, | 600 | &sh7722_video_clock, |
593 | }; | 601 | }; |
594 | 602 | ||
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c new file mode 100644 index 000000000000..967e8b69a2f8 --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c | |||
@@ -0,0 +1,177 @@ | |||
1 | /* | ||
2 | * SH7366 Setup | ||
3 | * | ||
4 | * Copyright (C) 2008 Renesas Solutions | ||
5 | * | ||
6 | * Based on linux/arch/sh/kernel/cpu/sh4a/setup-sh7722.c | ||
7 | * | ||
8 | * This file is subject to the terms and conditions of the GNU General Public | ||
9 | * License. See the file "COPYING" in the main directory of this archive | ||
10 | * for more details. | ||
11 | */ | ||
12 | #include <linux/platform_device.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/serial.h> | ||
15 | #include <asm/sci.h> | ||
16 | |||
17 | static struct plat_sci_port sci_platform_data[] = { | ||
18 | { | ||
19 | .mapbase = 0xffe00000, | ||
20 | .flags = UPF_BOOT_AUTOCONF, | ||
21 | .type = PORT_SCIF, | ||
22 | .irqs = { 80, 80, 80, 80 }, | ||
23 | }, { | ||
24 | .flags = 0, | ||
25 | } | ||
26 | }; | ||
27 | |||
28 | static struct platform_device sci_device = { | ||
29 | .name = "sh-sci", | ||
30 | .id = -1, | ||
31 | .dev = { | ||
32 | .platform_data = sci_platform_data, | ||
33 | }, | ||
34 | }; | ||
35 | |||
36 | static struct platform_device *sh7366_devices[] __initdata = { | ||
37 | &sci_device, | ||
38 | }; | ||
39 | |||
40 | static int __init sh7366_devices_setup(void) | ||
41 | { | ||
42 | return platform_add_devices(sh7366_devices, | ||
43 | ARRAY_SIZE(sh7366_devices)); | ||
44 | } | ||
45 | __initcall(sh7366_devices_setup); | ||
46 | |||
47 | enum { | ||
48 | UNUSED=0, | ||
49 | |||
50 | /* interrupt sources */ | ||
51 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, | ||
52 | ICB, | ||
53 | DMAC0, DMAC1, DMAC2, DMAC3, | ||
54 | VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU, | ||
55 | MFI, VPU, USB, | ||
56 | MMC_MMC1I, MMC_MMC2I, MMC_MMC3I, | ||
57 | DMAC4, DMAC5, DMAC_DADERR, | ||
58 | SCIF, SCIFA1, SCIFA2, | ||
59 | DENC, MSIOF, | ||
60 | FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, | ||
61 | I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI, | ||
62 | SDHI0, SDHI1, SDHI2, SDHI3, | ||
63 | CMT, TSIF, SIU, | ||
64 | TMU0, TMU1, TMU2, | ||
65 | VEU2, LCDC, | ||
66 | |||
67 | /* interrupt groups */ | ||
68 | |||
69 | DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C, SDHI, | ||
70 | }; | ||
71 | |||
72 | static struct intc_vect vectors[] __initdata = { | ||
73 | INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), | ||
74 | INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), | ||
75 | INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), | ||
76 | INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0), | ||
77 | INTC_VECT(ICB, 0x700), | ||
78 | INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820), | ||
79 | INTC_VECT(DMAC2, 0x840), INTC_VECT(DMAC3, 0x860), | ||
80 | INTC_VECT(VIO_CEUI, 0x880), INTC_VECT(VIO_BEUI, 0x8a0), | ||
81 | INTC_VECT(VIO_VEUI, 0x8c0), INTC_VECT(VOU, 0x8e0), | ||
82 | INTC_VECT(MFI, 0x900), INTC_VECT(VPU, 0x980), INTC_VECT(USB, 0xa20), | ||
83 | INTC_VECT(MMC_MMC1I, 0xb00), INTC_VECT(MMC_MMC2I, 0xb20), | ||
84 | INTC_VECT(MMC_MMC3I, 0xb40), | ||
85 | INTC_VECT(DMAC4, 0xb80), INTC_VECT(DMAC5, 0xba0), | ||
86 | INTC_VECT(DMAC_DADERR, 0xbc0), | ||
87 | INTC_VECT(SCIF, 0xc00), INTC_VECT(SCIFA1, 0xc20), | ||
88 | INTC_VECT(SCIFA2, 0xc40), | ||
89 | INTC_VECT(DENC, 0xc60), INTC_VECT(MSIOF, 0xc80), | ||
90 | INTC_VECT(FLCTL_FLSTEI, 0xd80), INTC_VECT(FLCTL_FLENDI, 0xda0), | ||
91 | INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), | ||
92 | INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20), | ||
93 | INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60), | ||
94 | INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), | ||
95 | INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), | ||
96 | INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), | ||
97 | INTC_VECT(SIU, 0xf80), | ||
98 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), | ||
99 | INTC_VECT(TMU2, 0x440), | ||
100 | INTC_VECT(VEU2, 0x580), INTC_VECT(LCDC, 0x580), | ||
101 | }; | ||
102 | |||
103 | static struct intc_group groups[] __initdata = { | ||
104 | INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3), | ||
105 | INTC_GROUP(VIOVOU, VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU), | ||
106 | INTC_GROUP(MMC, MMC_MMC1I, MMC_MMC2I, MMC_MMC3I), | ||
107 | INTC_GROUP(DMAC45, DMAC4, DMAC5, DMAC_DADERR), | ||
108 | INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, | ||
109 | FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), | ||
110 | INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI), | ||
111 | INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), | ||
112 | }; | ||
113 | |||
114 | static struct intc_mask_reg mask_registers[] __initdata = { | ||
115 | { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ | ||
116 | { } }, | ||
117 | { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ | ||
118 | { VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } }, | ||
119 | { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ | ||
120 | { 0, 0, 0, VPU, 0, 0, 0, MFI } }, | ||
121 | { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */ | ||
122 | { 0, 0, 0, ICB } }, | ||
123 | { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */ | ||
124 | { 0, TMU2, TMU1, TMU0, VEU2, 0, 0, LCDC } }, | ||
125 | { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */ | ||
126 | { 0, DMAC_DADERR, DMAC5, DMAC4, DENC, SCIFA2, SCIFA1, SCIF } }, | ||
127 | { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */ | ||
128 | { 0, 0, 0, 0, 0, 0, 0, MSIOF } }, | ||
129 | { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */ | ||
130 | { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, | ||
131 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, | ||
132 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ | ||
133 | { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } }, | ||
134 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ | ||
135 | { 0, 0, 0, CMT, 0, USB, } }, | ||
136 | { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ | ||
137 | { 0, MMC_MMC3I, MMC_MMC2I, MMC_MMC1I } }, | ||
138 | { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */ | ||
139 | { 0, 0, 0, 0, 0, 0, 0, TSIF } }, | ||
140 | { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */ | ||
141 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | ||
142 | }; | ||
143 | |||
144 | static struct intc_prio_reg prio_registers[] __initdata = { | ||
145 | { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } }, | ||
146 | { 0xa4080004, 0, 16, 4, /* IPRB */ { VEU2, LCDC, ICB } }, | ||
147 | { 0xa4080008, 0, 16, 4, /* IPRC */ { } }, | ||
148 | { 0xa408000c, 0, 16, 4, /* IPRD */ { } }, | ||
149 | { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, MFI, VPU } }, | ||
150 | { 0xa4080014, 0, 16, 4, /* IPRF */ { 0, DMAC45, USB, CMT } }, | ||
151 | { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF, SCIFA1, SCIFA2, DENC } }, | ||
152 | { 0xa408001c, 0, 16, 4, /* IPRH */ { MSIOF, 0, FLCTL, I2C } }, | ||
153 | { 0xa4080020, 0, 16, 4, /* IPRI */ { 0, 0, TSIF, } }, | ||
154 | { 0xa4080024, 0, 16, 4, /* IPRJ */ { 0, 0, SIU } }, | ||
155 | { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } }, | ||
156 | { 0xa408002c, 0, 16, 4, /* IPRL */ { } }, | ||
157 | { 0xa4140010, 0, 32, 4, /* INTPRI00 */ | ||
158 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | ||
159 | }; | ||
160 | |||
161 | static struct intc_sense_reg sense_registers[] __initdata = { | ||
162 | { 0xa414001c, 16, 2, /* ICR1 */ | ||
163 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | ||
164 | }; | ||
165 | |||
166 | static DECLARE_INTC_DESC(intc_desc, "sh7366", vectors, groups, | ||
167 | mask_registers, prio_registers, sense_registers); | ||
168 | |||
169 | void __init plat_irq_setup(void) | ||
170 | { | ||
171 | register_intc_controller(&intc_desc); | ||
172 | } | ||
173 | |||
174 | void __init plat_mem_setup(void) | ||
175 | { | ||
176 | /* TODO: Register Node 1 */ | ||
177 | } | ||
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 18a5baf2cbad..ff4f54a47c07 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c | |||
@@ -333,7 +333,7 @@ static const char *cpu_name[] = { | |||
333 | [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", | 333 | [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785", |
334 | [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", | 334 | [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3", |
335 | [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", | 335 | [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103", |
336 | [CPU_SH_NONE] = "Unknown" | 336 | [CPU_SH7366] = "SH7366", [CPU_SH_NONE] = "Unknown" |
337 | }; | 337 | }; |
338 | 338 | ||
339 | const char *get_cpu_subtype(struct sh_cpuinfo *c) | 339 | const char *get_cpu_subtype(struct sh_cpuinfo *c) |