diff options
author | Paul Mundt <lethal@linux-sh.org> | 2011-06-15 05:03:58 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-06-15 05:03:58 -0400 |
commit | 1f83812d61de8c09ad6ab6be29e0ebd0817d16f1 (patch) | |
tree | 32cc463e07a5efd7ec4702df003780664f543d5c /arch/sh | |
parent | 201fbceb258650157fcc4fd746abcdd3a571eada (diff) | |
parent | 4b8c59a3d83e9cf2b65b16999a0c704fc72de056 (diff) |
Merge branch 'common/serial-rework' into sh-latest
Diffstat (limited to 'arch/sh')
22 files changed, 209 insertions, 15 deletions
diff --git a/arch/sh/Makefile b/arch/sh/Makefile index e3d8170ad00b..99385d0b3f3b 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile | |||
@@ -173,6 +173,7 @@ core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/ | |||
173 | cpuincdir-$(CONFIG_CPU_SH2A) += cpu-sh2a | 173 | cpuincdir-$(CONFIG_CPU_SH2A) += cpu-sh2a |
174 | cpuincdir-$(CONFIG_CPU_SH2) += cpu-sh2 | 174 | cpuincdir-$(CONFIG_CPU_SH2) += cpu-sh2 |
175 | cpuincdir-$(CONFIG_CPU_SH3) += cpu-sh3 | 175 | cpuincdir-$(CONFIG_CPU_SH3) += cpu-sh3 |
176 | cpuincdir-$(CONFIG_CPU_SH4A) += cpu-sh4a | ||
176 | cpuincdir-$(CONFIG_CPU_SH4) += cpu-sh4 | 177 | cpuincdir-$(CONFIG_CPU_SH4) += cpu-sh4 |
177 | cpuincdir-$(CONFIG_CPU_SH5) += cpu-sh5 | 178 | cpuincdir-$(CONFIG_CPU_SH5) += cpu-sh5 |
178 | cpuincdir-y += cpu-common # Must be last | 179 | cpuincdir-y += cpu-common # Must be last |
diff --git a/arch/sh/include/cpu-sh3/cpu/serial.h b/arch/sh/include/cpu-sh3/cpu/serial.h new file mode 100644 index 000000000000..7766329bc103 --- /dev/null +++ b/arch/sh/include/cpu-sh3/cpu/serial.h | |||
@@ -0,0 +1,10 @@ | |||
1 | #ifndef __CPU_SH3_SERIAL_H | ||
2 | #define __CPU_SH3_SERIAL_H | ||
3 | |||
4 | #include <linux/serial_sci.h> | ||
5 | |||
6 | extern struct plat_sci_port_ops sh770x_sci_port_ops; | ||
7 | extern struct plat_sci_port_ops sh7710_sci_port_ops; | ||
8 | extern struct plat_sci_port_ops sh7720_sci_port_ops; | ||
9 | |||
10 | #endif /* __CPU_SH3_SERIAL_H */ | ||
diff --git a/arch/sh/include/cpu-sh4a/cpu/serial.h b/arch/sh/include/cpu-sh4a/cpu/serial.h new file mode 100644 index 000000000000..ff1bc275d210 --- /dev/null +++ b/arch/sh/include/cpu-sh4a/cpu/serial.h | |||
@@ -0,0 +1,7 @@ | |||
1 | #ifndef __CPU_SH4A_SERIAL_H | ||
2 | #define __CPU_SH4A_SERIAL_H | ||
3 | |||
4 | /* arch/sh/kernel/cpu/sh4a/serial-sh7722.c */ | ||
5 | extern struct plat_sci_port_ops sh7722_sci_port_ops; | ||
6 | |||
7 | #endif /* __CPU_SH4A_SERIAL_H */ | ||
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile index ecab274141a8..6f13f33a35ff 100644 --- a/arch/sh/kernel/cpu/sh3/Makefile +++ b/arch/sh/kernel/cpu/sh3/Makefile | |||
@@ -7,15 +7,15 @@ obj-y := ex.o probe.o entry.o setup-sh3.o | |||
7 | obj-$(CONFIG_HIBERNATION) += swsusp.o | 7 | obj-$(CONFIG_HIBERNATION) += swsusp.o |
8 | 8 | ||
9 | # CPU subtype setup | 9 | # CPU subtype setup |
10 | obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o | 10 | obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o serial-sh770x.o |
11 | obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh770x.o | 11 | obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh770x.o serial-sh770x.o |
12 | obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh770x.o | 12 | obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh770x.o serial-sh770x.o |
13 | obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh770x.o | 13 | obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh770x.o serial-sh770x.o |
14 | obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o | 14 | obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o serial-sh770x.o |
15 | obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o | 15 | obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o serial-sh7710.o |
16 | obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o | 16 | obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o serial-sh7710.o |
17 | obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o | 17 | obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o serial-sh7720.o |
18 | obj-$(CONFIG_CPU_SUBTYPE_SH7721) += setup-sh7720.o | 18 | obj-$(CONFIG_CPU_SUBTYPE_SH7721) += setup-sh7720.o serial-sh7720.o |
19 | 19 | ||
20 | # Primary on-chip clocks (common) | 20 | # Primary on-chip clocks (common) |
21 | clock-$(CONFIG_CPU_SH3) := clock-sh3.o | 21 | clock-$(CONFIG_CPU_SH3) := clock-sh3.o |
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh770x.c b/arch/sh/kernel/cpu/sh3/serial-sh770x.c new file mode 100644 index 000000000000..4f7242c676b3 --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/serial-sh770x.c | |||
@@ -0,0 +1,33 @@ | |||
1 | #include <linux/serial_sci.h> | ||
2 | #include <linux/serial_core.h> | ||
3 | #include <linux/io.h> | ||
4 | #include <cpu/serial.h> | ||
5 | |||
6 | #define SCPCR 0xA4000116 | ||
7 | #define SCPDR 0xA4000136 | ||
8 | |||
9 | static void sh770x_sci_init_pins(struct uart_port *port, unsigned int cflag) | ||
10 | { | ||
11 | unsigned short data; | ||
12 | |||
13 | /* We need to set SCPCR to enable RTS/CTS */ | ||
14 | data = __raw_readw(SCPCR); | ||
15 | /* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/ | ||
16 | __raw_writew(data & 0x0fcf, SCPCR); | ||
17 | |||
18 | if (!(cflag & CRTSCTS)) { | ||
19 | /* We need to set SCPCR to enable RTS/CTS */ | ||
20 | data = __raw_readw(SCPCR); | ||
21 | /* Clear out SCP7MD1,0, SCP4MD1,0, | ||
22 | Set SCP6MD1,0 = {01} (output) */ | ||
23 | __raw_writew((data & 0x0fcf) | 0x1000, SCPCR); | ||
24 | |||
25 | data = __raw_readb(SCPDR); | ||
26 | /* Set /RTS2 (bit6) = 0 */ | ||
27 | __raw_writeb(data & 0xbf, SCPDR); | ||
28 | } | ||
29 | } | ||
30 | |||
31 | struct plat_sci_port_ops sh770x_sci_port_ops = { | ||
32 | .init_pins = sh770x_sci_init_pins, | ||
33 | }; | ||
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh7710.c b/arch/sh/kernel/cpu/sh3/serial-sh7710.c new file mode 100644 index 000000000000..42190ef6aebf --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/serial-sh7710.c | |||
@@ -0,0 +1,20 @@ | |||
1 | #include <linux/serial_sci.h> | ||
2 | #include <linux/serial_core.h> | ||
3 | #include <linux/io.h> | ||
4 | #include <cpu/serial.h> | ||
5 | |||
6 | #define PACR 0xa4050100 | ||
7 | #define PBCR 0xa4050102 | ||
8 | |||
9 | static void sh7710_sci_init_pins(struct uart_port *port, unsigned int cflag) | ||
10 | { | ||
11 | if (port->mapbase == 0xA4400000) { | ||
12 | __raw_writew(__raw_readw(PACR) & 0xffc0, PACR); | ||
13 | __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR); | ||
14 | } else if (port->mapbase == 0xA4410000) | ||
15 | __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR); | ||
16 | } | ||
17 | |||
18 | struct plat_sci_port_ops sh7710_sci_port_ops = { | ||
19 | .init_pins = sh7710_sci_init_pins, | ||
20 | }; | ||
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh7720.c b/arch/sh/kernel/cpu/sh3/serial-sh7720.c new file mode 100644 index 000000000000..8234e1e7abd9 --- /dev/null +++ b/arch/sh/kernel/cpu/sh3/serial-sh7720.c | |||
@@ -0,0 +1,36 @@ | |||
1 | #include <linux/serial_sci.h> | ||
2 | #include <linux/serial_core.h> | ||
3 | #include <linux/io.h> | ||
4 | #include <cpu/serial.h> | ||
5 | |||
6 | static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag) | ||
7 | { | ||
8 | unsigned short data; | ||
9 | |||
10 | if (cflag & CRTSCTS) { | ||
11 | /* enable RTS/CTS */ | ||
12 | if (port->mapbase == 0xa4430000) { /* SCIF0 */ | ||
13 | /* Clear PTCR bit 9-2; enable all scif pins but sck */ | ||
14 | data = __raw_readw(PORT_PTCR); | ||
15 | __raw_writew((data & 0xfc03), PORT_PTCR); | ||
16 | } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ | ||
17 | /* Clear PVCR bit 9-2 */ | ||
18 | data = __raw_readw(PORT_PVCR); | ||
19 | __raw_writew((data & 0xfc03), PORT_PVCR); | ||
20 | } | ||
21 | } else { | ||
22 | if (port->mapbase == 0xa4430000) { /* SCIF0 */ | ||
23 | /* Clear PTCR bit 5-2; enable only tx and rx */ | ||
24 | data = __raw_readw(PORT_PTCR); | ||
25 | __raw_writew((data & 0xffc3), PORT_PTCR); | ||
26 | } else if (port->mapbase == 0xa4438000) { /* SCIF1 */ | ||
27 | /* Clear PVCR bit 5-2 */ | ||
28 | data = __raw_readw(PORT_PVCR); | ||
29 | __raw_writew((data & 0xffc3), PORT_PVCR); | ||
30 | } | ||
31 | } | ||
32 | } | ||
33 | |||
34 | struct plat_sci_port_ops sh7720_sci_port_ops = { | ||
35 | .init_pins = sh7720_sci_init_pins, | ||
36 | }; | ||
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c index cd2e702feb7e..2309618c015d 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/serial_sci.h> | 15 | #include <linux/serial_sci.h> |
16 | #include <linux/sh_timer.h> | 16 | #include <linux/sh_timer.h> |
17 | #include <asm/rtc.h> | 17 | #include <asm/rtc.h> |
18 | #include <cpu/serial.h> | ||
18 | 19 | ||
19 | enum { | 20 | enum { |
20 | UNUSED = 0, | 21 | UNUSED = 0, |
@@ -75,6 +76,8 @@ static struct plat_sci_port scif0_platform_data = { | |||
75 | .scbrr_algo_id = SCBRR_ALGO_4, | 76 | .scbrr_algo_id = SCBRR_ALGO_4, |
76 | .type = PORT_SCIF, | 77 | .type = PORT_SCIF, |
77 | .irqs = { 56, 56, 56 }, | 78 | .irqs = { 56, 56, 56 }, |
79 | .ops = &sh770x_sci_port_ops, | ||
80 | .regtype = SCIx_SH7705_SCIF_REGTYPE, | ||
78 | }; | 81 | }; |
79 | 82 | ||
80 | static struct platform_device scif0_device = { | 83 | static struct platform_device scif0_device = { |
@@ -92,6 +95,8 @@ static struct plat_sci_port scif1_platform_data = { | |||
92 | .scbrr_algo_id = SCBRR_ALGO_4, | 95 | .scbrr_algo_id = SCBRR_ALGO_4, |
93 | .type = PORT_SCIF, | 96 | .type = PORT_SCIF, |
94 | .irqs = { 52, 52, 52 }, | 97 | .irqs = { 52, 52, 52 }, |
98 | .ops = &sh770x_sci_port_ops, | ||
99 | .regtype = SCIx_SH7705_SCIF_REGTYPE, | ||
95 | }; | 100 | }; |
96 | 101 | ||
97 | static struct platform_device scif1_device = { | 102 | static struct platform_device scif1_device = { |
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c index 4551ad647c2c..3f3d5fe5892d 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/serial.h> | 19 | #include <linux/serial.h> |
20 | #include <linux/serial_sci.h> | 20 | #include <linux/serial_sci.h> |
21 | #include <linux/sh_timer.h> | 21 | #include <linux/sh_timer.h> |
22 | #include <cpu/serial.h> | ||
22 | 23 | ||
23 | enum { | 24 | enum { |
24 | UNUSED = 0, | 25 | UNUSED = 0, |
@@ -108,11 +109,14 @@ static struct platform_device rtc_device = { | |||
108 | 109 | ||
109 | static struct plat_sci_port scif0_platform_data = { | 110 | static struct plat_sci_port scif0_platform_data = { |
110 | .mapbase = 0xfffffe80, | 111 | .mapbase = 0xfffffe80, |
112 | .port_reg = 0xa4000136, | ||
111 | .flags = UPF_BOOT_AUTOCONF, | 113 | .flags = UPF_BOOT_AUTOCONF, |
112 | .scscr = SCSCR_TE | SCSCR_RE, | 114 | .scscr = SCSCR_TE | SCSCR_RE, |
113 | .scbrr_algo_id = SCBRR_ALGO_2, | 115 | .scbrr_algo_id = SCBRR_ALGO_2, |
114 | .type = PORT_SCI, | 116 | .type = PORT_SCI, |
115 | .irqs = { 23, 23, 23, 0 }, | 117 | .irqs = { 23, 23, 23, 0 }, |
118 | .ops = &sh770x_sci_port_ops, | ||
119 | .regshift = 1, | ||
116 | }; | 120 | }; |
117 | 121 | ||
118 | static struct platform_device scif0_device = { | 122 | static struct platform_device scif0_device = { |
@@ -132,6 +136,8 @@ static struct plat_sci_port scif1_platform_data = { | |||
132 | .scbrr_algo_id = SCBRR_ALGO_2, | 136 | .scbrr_algo_id = SCBRR_ALGO_2, |
133 | .type = PORT_SCIF, | 137 | .type = PORT_SCIF, |
134 | .irqs = { 56, 56, 56, 56 }, | 138 | .irqs = { 56, 56, 56, 56 }, |
139 | .ops = &sh770x_sci_port_ops, | ||
140 | .regtype = SCIx_SH3_SCIF_REGTYPE, | ||
135 | }; | 141 | }; |
136 | 142 | ||
137 | static struct platform_device scif1_device = { | 143 | static struct platform_device scif1_device = { |
@@ -146,11 +152,14 @@ static struct platform_device scif1_device = { | |||
146 | defined(CONFIG_CPU_SUBTYPE_SH7709) | 152 | defined(CONFIG_CPU_SUBTYPE_SH7709) |
147 | static struct plat_sci_port scif2_platform_data = { | 153 | static struct plat_sci_port scif2_platform_data = { |
148 | .mapbase = 0xa4000140, | 154 | .mapbase = 0xa4000140, |
155 | .port_reg = SCIx_NOT_SUPPORTED, | ||
149 | .flags = UPF_BOOT_AUTOCONF, | 156 | .flags = UPF_BOOT_AUTOCONF, |
150 | .scscr = SCSCR_TE | SCSCR_RE, | 157 | .scscr = SCSCR_TE | SCSCR_RE, |
151 | .scbrr_algo_id = SCBRR_ALGO_2, | 158 | .scbrr_algo_id = SCBRR_ALGO_2, |
152 | .type = PORT_IRDA, | 159 | .type = PORT_IRDA, |
153 | .irqs = { 52, 52, 52, 52 }, | 160 | .irqs = { 52, 52, 52, 52 }, |
161 | .ops = &sh770x_sci_port_ops, | ||
162 | .regshift = 1, | ||
154 | }; | 163 | }; |
155 | 164 | ||
156 | static struct platform_device scif2_device = { | 165 | static struct platform_device scif2_device = { |
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c index 365b94a6fcb7..94920345c14d 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/serial_sci.h> | 20 | #include <linux/serial_sci.h> |
21 | #include <linux/sh_timer.h> | 21 | #include <linux/sh_timer.h> |
22 | #include <asm/rtc.h> | 22 | #include <asm/rtc.h> |
23 | #include <cpu/serial.h> | ||
23 | 24 | ||
24 | static struct resource rtc_resources[] = { | 25 | static struct resource rtc_resources[] = { |
25 | [0] = { | 26 | [0] = { |
@@ -55,6 +56,8 @@ static struct plat_sci_port scif0_platform_data = { | |||
55 | .scbrr_algo_id = SCBRR_ALGO_4, | 56 | .scbrr_algo_id = SCBRR_ALGO_4, |
56 | .type = PORT_SCIF, | 57 | .type = PORT_SCIF, |
57 | .irqs = { 80, 80, 80, 80 }, | 58 | .irqs = { 80, 80, 80, 80 }, |
59 | .ops = &sh7720_sci_port_ops, | ||
60 | .regtype = SCIx_SH7705_SCIF_REGTYPE, | ||
58 | }; | 61 | }; |
59 | 62 | ||
60 | static struct platform_device scif0_device = { | 63 | static struct platform_device scif0_device = { |
@@ -72,6 +75,8 @@ static struct plat_sci_port scif1_platform_data = { | |||
72 | .scbrr_algo_id = SCBRR_ALGO_4, | 75 | .scbrr_algo_id = SCBRR_ALGO_4, |
73 | .type = PORT_SCIF, | 76 | .type = PORT_SCIF, |
74 | .irqs = { 81, 81, 81, 81 }, | 77 | .irqs = { 81, 81, 81, 81 }, |
78 | .ops = &sh7720_sci_port_ops, | ||
79 | .regtype = SCIx_SH7705_SCIF_REGTYPE, | ||
75 | }; | 80 | }; |
76 | 81 | ||
77 | static struct platform_device scif1_device = { | 82 | static struct platform_device scif1_device = { |
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c index e53b4b38bd11..c10db5b96e59 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * SH7750/SH7751 Setup | 2 | * SH7091/SH7750/SH7750S/SH7750R/SH7751/SH7751R Setup |
3 | * | 3 | * |
4 | * Copyright (C) 2006 Paul Mundt | 4 | * Copyright (C) 2006 Paul Mundt |
5 | * Copyright (C) 2006 Jamie Lenehan | 5 | * Copyright (C) 2006 Jamie Lenehan |
@@ -38,11 +38,13 @@ static struct platform_device rtc_device = { | |||
38 | 38 | ||
39 | static struct plat_sci_port sci_platform_data = { | 39 | static struct plat_sci_port sci_platform_data = { |
40 | .mapbase = 0xffe00000, | 40 | .mapbase = 0xffe00000, |
41 | .port_reg = 0xffe0001C | ||
41 | .flags = UPF_BOOT_AUTOCONF, | 42 | .flags = UPF_BOOT_AUTOCONF, |
42 | .scscr = SCSCR_TE | SCSCR_RE, | 43 | .scscr = SCSCR_TE | SCSCR_RE, |
43 | .scbrr_algo_id = SCBRR_ALGO_2, | 44 | .scbrr_algo_id = SCBRR_ALGO_2, |
44 | .type = PORT_SCI, | 45 | .type = PORT_SCI, |
45 | .irqs = { 23, 23, 23, 0 }, | 46 | .irqs = { 23, 23, 23, 0 }, |
47 | .regshift = 2, | ||
46 | }; | 48 | }; |
47 | 49 | ||
48 | static struct platform_device sci_device = { | 50 | static struct platform_device sci_device = { |
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c index 78bbf232e391..c0b4c774700e 100644 --- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c +++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c | |||
@@ -133,6 +133,7 @@ static struct plat_sci_port scif0_platform_data = { | |||
133 | .scbrr_algo_id = SCBRR_ALGO_2, | 133 | .scbrr_algo_id = SCBRR_ALGO_2, |
134 | .type = PORT_SCIF, | 134 | .type = PORT_SCIF, |
135 | .irqs = { 52, 53, 55, 54 }, | 135 | .irqs = { 52, 53, 55, 54 }, |
136 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
136 | }; | 137 | }; |
137 | 138 | ||
138 | static struct platform_device scif0_device = { | 139 | static struct platform_device scif0_device = { |
@@ -150,6 +151,7 @@ static struct plat_sci_port scif1_platform_data = { | |||
150 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 151 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
151 | .scbrr_algo_id = SCBRR_ALGO_2, | 152 | .scbrr_algo_id = SCBRR_ALGO_2, |
152 | .irqs = { 72, 73, 75, 74 }, | 153 | .irqs = { 72, 73, 75, 74 }, |
154 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
153 | }; | 155 | }; |
154 | 156 | ||
155 | static struct platform_device scif1_device = { | 157 | static struct platform_device scif1_device = { |
@@ -167,6 +169,7 @@ static struct plat_sci_port scif2_platform_data = { | |||
167 | .scbrr_algo_id = SCBRR_ALGO_2, | 169 | .scbrr_algo_id = SCBRR_ALGO_2, |
168 | .type = PORT_SCIF, | 170 | .type = PORT_SCIF, |
169 | .irqs = { 76, 77, 79, 78 }, | 171 | .irqs = { 76, 77, 79, 78 }, |
172 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
170 | }; | 173 | }; |
171 | 174 | ||
172 | static struct platform_device scif2_device = { | 175 | static struct platform_device scif2_device = { |
@@ -184,6 +187,7 @@ static struct plat_sci_port scif3_platform_data = { | |||
184 | .scbrr_algo_id = SCBRR_ALGO_2, | 187 | .scbrr_algo_id = SCBRR_ALGO_2, |
185 | .type = PORT_SCI, | 188 | .type = PORT_SCI, |
186 | .irqs = { 80, 81, 82, 0 }, | 189 | .irqs = { 80, 81, 82, 0 }, |
190 | .regshift = 2, | ||
187 | }; | 191 | }; |
188 | 192 | ||
189 | static struct platform_device scif3_device = { | 193 | static struct platform_device scif3_device = { |
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile index cc122b1d3035..c57fb287011e 100644 --- a/arch/sh/kernel/cpu/sh4a/Makefile +++ b/arch/sh/kernel/cpu/sh4a/Makefile | |||
@@ -10,7 +10,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o | |||
10 | obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o | 10 | obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o |
11 | obj-$(CONFIG_CPU_SUBTYPE_SH7786) += setup-sh7786.o intc-shx3.o | 11 | obj-$(CONFIG_CPU_SUBTYPE_SH7786) += setup-sh7786.o intc-shx3.o |
12 | obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o | 12 | obj-$(CONFIG_CPU_SUBTYPE_SH7343) += setup-sh7343.o |
13 | obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o | 13 | obj-$(CONFIG_CPU_SUBTYPE_SH7722) += setup-sh7722.o serial-sh7722.o |
14 | obj-$(CONFIG_CPU_SUBTYPE_SH7723) += setup-sh7723.o | 14 | obj-$(CONFIG_CPU_SUBTYPE_SH7723) += setup-sh7723.o |
15 | obj-$(CONFIG_CPU_SUBTYPE_SH7724) += setup-sh7724.o | 15 | obj-$(CONFIG_CPU_SUBTYPE_SH7724) += setup-sh7724.o |
16 | obj-$(CONFIG_CPU_SUBTYPE_SH7366) += setup-sh7366.o | 16 | obj-$(CONFIG_CPU_SUBTYPE_SH7366) += setup-sh7366.o |
diff --git a/arch/sh/kernel/cpu/sh4a/serial-sh7722.c b/arch/sh/kernel/cpu/sh4a/serial-sh7722.c new file mode 100644 index 000000000000..59bc3a72702e --- /dev/null +++ b/arch/sh/kernel/cpu/sh4a/serial-sh7722.c | |||
@@ -0,0 +1,23 @@ | |||
1 | #include <linux/serial_sci.h> | ||
2 | #include <linux/serial_core.h> | ||
3 | #include <linux/io.h> | ||
4 | |||
5 | #define PSCR 0xA405011E | ||
6 | |||
7 | static void sh7722_sci_init_pins(struct uart_port *port, unsigned int cflag) | ||
8 | { | ||
9 | unsigned short data; | ||
10 | |||
11 | if (port->mapbase == 0xffe00000) { | ||
12 | data = __raw_readw(PSCR); | ||
13 | data &= ~0x03cf; | ||
14 | if (!(cflag & CRTSCTS)) | ||
15 | data |= 0x0340; | ||
16 | |||
17 | __raw_writew(data, PSCR); | ||
18 | } | ||
19 | } | ||
20 | |||
21 | struct plat_sci_port_ops sh7722_sci_port_ops = { | ||
22 | .init_pins = sh7722_sci_init_pins, | ||
23 | }; | ||
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c index 82616af64d62..87773869a2f3 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | static struct plat_sci_port scif0_platform_data = { | 21 | static struct plat_sci_port scif0_platform_data = { |
22 | .mapbase = 0xffe00000, | 22 | .mapbase = 0xffe00000, |
23 | .port_reg = 0xa405013e, | ||
23 | .flags = UPF_BOOT_AUTOCONF, | 24 | .flags = UPF_BOOT_AUTOCONF, |
24 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 25 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
25 | .scbrr_algo_id = SCBRR_ALGO_2, | 26 | .scbrr_algo_id = SCBRR_ALGO_2, |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c index 5813d8023619..863249dbf05b 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c | |||
@@ -185,6 +185,8 @@ static struct plat_sci_port scif0_platform_data = { | |||
185 | .scbrr_algo_id = SCBRR_ALGO_2, | 185 | .scbrr_algo_id = SCBRR_ALGO_2, |
186 | .type = PORT_SCIF, | 186 | .type = PORT_SCIF, |
187 | .irqs = { 80, 80, 80, 80 }, | 187 | .irqs = { 80, 80, 80, 80 }, |
188 | .ops = &sh7722_sci_port_ops, | ||
189 | .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, | ||
188 | }; | 190 | }; |
189 | 191 | ||
190 | static struct platform_device scif0_device = { | 192 | static struct platform_device scif0_device = { |
@@ -202,6 +204,8 @@ static struct plat_sci_port scif1_platform_data = { | |||
202 | .scbrr_algo_id = SCBRR_ALGO_2, | 204 | .scbrr_algo_id = SCBRR_ALGO_2, |
203 | .type = PORT_SCIF, | 205 | .type = PORT_SCIF, |
204 | .irqs = { 81, 81, 81, 81 }, | 206 | .irqs = { 81, 81, 81, 81 }, |
207 | .ops = &sh7722_sci_port_ops, | ||
208 | .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, | ||
205 | }; | 209 | }; |
206 | 210 | ||
207 | static struct platform_device scif1_device = { | 211 | static struct platform_device scif1_device = { |
@@ -219,6 +223,8 @@ static struct plat_sci_port scif2_platform_data = { | |||
219 | .scbrr_algo_id = SCBRR_ALGO_2, | 223 | .scbrr_algo_id = SCBRR_ALGO_2, |
220 | .type = PORT_SCIF, | 224 | .type = PORT_SCIF, |
221 | .irqs = { 82, 82, 82, 82 }, | 225 | .irqs = { 82, 82, 82, 82 }, |
226 | .ops = &sh7722_sci_port_ops, | ||
227 | .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, | ||
222 | }; | 228 | }; |
223 | 229 | ||
224 | static struct platform_device scif2_device = { | 230 | static struct platform_device scif2_device = { |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c index 072382280f96..3c2810d8f72e 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c | |||
@@ -23,11 +23,13 @@ | |||
23 | /* Serial */ | 23 | /* Serial */ |
24 | static struct plat_sci_port scif0_platform_data = { | 24 | static struct plat_sci_port scif0_platform_data = { |
25 | .mapbase = 0xffe00000, | 25 | .mapbase = 0xffe00000, |
26 | .port_reg = 0xa4050160, | ||
26 | .flags = UPF_BOOT_AUTOCONF, | 27 | .flags = UPF_BOOT_AUTOCONF, |
27 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 28 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
28 | .scbrr_algo_id = SCBRR_ALGO_2, | 29 | .scbrr_algo_id = SCBRR_ALGO_2, |
29 | .type = PORT_SCIF, | 30 | .type = PORT_SCIF, |
30 | .irqs = { 80, 80, 80, 80 }, | 31 | .irqs = { 80, 80, 80, 80 }, |
32 | .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, | ||
31 | }; | 33 | }; |
32 | 34 | ||
33 | static struct platform_device scif0_device = { | 35 | static struct platform_device scif0_device = { |
@@ -40,11 +42,13 @@ static struct platform_device scif0_device = { | |||
40 | 42 | ||
41 | static struct plat_sci_port scif1_platform_data = { | 43 | static struct plat_sci_port scif1_platform_data = { |
42 | .mapbase = 0xffe10000, | 44 | .mapbase = 0xffe10000, |
45 | .port_reg = SCIx_NOT_SUPPORTED, | ||
43 | .flags = UPF_BOOT_AUTOCONF, | 46 | .flags = UPF_BOOT_AUTOCONF, |
44 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 47 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
45 | .scbrr_algo_id = SCBRR_ALGO_2, | 48 | .scbrr_algo_id = SCBRR_ALGO_2, |
46 | .type = PORT_SCIF, | 49 | .type = PORT_SCIF, |
47 | .irqs = { 81, 81, 81, 81 }, | 50 | .irqs = { 81, 81, 81, 81 }, |
51 | .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, | ||
48 | }; | 52 | }; |
49 | 53 | ||
50 | static struct platform_device scif1_device = { | 54 | static struct platform_device scif1_device = { |
@@ -57,11 +61,13 @@ static struct platform_device scif1_device = { | |||
57 | 61 | ||
58 | static struct plat_sci_port scif2_platform_data = { | 62 | static struct plat_sci_port scif2_platform_data = { |
59 | .mapbase = 0xffe20000, | 63 | .mapbase = 0xffe20000, |
64 | .port_reg = SCIx_NOT_SUPPORTED, | ||
60 | .flags = UPF_BOOT_AUTOCONF, | 65 | .flags = UPF_BOOT_AUTOCONF, |
61 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 66 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
62 | .scbrr_algo_id = SCBRR_ALGO_2, | 67 | .scbrr_algo_id = SCBRR_ALGO_2, |
63 | .type = PORT_SCIF, | 68 | .type = PORT_SCIF, |
64 | .irqs = { 82, 82, 82, 82 }, | 69 | .irqs = { 82, 82, 82, 82 }, |
70 | .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, | ||
65 | }; | 71 | }; |
66 | 72 | ||
67 | static struct platform_device scif2_device = { | 73 | static struct platform_device scif2_device = { |
@@ -75,6 +81,7 @@ static struct platform_device scif2_device = { | |||
75 | static struct plat_sci_port scif3_platform_data = { | 81 | static struct plat_sci_port scif3_platform_data = { |
76 | .mapbase = 0xa4e30000, | 82 | .mapbase = 0xa4e30000, |
77 | .flags = UPF_BOOT_AUTOCONF, | 83 | .flags = UPF_BOOT_AUTOCONF, |
84 | .port_reg = SCIx_NOT_SUPPORTED, | ||
78 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 85 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
79 | .scbrr_algo_id = SCBRR_ALGO_3, | 86 | .scbrr_algo_id = SCBRR_ALGO_3, |
80 | .type = PORT_SCIFA, | 87 | .type = PORT_SCIFA, |
@@ -91,6 +98,7 @@ static struct platform_device scif3_device = { | |||
91 | 98 | ||
92 | static struct plat_sci_port scif4_platform_data = { | 99 | static struct plat_sci_port scif4_platform_data = { |
93 | .mapbase = 0xa4e40000, | 100 | .mapbase = 0xa4e40000, |
101 | .port_reg = SCIx_NOT_SUPPORTED, | ||
94 | .flags = UPF_BOOT_AUTOCONF, | 102 | .flags = UPF_BOOT_AUTOCONF, |
95 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 103 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
96 | .scbrr_algo_id = SCBRR_ALGO_3, | 104 | .scbrr_algo_id = SCBRR_ALGO_3, |
@@ -108,6 +116,7 @@ static struct platform_device scif4_device = { | |||
108 | 116 | ||
109 | static struct plat_sci_port scif5_platform_data = { | 117 | static struct plat_sci_port scif5_platform_data = { |
110 | .mapbase = 0xa4e50000, | 118 | .mapbase = 0xa4e50000, |
119 | .port_reg = SCIx_NOT_SUPPORTED, | ||
111 | .flags = UPF_BOOT_AUTOCONF, | 120 | .flags = UPF_BOOT_AUTOCONF, |
112 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 121 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
113 | .scbrr_algo_id = SCBRR_ALGO_3, | 122 | .scbrr_algo_id = SCBRR_ALGO_3, |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index 0333fe9e3881..8c892887ebd7 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c | |||
@@ -256,11 +256,13 @@ static struct platform_device dma1_device = { | |||
256 | /* Serial */ | 256 | /* Serial */ |
257 | static struct plat_sci_port scif0_platform_data = { | 257 | static struct plat_sci_port scif0_platform_data = { |
258 | .mapbase = 0xffe00000, | 258 | .mapbase = 0xffe00000, |
259 | .port_reg = SCIx_NOT_SUPPORTED, | ||
259 | .flags = UPF_BOOT_AUTOCONF, | 260 | .flags = UPF_BOOT_AUTOCONF, |
260 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 261 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
261 | .scbrr_algo_id = SCBRR_ALGO_2, | 262 | .scbrr_algo_id = SCBRR_ALGO_2, |
262 | .type = PORT_SCIF, | 263 | .type = PORT_SCIF, |
263 | .irqs = { 80, 80, 80, 80 }, | 264 | .irqs = { 80, 80, 80, 80 }, |
265 | .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, | ||
264 | }; | 266 | }; |
265 | 267 | ||
266 | static struct platform_device scif0_device = { | 268 | static struct platform_device scif0_device = { |
@@ -273,11 +275,13 @@ static struct platform_device scif0_device = { | |||
273 | 275 | ||
274 | static struct plat_sci_port scif1_platform_data = { | 276 | static struct plat_sci_port scif1_platform_data = { |
275 | .mapbase = 0xffe10000, | 277 | .mapbase = 0xffe10000, |
278 | .port_reg = SCIx_NOT_SUPPORTED, | ||
276 | .flags = UPF_BOOT_AUTOCONF, | 279 | .flags = UPF_BOOT_AUTOCONF, |
277 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 280 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
278 | .scbrr_algo_id = SCBRR_ALGO_2, | 281 | .scbrr_algo_id = SCBRR_ALGO_2, |
279 | .type = PORT_SCIF, | 282 | .type = PORT_SCIF, |
280 | .irqs = { 81, 81, 81, 81 }, | 283 | .irqs = { 81, 81, 81, 81 }, |
284 | .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, | ||
281 | }; | 285 | }; |
282 | 286 | ||
283 | static struct platform_device scif1_device = { | 287 | static struct platform_device scif1_device = { |
@@ -290,11 +294,13 @@ static struct platform_device scif1_device = { | |||
290 | 294 | ||
291 | static struct plat_sci_port scif2_platform_data = { | 295 | static struct plat_sci_port scif2_platform_data = { |
292 | .mapbase = 0xffe20000, | 296 | .mapbase = 0xffe20000, |
297 | .port_reg = SCIx_NOT_SUPPORTED, | ||
293 | .flags = UPF_BOOT_AUTOCONF, | 298 | .flags = UPF_BOOT_AUTOCONF, |
294 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | 299 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, |
295 | .scbrr_algo_id = SCBRR_ALGO_2, | 300 | .scbrr_algo_id = SCBRR_ALGO_2, |
296 | .type = PORT_SCIF, | 301 | .type = PORT_SCIF, |
297 | .irqs = { 82, 82, 82, 82 }, | 302 | .irqs = { 82, 82, 82, 82 }, |
303 | .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, | ||
298 | }; | 304 | }; |
299 | 305 | ||
300 | static struct platform_device scif2_device = { | 306 | static struct platform_device scif2_device = { |
@@ -307,6 +313,7 @@ static struct platform_device scif2_device = { | |||
307 | 313 | ||
308 | static struct plat_sci_port scif3_platform_data = { | 314 | static struct plat_sci_port scif3_platform_data = { |
309 | .mapbase = 0xa4e30000, | 315 | .mapbase = 0xa4e30000, |
316 | .port_reg = SCIx_NOT_SUPPORTED, | ||
310 | .flags = UPF_BOOT_AUTOCONF, | 317 | .flags = UPF_BOOT_AUTOCONF, |
311 | .scscr = SCSCR_RE | SCSCR_TE, | 318 | .scscr = SCSCR_RE | SCSCR_TE, |
312 | .scbrr_algo_id = SCBRR_ALGO_3, | 319 | .scbrr_algo_id = SCBRR_ALGO_3, |
@@ -324,6 +331,7 @@ static struct platform_device scif3_device = { | |||
324 | 331 | ||
325 | static struct plat_sci_port scif4_platform_data = { | 332 | static struct plat_sci_port scif4_platform_data = { |
326 | .mapbase = 0xa4e40000, | 333 | .mapbase = 0xa4e40000, |
334 | .port_reg = SCIx_NOT_SUPPORTED, | ||
327 | .flags = UPF_BOOT_AUTOCONF, | 335 | .flags = UPF_BOOT_AUTOCONF, |
328 | .scscr = SCSCR_RE | SCSCR_TE, | 336 | .scscr = SCSCR_RE | SCSCR_TE, |
329 | .scbrr_algo_id = SCBRR_ALGO_3, | 337 | .scbrr_algo_id = SCBRR_ALGO_3, |
@@ -341,6 +349,7 @@ static struct platform_device scif4_device = { | |||
341 | 349 | ||
342 | static struct plat_sci_port scif5_platform_data = { | 350 | static struct plat_sci_port scif5_platform_data = { |
343 | .mapbase = 0xa4e50000, | 351 | .mapbase = 0xa4e50000, |
352 | .port_reg = SCIx_NOT_SUPPORTED, | ||
344 | .flags = UPF_BOOT_AUTOCONF, | 353 | .flags = UPF_BOOT_AUTOCONF, |
345 | .scscr = SCSCR_RE | SCSCR_TE, | 354 | .scscr = SCSCR_RE | SCSCR_TE, |
346 | .scbrr_algo_id = SCBRR_ALGO_3, | 355 | .scbrr_algo_id = SCBRR_ALGO_3, |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c index 593eca6509b5..00113515f233 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c | |||
@@ -23,6 +23,7 @@ static struct plat_sci_port scif0_platform_data = { | |||
23 | .scbrr_algo_id = SCBRR_ALGO_2, | 23 | .scbrr_algo_id = SCBRR_ALGO_2, |
24 | .type = PORT_SCIF, | 24 | .type = PORT_SCIF, |
25 | .irqs = { 40, 40, 40, 40 }, | 25 | .irqs = { 40, 40, 40, 40 }, |
26 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
26 | }; | 27 | }; |
27 | 28 | ||
28 | static struct platform_device scif0_device = { | 29 | static struct platform_device scif0_device = { |
@@ -40,6 +41,7 @@ static struct plat_sci_port scif1_platform_data = { | |||
40 | .scbrr_algo_id = SCBRR_ALGO_2, | 41 | .scbrr_algo_id = SCBRR_ALGO_2, |
41 | .type = PORT_SCIF, | 42 | .type = PORT_SCIF, |
42 | .irqs = { 76, 76, 76, 76 }, | 43 | .irqs = { 76, 76, 76, 76 }, |
44 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
43 | }; | 45 | }; |
44 | 46 | ||
45 | static struct platform_device scif1_device = { | 47 | static struct platform_device scif1_device = { |
@@ -57,6 +59,7 @@ static struct plat_sci_port scif2_platform_data = { | |||
57 | .scbrr_algo_id = SCBRR_ALGO_2, | 59 | .scbrr_algo_id = SCBRR_ALGO_2, |
58 | .type = PORT_SCIF, | 60 | .type = PORT_SCIF, |
59 | .irqs = { 104, 104, 104, 104 }, | 61 | .irqs = { 104, 104, 104, 104 }, |
62 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
60 | }; | 63 | }; |
61 | 64 | ||
62 | static struct platform_device scif2_device = { | 65 | static struct platform_device scif2_device = { |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c index 08add7fa6849..3d4d2075c19a 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c | |||
@@ -14,7 +14,6 @@ | |||
14 | #include <linux/serial_sci.h> | 14 | #include <linux/serial_sci.h> |
15 | #include <linux/sh_dma.h> | 15 | #include <linux/sh_dma.h> |
16 | #include <linux/sh_timer.h> | 16 | #include <linux/sh_timer.h> |
17 | |||
18 | #include <cpu/dma-register.h> | 17 | #include <cpu/dma-register.h> |
19 | 18 | ||
20 | static struct plat_sci_port scif0_platform_data = { | 19 | static struct plat_sci_port scif0_platform_data = { |
@@ -24,6 +23,7 @@ static struct plat_sci_port scif0_platform_data = { | |||
24 | .scbrr_algo_id = SCBRR_ALGO_1, | 23 | .scbrr_algo_id = SCBRR_ALGO_1, |
25 | .type = PORT_SCIF, | 24 | .type = PORT_SCIF, |
26 | .irqs = { 40, 40, 40, 40 }, | 25 | .irqs = { 40, 40, 40, 40 }, |
26 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
27 | }; | 27 | }; |
28 | 28 | ||
29 | static struct platform_device scif0_device = { | 29 | static struct platform_device scif0_device = { |
@@ -41,6 +41,7 @@ static struct plat_sci_port scif1_platform_data = { | |||
41 | .scbrr_algo_id = SCBRR_ALGO_1, | 41 | .scbrr_algo_id = SCBRR_ALGO_1, |
42 | .type = PORT_SCIF, | 42 | .type = PORT_SCIF, |
43 | .irqs = { 76, 76, 76, 76 }, | 43 | .irqs = { 76, 76, 76, 76 }, |
44 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
44 | }; | 45 | }; |
45 | 46 | ||
46 | static struct platform_device scif1_device = { | 47 | static struct platform_device scif1_device = { |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index 18d8fc136fb2..b29e6340414a 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c | |||
@@ -15,9 +15,7 @@ | |||
15 | #include <linux/mm.h> | 15 | #include <linux/mm.h> |
16 | #include <linux/sh_dma.h> | 16 | #include <linux/sh_dma.h> |
17 | #include <linux/sh_timer.h> | 17 | #include <linux/sh_timer.h> |
18 | |||
19 | #include <asm/mmzone.h> | 18 | #include <asm/mmzone.h> |
20 | |||
21 | #include <cpu/dma-register.h> | 19 | #include <cpu/dma-register.h> |
22 | 20 | ||
23 | static struct plat_sci_port scif0_platform_data = { | 21 | static struct plat_sci_port scif0_platform_data = { |
@@ -27,6 +25,7 @@ static struct plat_sci_port scif0_platform_data = { | |||
27 | .scbrr_algo_id = SCBRR_ALGO_1, | 25 | .scbrr_algo_id = SCBRR_ALGO_1, |
28 | .type = PORT_SCIF, | 26 | .type = PORT_SCIF, |
29 | .irqs = { 40, 40, 40, 40 }, | 27 | .irqs = { 40, 40, 40, 40 }, |
28 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
30 | }; | 29 | }; |
31 | 30 | ||
32 | static struct platform_device scif0_device = { | 31 | static struct platform_device scif0_device = { |
@@ -44,6 +43,7 @@ static struct plat_sci_port scif1_platform_data = { | |||
44 | .scbrr_algo_id = SCBRR_ALGO_1, | 43 | .scbrr_algo_id = SCBRR_ALGO_1, |
45 | .type = PORT_SCIF, | 44 | .type = PORT_SCIF, |
46 | .irqs = { 44, 44, 44, 44 }, | 45 | .irqs = { 44, 44, 44, 44 }, |
46 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
47 | }; | 47 | }; |
48 | 48 | ||
49 | static struct platform_device scif1_device = { | 49 | static struct platform_device scif1_device = { |
@@ -61,6 +61,7 @@ static struct plat_sci_port scif2_platform_data = { | |||
61 | .scbrr_algo_id = SCBRR_ALGO_1, | 61 | .scbrr_algo_id = SCBRR_ALGO_1, |
62 | .type = PORT_SCIF, | 62 | .type = PORT_SCIF, |
63 | .irqs = { 60, 60, 60, 60 }, | 63 | .irqs = { 60, 60, 60, 60 }, |
64 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
64 | }; | 65 | }; |
65 | 66 | ||
66 | static struct platform_device scif2_device = { | 67 | static struct platform_device scif2_device = { |
@@ -78,6 +79,7 @@ static struct plat_sci_port scif3_platform_data = { | |||
78 | .scbrr_algo_id = SCBRR_ALGO_1, | 79 | .scbrr_algo_id = SCBRR_ALGO_1, |
79 | .type = PORT_SCIF, | 80 | .type = PORT_SCIF, |
80 | .irqs = { 61, 61, 61, 61 }, | 81 | .irqs = { 61, 61, 61, 61 }, |
82 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
81 | }; | 83 | }; |
82 | 84 | ||
83 | static struct platform_device scif3_device = { | 85 | static struct platform_device scif3_device = { |
@@ -95,6 +97,7 @@ static struct plat_sci_port scif4_platform_data = { | |||
95 | .scbrr_algo_id = SCBRR_ALGO_1, | 97 | .scbrr_algo_id = SCBRR_ALGO_1, |
96 | .type = PORT_SCIF, | 98 | .type = PORT_SCIF, |
97 | .irqs = { 62, 62, 62, 62 }, | 99 | .irqs = { 62, 62, 62, 62 }, |
100 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
98 | }; | 101 | }; |
99 | 102 | ||
100 | static struct platform_device scif4_device = { | 103 | static struct platform_device scif4_device = { |
@@ -112,6 +115,7 @@ static struct plat_sci_port scif5_platform_data = { | |||
112 | .scbrr_algo_id = SCBRR_ALGO_1, | 115 | .scbrr_algo_id = SCBRR_ALGO_1, |
113 | .type = PORT_SCIF, | 116 | .type = PORT_SCIF, |
114 | .irqs = { 63, 63, 63, 63 }, | 117 | .irqs = { 63, 63, 63, 63 }, |
118 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
115 | }; | 119 | }; |
116 | 120 | ||
117 | static struct platform_device scif5_device = { | 121 | static struct platform_device scif5_device = { |
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c index beba32beb6d9..dd5e709f9821 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * SH7786 Setup | 2 | * SH7786 Setup |
3 | * | 3 | * |
4 | * Copyright (C) 2009 - 2010 Renesas Solutions Corp. | 4 | * Copyright (C) 2009 - 2011 Renesas Solutions Corp. |
5 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | 5 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> |
6 | * Paul Mundt <paul.mundt@renesas.com> | 6 | * Paul Mundt <paul.mundt@renesas.com> |
7 | * | 7 | * |
@@ -33,6 +33,7 @@ static struct plat_sci_port scif0_platform_data = { | |||
33 | .scbrr_algo_id = SCBRR_ALGO_1, | 33 | .scbrr_algo_id = SCBRR_ALGO_1, |
34 | .type = PORT_SCIF, | 34 | .type = PORT_SCIF, |
35 | .irqs = { 40, 41, 43, 42 }, | 35 | .irqs = { 40, 41, 43, 42 }, |
36 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
36 | }; | 37 | }; |
37 | 38 | ||
38 | static struct platform_device scif0_device = { | 39 | static struct platform_device scif0_device = { |
@@ -53,6 +54,7 @@ static struct plat_sci_port scif1_platform_data = { | |||
53 | .scbrr_algo_id = SCBRR_ALGO_1, | 54 | .scbrr_algo_id = SCBRR_ALGO_1, |
54 | .type = PORT_SCIF, | 55 | .type = PORT_SCIF, |
55 | .irqs = { 44, 44, 44, 44 }, | 56 | .irqs = { 44, 44, 44, 44 }, |
57 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
56 | }; | 58 | }; |
57 | 59 | ||
58 | static struct platform_device scif1_device = { | 60 | static struct platform_device scif1_device = { |
@@ -70,6 +72,7 @@ static struct plat_sci_port scif2_platform_data = { | |||
70 | .scbrr_algo_id = SCBRR_ALGO_1, | 72 | .scbrr_algo_id = SCBRR_ALGO_1, |
71 | .type = PORT_SCIF, | 73 | .type = PORT_SCIF, |
72 | .irqs = { 50, 50, 50, 50 }, | 74 | .irqs = { 50, 50, 50, 50 }, |
75 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
73 | }; | 76 | }; |
74 | 77 | ||
75 | static struct platform_device scif2_device = { | 78 | static struct platform_device scif2_device = { |
@@ -87,6 +90,7 @@ static struct plat_sci_port scif3_platform_data = { | |||
87 | .scbrr_algo_id = SCBRR_ALGO_1, | 90 | .scbrr_algo_id = SCBRR_ALGO_1, |
88 | .type = PORT_SCIF, | 91 | .type = PORT_SCIF, |
89 | .irqs = { 51, 51, 51, 51 }, | 92 | .irqs = { 51, 51, 51, 51 }, |
93 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
90 | }; | 94 | }; |
91 | 95 | ||
92 | static struct platform_device scif3_device = { | 96 | static struct platform_device scif3_device = { |
@@ -104,6 +108,7 @@ static struct plat_sci_port scif4_platform_data = { | |||
104 | .scbrr_algo_id = SCBRR_ALGO_1, | 108 | .scbrr_algo_id = SCBRR_ALGO_1, |
105 | .type = PORT_SCIF, | 109 | .type = PORT_SCIF, |
106 | .irqs = { 52, 52, 52, 52 }, | 110 | .irqs = { 52, 52, 52, 52 }, |
111 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
107 | }; | 112 | }; |
108 | 113 | ||
109 | static struct platform_device scif4_device = { | 114 | static struct platform_device scif4_device = { |
@@ -121,6 +126,7 @@ static struct plat_sci_port scif5_platform_data = { | |||
121 | .scbrr_algo_id = SCBRR_ALGO_1, | 126 | .scbrr_algo_id = SCBRR_ALGO_1, |
122 | .type = PORT_SCIF, | 127 | .type = PORT_SCIF, |
123 | .irqs = { 53, 53, 53, 53 }, | 128 | .irqs = { 53, 53, 53, 53 }, |
129 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | ||
124 | }; | 130 | }; |
125 | 131 | ||
126 | static struct platform_device scif5_device = { | 132 | static struct platform_device scif5_device = { |