diff options
author | Magnus Damm <damm@opensource.se> | 2010-05-11 05:35:45 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-05-13 04:36:27 -0400 |
commit | 8249a3113094b826c5010d27c8cf07a395be2abc (patch) | |
tree | 8ce744be366370758eda93ce847b9e96891e1722 /arch/sh | |
parent | 925bb17b725ba84159bac9defebac0cb46e01e4f (diff) |
sh: switch sh7343 to clkdev
This patch converts the remaining sh7343 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7343.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c index e2e8cc278044..71291ae201b9 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c | |||
@@ -37,8 +37,6 @@ | |||
37 | 37 | ||
38 | /* Fixed 32 KHz root clock for RTC and Power Management purposes */ | 38 | /* Fixed 32 KHz root clock for RTC and Power Management purposes */ |
39 | static struct clk r_clk = { | 39 | static struct clk r_clk = { |
40 | .name = "rclk", | ||
41 | .id = -1, | ||
42 | .rate = 32768, | 40 | .rate = 32768, |
43 | }; | 41 | }; |
44 | 42 | ||
@@ -47,8 +45,6 @@ static struct clk r_clk = { | |||
47 | * from the platform code. | 45 | * from the platform code. |
48 | */ | 46 | */ |
49 | struct clk extal_clk = { | 47 | struct clk extal_clk = { |
50 | .name = "extal", | ||
51 | .id = -1, | ||
52 | .rate = 33333333, | 48 | .rate = 33333333, |
53 | }; | 49 | }; |
54 | 50 | ||
@@ -70,8 +66,6 @@ static struct clk_ops dll_clk_ops = { | |||
70 | }; | 66 | }; |
71 | 67 | ||
72 | static struct clk dll_clk = { | 68 | static struct clk dll_clk = { |
73 | .name = "dll_clk", | ||
74 | .id = -1, | ||
75 | .ops = &dll_clk_ops, | 69 | .ops = &dll_clk_ops, |
76 | .parent = &r_clk, | 70 | .parent = &r_clk, |
77 | .flags = CLK_ENABLE_ON_INIT, | 71 | .flags = CLK_ENABLE_ON_INIT, |
@@ -92,8 +86,6 @@ static struct clk_ops pll_clk_ops = { | |||
92 | }; | 86 | }; |
93 | 87 | ||
94 | static struct clk pll_clk = { | 88 | static struct clk pll_clk = { |
95 | .name = "pll_clk", | ||
96 | .id = -1, | ||
97 | .ops = &pll_clk_ops, | 89 | .ops = &pll_clk_ops, |
98 | .flags = CLK_ENABLE_ON_INIT, | 90 | .flags = CLK_ENABLE_ON_INIT, |
99 | }; | 91 | }; |
@@ -205,6 +197,12 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
205 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } | 197 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } |
206 | 198 | ||
207 | static struct clk_lookup lookups[] = { | 199 | static struct clk_lookup lookups[] = { |
200 | /* main clocks */ | ||
201 | CLKDEV_CON_ID("rclk", &r_clk), | ||
202 | CLKDEV_CON_ID("extal", &extal_clk), | ||
203 | CLKDEV_CON_ID("dll_clk", &dll_clk), | ||
204 | CLKDEV_CON_ID("pll_clk", &pll_clk), | ||
205 | |||
208 | /* DIV4 clocks */ | 206 | /* DIV4 clocks */ |
209 | CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), | 207 | CLKDEV_CON_ID("cpu_clk", &div4_clks[DIV4_I]), |
210 | CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]), | 208 | CLKDEV_CON_ID("umem_clk", &div4_clks[DIV4_U]), |