diff options
author | Magnus Damm <damm@opensource.se> | 2010-05-11 05:36:03 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2010-05-13 04:36:40 -0400 |
commit | 4a81fe625efc8b9122eb4473dab31fa90e07a381 (patch) | |
tree | 94f121766f3c2a0af196d911e9384750f1c18bb2 /arch/sh | |
parent | 59aa69d9c20b1ee15fa26aa6631b555aaef91323 (diff) |
sh: switch sh7785 to clkdev
This patch converts the remaining sh7785 clocks
to use clkdev for lookup. The now unused name
and id from struct clk are also removed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7785.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c index a7a8eecfbda4..c3e458aaa2b7 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c | |||
@@ -24,8 +24,6 @@ | |||
24 | * from the platform code. | 24 | * from the platform code. |
25 | */ | 25 | */ |
26 | static struct clk extal_clk = { | 26 | static struct clk extal_clk = { |
27 | .name = "extal", | ||
28 | .id = -1, | ||
29 | .rate = 33333333, | 27 | .rate = 33333333, |
30 | }; | 28 | }; |
31 | 29 | ||
@@ -43,8 +41,6 @@ static struct clk_ops pll_clk_ops = { | |||
43 | }; | 41 | }; |
44 | 42 | ||
45 | static struct clk pll_clk = { | 43 | static struct clk pll_clk = { |
46 | .name = "pll_clk", | ||
47 | .id = -1, | ||
48 | .ops = &pll_clk_ops, | 44 | .ops = &pll_clk_ops, |
49 | .parent = &extal_clk, | 45 | .parent = &extal_clk, |
50 | .flags = CLK_ENABLE_ON_INIT, | 46 | .flags = CLK_ENABLE_ON_INIT, |
@@ -123,6 +119,10 @@ static struct clk mstp_clks[MSTP_NR] = { | |||
123 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } | 119 | #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } |
124 | 120 | ||
125 | static struct clk_lookup lookups[] = { | 121 | static struct clk_lookup lookups[] = { |
122 | /* main clocks */ | ||
123 | CLKDEV_CON_ID("extal", &extal_clk), | ||
124 | CLKDEV_CON_ID("pll_clk", &pll_clk), | ||
125 | |||
126 | /* DIV4 clocks */ | 126 | /* DIV4 clocks */ |
127 | CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]), | 127 | CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]), |
128 | CLKDEV_CON_ID("du_clk", &div4_clks[DIV4_DU]), | 128 | CLKDEV_CON_ID("du_clk", &div4_clks[DIV4_DU]), |