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authorPaul Mundt <lethal@linux-sh.org>2007-11-08 05:21:50 -0500
committerPaul Mundt <lethal@linux-sh.org>2008-01-27 23:18:40 -0500
commitdb092ee6509ecd3f65843202982a8e2ff9e74cdd (patch)
treeccb70a3a0a6032ff465fe7053598b4a5b6f7f328 /arch/sh64
parent0fa70efbd45a6c4fd946fa71c0a609f2c509d07c (diff)
sh: Move sh64 boards to arch/sh/.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh64')
-rw-r--r--arch/sh64/mach-cayman/Makefile11
-rw-r--r--arch/sh64/mach-cayman/iomap.c22
-rw-r--r--arch/sh64/mach-cayman/irq.c195
-rw-r--r--arch/sh64/mach-cayman/led.c51
-rw-r--r--arch/sh64/mach-cayman/setup.c239
-rw-r--r--arch/sh64/mach-harp/Makefile1
-rw-r--r--arch/sh64/mach-harp/setup.c129
-rw-r--r--arch/sh64/mach-sim/Makefile1
-rw-r--r--arch/sh64/mach-sim/setup.c126
9 files changed, 0 insertions, 775 deletions
diff --git a/arch/sh64/mach-cayman/Makefile b/arch/sh64/mach-cayman/Makefile
deleted file mode 100644
index 67a2258bf8c4..000000000000
--- a/arch/sh64/mach-cayman/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
1#
2# Makefile for the Hitachi Cayman specific parts of the kernel
3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8
9obj-y := setup.o irq.o iomap.o
10obj-$(CONFIG_HEARTBEAT) += led.o
11
diff --git a/arch/sh64/mach-cayman/iomap.c b/arch/sh64/mach-cayman/iomap.c
deleted file mode 100644
index a5c645f02d57..000000000000
--- a/arch/sh64/mach-cayman/iomap.c
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * arch/sh64/mach-cayman/iomap.c
3 *
4 * Cayman iomap interface
5 *
6 * Copyright (C) 2004 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <asm/io.h>
13#include <asm/cayman.h>
14
15void __iomem *ioport_map(unsigned long port, unsigned int len)
16{
17 if (port < 0x400)
18 return (void __iomem *)((port << 2) | smsc_superio_virt);
19
20 return (void __iomem *)port;
21}
22
diff --git a/arch/sh64/mach-cayman/irq.c b/arch/sh64/mach-cayman/irq.c
deleted file mode 100644
index aaad36d37d1f..000000000000
--- a/arch/sh64/mach-cayman/irq.c
+++ /dev/null
@@ -1,195 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/irq_cayman.c
7 *
8 * SH-5 Cayman Interrupt Support
9 *
10 * This file handles the board specific parts of the Cayman interrupt system
11 *
12 * Copyright (C) 2002 Stuart Menefy
13 */
14
15#include <asm/irq.h>
16#include <asm/page.h>
17#include <asm/io.h>
18#include <linux/irq.h>
19#include <linux/interrupt.h>
20#include <linux/signal.h>
21#include <asm/cayman.h>
22
23unsigned long epld_virt;
24
25#define EPLD_BASE 0x04002000
26#define EPLD_STATUS_BASE (epld_virt + 0x10)
27#define EPLD_MASK_BASE (epld_virt + 0x20)
28
29/* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto
30 the same SH-5 interrupt */
31
32static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id)
33{
34 printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n");
35 return IRQ_NONE;
36}
37
38static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id)
39{
40 printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq);
41 return IRQ_NONE;
42}
43
44static struct irqaction cayman_action_smsc = {
45 .name = "Cayman SMSC Mux",
46 .handler = cayman_interrupt_smsc,
47 .flags = IRQF_DISABLED,
48};
49
50static struct irqaction cayman_action_pci2 = {
51 .name = "Cayman PCI2 Mux",
52 .handler = cayman_interrupt_pci2,
53 .flags = IRQF_DISABLED,
54};
55
56static void enable_cayman_irq(unsigned int irq)
57{
58 unsigned long flags;
59 unsigned long mask;
60 unsigned int reg;
61 unsigned char bit;
62
63 irq -= START_EXT_IRQS;
64 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
65 bit = 1<<(irq % 8);
66 local_irq_save(flags);
67 mask = ctrl_inl(reg);
68 mask |= bit;
69 ctrl_outl(mask, reg);
70 local_irq_restore(flags);
71}
72
73void disable_cayman_irq(unsigned int irq)
74{
75 unsigned long flags;
76 unsigned long mask;
77 unsigned int reg;
78 unsigned char bit;
79
80 irq -= START_EXT_IRQS;
81 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
82 bit = 1<<(irq % 8);
83 local_irq_save(flags);
84 mask = ctrl_inl(reg);
85 mask &= ~bit;
86 ctrl_outl(mask, reg);
87 local_irq_restore(flags);
88}
89
90static void ack_cayman_irq(unsigned int irq)
91{
92 disable_cayman_irq(irq);
93}
94
95static void end_cayman_irq(unsigned int irq)
96{
97 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
98 enable_cayman_irq(irq);
99}
100
101static unsigned int startup_cayman_irq(unsigned int irq)
102{
103 enable_cayman_irq(irq);
104 return 0; /* never anything pending */
105}
106
107static void shutdown_cayman_irq(unsigned int irq)
108{
109 disable_cayman_irq(irq);
110}
111
112struct hw_interrupt_type cayman_irq_type = {
113 .typename = "Cayman-IRQ",
114 .startup = startup_cayman_irq,
115 .shutdown = shutdown_cayman_irq,
116 .enable = enable_cayman_irq,
117 .disable = disable_cayman_irq,
118 .ack = ack_cayman_irq,
119 .end = end_cayman_irq,
120};
121
122int cayman_irq_demux(int evt)
123{
124 int irq = intc_evt_to_irq[evt];
125
126 if (irq == SMSC_IRQ) {
127 unsigned long status;
128 int i;
129
130 status = ctrl_inl(EPLD_STATUS_BASE) &
131 ctrl_inl(EPLD_MASK_BASE) & 0xff;
132 if (status == 0) {
133 irq = -1;
134 } else {
135 for (i=0; i<8; i++) {
136 if (status & (1<<i))
137 break;
138 }
139 irq = START_EXT_IRQS + i;
140 }
141 }
142
143 if (irq == PCI2_IRQ) {
144 unsigned long status;
145 int i;
146
147 status = ctrl_inl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
148 ctrl_inl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
149 if (status == 0) {
150 irq = -1;
151 } else {
152 for (i=0; i<8; i++) {
153 if (status & (1<<i))
154 break;
155 }
156 irq = START_EXT_IRQS + (3 * 8) + i;
157 }
158 }
159
160 return irq;
161}
162
163#if defined(CONFIG_PROC_FS) && defined(CONFIG_SYSCTL)
164int cayman_irq_describe(char* p, int irq)
165{
166 if (irq < NR_INTC_IRQS) {
167 return intc_irq_describe(p, irq);
168 } else if (irq < NR_INTC_IRQS + 8) {
169 return sprintf(p, "(SMSC %d)", irq - NR_INTC_IRQS);
170 } else if ((irq >= NR_INTC_IRQS + 24) && (irq < NR_INTC_IRQS + 32)) {
171 return sprintf(p, "(PCI2 %d)", irq - (NR_INTC_IRQS + 24));
172 }
173
174 return 0;
175}
176#endif
177
178void init_cayman_irq(void)
179{
180 int i;
181
182 epld_virt = onchip_remap(EPLD_BASE, 1024, "EPLD");
183 if (!epld_virt) {
184 printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n");
185 return;
186 }
187
188 for (i=0; i<NR_EXT_IRQS; i++) {
189 irq_desc[START_EXT_IRQS + i].chip = &cayman_irq_type;
190 }
191
192 /* Setup the SMSC interrupt */
193 setup_irq(SMSC_IRQ, &cayman_action_smsc);
194 setup_irq(PCI2_IRQ, &cayman_action_pci2);
195}
diff --git a/arch/sh64/mach-cayman/led.c b/arch/sh64/mach-cayman/led.c
deleted file mode 100644
index b4e122fd9502..000000000000
--- a/arch/sh64/mach-cayman/led.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * arch/sh64/mach-cayman/led.c
3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Flash the LEDs
10 */
11#include <asm/io.h>
12
13/*
14** It is supposed these functions to be used for a low level
15** debugging (via Cayman LEDs), hence to be available as soon
16** as possible.
17** Unfortunately Cayman LEDs relies on Cayman EPLD to be mapped
18** (this happen when IRQ are initialized... quite late).
19** These triky dependencies should be removed. Temporary, it
20** may be enough to NOP until EPLD is mapped.
21*/
22
23extern unsigned long epld_virt;
24
25#define LED_ADDR (epld_virt + 0x008)
26#define HDSP2534_ADDR (epld_virt + 0x100)
27
28void mach_led(int position, int value)
29{
30 if (!epld_virt)
31 return;
32
33 if (value)
34 ctrl_outl(0, LED_ADDR);
35 else
36 ctrl_outl(1, LED_ADDR);
37
38}
39
40void mach_alphanum(int position, unsigned char value)
41{
42 if (!epld_virt)
43 return;
44
45 ctrl_outb(value, HDSP2534_ADDR + 0xe0 + (position << 2));
46}
47
48void mach_alphanum_brightness(int setting)
49{
50 ctrl_outb(setting & 7, HDSP2534_ADDR + 0xc0);
51}
diff --git a/arch/sh64/mach-cayman/setup.c b/arch/sh64/mach-cayman/setup.c
deleted file mode 100644
index 726c520d7eb9..000000000000
--- a/arch/sh64/mach-cayman/setup.c
+++ /dev/null
@@ -1,239 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mach-cayman/setup.c
7 *
8 * SH5 Cayman support
9 *
10 * This file handles the architecture-dependent parts of initialization
11 *
12 * Copyright David J. Mckay.
13 * Needs major work!
14 *
15 * benedict.gaster@superh.com: 3rd May 2002
16 * Added support for ramdisk, removing statically linked romfs at the same time.
17 *
18 * lethal@linux-sh.org: 15th May 2003
19 * Use the generic procfs cpuinfo interface, just return a valid board name.
20 */
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <asm/platform.h>
24#include <asm/irq.h>
25#include <asm/io.h>
26
27/*
28 * Platform Dependent Interrupt Priorities.
29 */
30
31/* Using defaults defined in irq.h */
32#define RES NO_PRIORITY /* Disabled */
33#define IR0 IRL0_PRIORITY /* IRLs */
34#define IR1 IRL1_PRIORITY
35#define IR2 IRL2_PRIORITY
36#define IR3 IRL3_PRIORITY
37#define PCA INTA_PRIORITY /* PCI Ints */
38#define PCB INTB_PRIORITY
39#define PCC INTC_PRIORITY
40#define PCD INTD_PRIORITY
41#define SER TOP_PRIORITY
42#define ERR TOP_PRIORITY
43#define PW0 TOP_PRIORITY
44#define PW1 TOP_PRIORITY
45#define PW2 TOP_PRIORITY
46#define PW3 TOP_PRIORITY
47#define DM0 NO_PRIORITY /* DMA Ints */
48#define DM1 NO_PRIORITY
49#define DM2 NO_PRIORITY
50#define DM3 NO_PRIORITY
51#define DAE NO_PRIORITY
52#define TU0 TIMER_PRIORITY /* TMU Ints */
53#define TU1 NO_PRIORITY
54#define TU2 NO_PRIORITY
55#define TI2 NO_PRIORITY
56#define ATI NO_PRIORITY /* RTC Ints */
57#define PRI NO_PRIORITY
58#define CUI RTC_PRIORITY
59#define ERI SCIF_PRIORITY /* SCIF Ints */
60#define RXI SCIF_PRIORITY
61#define BRI SCIF_PRIORITY
62#define TXI SCIF_PRIORITY
63#define ITI TOP_PRIORITY /* WDT Ints */
64
65/* Setup for the SMSC FDC37C935 */
66#define SMSC_SUPERIO_BASE 0x04000000
67#define SMSC_CONFIG_PORT_ADDR 0x3f0
68#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR
69#define SMSC_DATA_PORT_ADDR 0x3f1
70
71#define SMSC_ENTER_CONFIG_KEY 0x55
72#define SMSC_EXIT_CONFIG_KEY 0xaa
73
74#define SMCS_LOGICAL_DEV_INDEX 0x07
75#define SMSC_DEVICE_ID_INDEX 0x20
76#define SMSC_DEVICE_REV_INDEX 0x21
77#define SMSC_ACTIVATE_INDEX 0x30
78#define SMSC_PRIMARY_BASE_INDEX 0x60
79#define SMSC_SECONDARY_BASE_INDEX 0x62
80#define SMSC_PRIMARY_INT_INDEX 0x70
81#define SMSC_SECONDARY_INT_INDEX 0x72
82
83#define SMSC_IDE1_DEVICE 1
84#define SMSC_KEYBOARD_DEVICE 7
85#define SMSC_CONFIG_REGISTERS 8
86
87#define SMSC_SUPERIO_READ_INDEXED(index) ({ \
88 outb((index), SMSC_INDEX_PORT_ADDR); \
89 inb(SMSC_DATA_PORT_ADDR); })
90#define SMSC_SUPERIO_WRITE_INDEXED(val, index) ({ \
91 outb((index), SMSC_INDEX_PORT_ADDR); \
92 outb((val), SMSC_DATA_PORT_ADDR); })
93
94#define IDE1_PRIMARY_BASE 0x01f0
95#define IDE1_SECONDARY_BASE 0x03f6
96
97unsigned long smsc_superio_virt;
98
99/*
100 * Platform dependent structures: maps and parms block.
101 */
102struct resource io_resources[] = {
103 /* To be updated with external devices */
104};
105
106struct resource kram_resources[] = {
107 /* These must be last in the array */
108 { .name = "Kernel code", .start = 0, .end = 0 },
109 /* These must be last in the array */
110 { .name = "Kernel data", .start = 0, .end = 0 }
111};
112
113struct resource xram_resources[] = {
114 /* To be updated with external devices */
115};
116
117struct resource rom_resources[] = {
118 /* To be updated with external devices */
119};
120
121struct sh64_platform platform_parms = {
122 .readonly_rootfs = 1,
123 .initial_root_dev = 0x0100,
124 .loader_type = 1,
125 .io_res_p = io_resources,
126 .io_res_count = ARRAY_SIZE(io_resources),
127 .kram_res_p = kram_resources,
128 .kram_res_count = ARRAY_SIZE(kram_resources),
129 .xram_res_p = xram_resources,
130 .xram_res_count = ARRAY_SIZE(xram_resources),
131 .rom_res_p = rom_resources,
132 .rom_res_count = ARRAY_SIZE(rom_resources),
133};
134
135int platform_int_priority[NR_INTC_IRQS] = {
136 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
137 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
138 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
139 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
140 TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
141 RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
142 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
143 RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
144};
145
146static int __init smsc_superio_setup(void)
147{
148 unsigned char devid, devrev;
149
150 smsc_superio_virt = onchip_remap(SMSC_SUPERIO_BASE, 1024, "SMSC SuperIO");
151 if (!smsc_superio_virt) {
152 panic("Unable to remap SMSC SuperIO\n");
153 }
154
155 /* Initially the chip is in run state */
156 /* Put it into configuration state */
157 outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
158 outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
159
160 /* Read device ID info */
161 devid = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
162 devrev = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
163 printk("SMSC SuperIO devid %02x rev %02x\n", devid, devrev);
164
165 /* Select the keyboard device */
166 SMSC_SUPERIO_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
167
168 /* enable it */
169 SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
170
171 /* Select the interrupts */
172 /* On a PC keyboard is IRQ1, mouse is IRQ12 */
173 SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_PRIMARY_INT_INDEX);
174 SMSC_SUPERIO_WRITE_INDEXED(12, SMSC_SECONDARY_INT_INDEX);
175
176#ifdef CONFIG_IDE
177 /*
178 * Only IDE1 exists on the Cayman
179 */
180
181 /* Power it on */
182 SMSC_SUPERIO_WRITE_INDEXED(1 << SMSC_IDE1_DEVICE, 0x22);
183
184 SMSC_SUPERIO_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
185 SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
186
187 SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE >> 8,
188 SMSC_PRIMARY_BASE_INDEX + 0);
189 SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE & 0xff,
190 SMSC_PRIMARY_BASE_INDEX + 1);
191
192 SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE >> 8,
193 SMSC_SECONDARY_BASE_INDEX + 0);
194 SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE & 0xff,
195 SMSC_SECONDARY_BASE_INDEX + 1);
196
197 SMSC_SUPERIO_WRITE_INDEXED(14, SMSC_PRIMARY_INT_INDEX);
198
199 SMSC_SUPERIO_WRITE_INDEXED(SMSC_CONFIG_REGISTERS,
200 SMCS_LOGICAL_DEV_INDEX);
201
202 SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
203 SMSC_SUPERIO_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
204 SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
205 SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
206#endif
207
208 /* Exit the configuration state */
209 outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
210
211 return 0;
212}
213
214/* This is grotty, but, because kernel is always referenced on the link line
215 * before any devices, this is safe.
216 */
217__initcall(smsc_superio_setup);
218
219void __init platform_setup(void)
220{
221 /* Cayman platform leaves the decision to head.S, for now */
222 platform_parms.fpu_flags = fpu_in_use;
223}
224
225void __init platform_monitor(void)
226{
227 /* Nothing yet .. */
228}
229
230void __init platform_reserve(void)
231{
232 /* Nothing yet .. */
233}
234
235const char *get_system_type(void)
236{
237 return "Hitachi Cayman";
238}
239
diff --git a/arch/sh64/mach-harp/Makefile b/arch/sh64/mach-harp/Makefile
deleted file mode 100644
index 2f2963fa2131..000000000000
--- a/arch/sh64/mach-harp/Makefile
+++ /dev/null
@@ -1 +0,0 @@
1obj-y := setup.o
diff --git a/arch/sh64/mach-harp/setup.c b/arch/sh64/mach-harp/setup.c
deleted file mode 100644
index 05011cb369bb..000000000000
--- a/arch/sh64/mach-harp/setup.c
+++ /dev/null
@@ -1,129 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mach-harp/setup.c
7 *
8 * SH-5 Simulator Platform Support
9 *
10 * This file handles the architecture-dependent parts of initialization
11 *
12 * Copyright (C) 2000, 2001 Paolo Alberelli
13 *
14 * benedict.gaster@superh.com: 3rd May 2002
15 * Added support for ramdisk, removing statically linked romfs at the same time. *
16 *
17 * lethal@linux-sh.org: 15th May 2003
18 * Use the generic procfs cpuinfo interface, just return a valid board name.
19 */
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <asm/platform.h>
23#include <asm/irq.h>
24
25/*
26 * Platform Dependent Interrupt Priorities.
27 */
28
29/* Using defaults defined in irq.h */
30#define RES NO_PRIORITY /* Disabled */
31#define IR0 IRL0_PRIORITY /* IRLs */
32#define IR1 IRL1_PRIORITY
33#define IR2 IRL2_PRIORITY
34#define IR3 IRL3_PRIORITY
35#define PCA INTA_PRIORITY /* PCI Ints */
36#define PCB INTB_PRIORITY
37#define PCC INTC_PRIORITY
38#define PCD INTD_PRIORITY
39#define SER TOP_PRIORITY
40#define ERR TOP_PRIORITY
41#define PW0 TOP_PRIORITY
42#define PW1 TOP_PRIORITY
43#define PW2 TOP_PRIORITY
44#define PW3 TOP_PRIORITY
45#define DM0 NO_PRIORITY /* DMA Ints */
46#define DM1 NO_PRIORITY
47#define DM2 NO_PRIORITY
48#define DM3 NO_PRIORITY
49#define DAE NO_PRIORITY
50#define TU0 TIMER_PRIORITY /* TMU Ints */
51#define TU1 NO_PRIORITY
52#define TU2 NO_PRIORITY
53#define TI2 NO_PRIORITY
54#define ATI NO_PRIORITY /* RTC Ints */
55#define PRI NO_PRIORITY
56#define CUI RTC_PRIORITY
57#define ERI SCIF_PRIORITY /* SCIF Ints */
58#define RXI SCIF_PRIORITY
59#define BRI SCIF_PRIORITY
60#define TXI SCIF_PRIORITY
61#define ITI TOP_PRIORITY /* WDT Ints */
62
63/*
64 * Platform dependent structures: maps and parms block.
65 */
66struct resource io_resources[] = {
67 /* To be updated with external devices */
68};
69
70struct resource kram_resources[] = {
71 /* These must be last in the array */
72 { .name = "Kernel code", .start = 0, .end = 0 },
73 /* These must be last in the array */
74 { .name = "Kernel data", .start = 0, .end = 0 }
75};
76
77struct resource xram_resources[] = {
78 /* To be updated with external devices */
79};
80
81struct resource rom_resources[] = {
82 /* To be updated with external devices */
83};
84
85struct sh64_platform platform_parms = {
86 .readonly_rootfs = 1,
87 .initial_root_dev = 0x0100,
88 .loader_type = 1,
89 .io_res_p = io_resources,
90 .io_res_count = ARRAY_SIZE(io_resources),
91 .kram_res_p = kram_resources,
92 .kram_res_count = ARRAY_SIZE(kram_resources),
93 .xram_res_p = xram_resources,
94 .xram_res_count = ARRAY_SIZE(xram_resources),
95 .rom_res_p = rom_resources,
96 .rom_res_count = ARRAY_SIZE(rom_resources),
97};
98
99int platform_int_priority[NR_INTC_IRQS] = {
100 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
101 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
102 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
103 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
104 TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
105 RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
106 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
107 RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
108};
109
110void __init platform_setup(void)
111{
112 /* Harp platform leaves the decision to head.S, for now */
113 platform_parms.fpu_flags = fpu_in_use;
114}
115
116void __init platform_monitor(void)
117{
118 /* Nothing yet .. */
119}
120
121void __init platform_reserve(void)
122{
123 /* Nothing yet .. */
124}
125
126const char *get_system_type(void)
127{
128 return "ST50 Harp";
129}
diff --git a/arch/sh64/mach-sim/Makefile b/arch/sh64/mach-sim/Makefile
deleted file mode 100644
index 2f2963fa2131..000000000000
--- a/arch/sh64/mach-sim/Makefile
+++ /dev/null
@@ -1 +0,0 @@
1obj-y := setup.o
diff --git a/arch/sh64/mach-sim/setup.c b/arch/sh64/mach-sim/setup.c
deleted file mode 100644
index e3386ec1ce1f..000000000000
--- a/arch/sh64/mach-sim/setup.c
+++ /dev/null
@@ -1,126 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mach-sim/setup.c
7 *
8 * ST50 Simulator Platform Support
9 *
10 * This file handles the architecture-dependent parts of initialization
11 *
12 * Copyright (C) 2000, 2001 Paolo Alberelli
13 *
14 * lethal@linux-sh.org: 15th May 2003
15 * Use the generic procfs cpuinfo interface, just return a valid board name.
16 */
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <asm/platform.h>
20#include <asm/irq.h>
21
22/*
23 * Platform Dependent Interrupt Priorities.
24 */
25
26/* Using defaults defined in irq.h */
27#define RES NO_PRIORITY /* Disabled */
28#define IR0 IRL0_PRIORITY /* IRLs */
29#define IR1 IRL1_PRIORITY
30#define IR2 IRL2_PRIORITY
31#define IR3 IRL3_PRIORITY
32#define PCA INTA_PRIORITY /* PCI Ints */
33#define PCB INTB_PRIORITY
34#define PCC INTC_PRIORITY
35#define PCD INTD_PRIORITY
36#define SER TOP_PRIORITY
37#define ERR TOP_PRIORITY
38#define PW0 TOP_PRIORITY
39#define PW1 TOP_PRIORITY
40#define PW2 TOP_PRIORITY
41#define PW3 TOP_PRIORITY
42#define DM0 NO_PRIORITY /* DMA Ints */
43#define DM1 NO_PRIORITY
44#define DM2 NO_PRIORITY
45#define DM3 NO_PRIORITY
46#define DAE NO_PRIORITY
47#define TU0 TIMER_PRIORITY /* TMU Ints */
48#define TU1 NO_PRIORITY
49#define TU2 NO_PRIORITY
50#define TI2 NO_PRIORITY
51#define ATI NO_PRIORITY /* RTC Ints */
52#define PRI NO_PRIORITY
53#define CUI RTC_PRIORITY
54#define ERI SCIF_PRIORITY /* SCIF Ints */
55#define RXI SCIF_PRIORITY
56#define BRI SCIF_PRIORITY
57#define TXI SCIF_PRIORITY
58#define ITI TOP_PRIORITY /* WDT Ints */
59
60/*
61 * Platform dependent structures: maps and parms block.
62 */
63struct resource io_resources[] = {
64 /* Nothing yet .. */
65};
66
67struct resource kram_resources[] = {
68 /* These must be last in the array */
69 { .name = "Kernel code", .start = 0, .end = 0 },
70 /* These must be last in the array */
71 { .name = "Kernel data", .start = 0, .end = 0 }
72};
73
74struct resource xram_resources[] = {
75 /* Nothing yet .. */
76};
77
78struct resource rom_resources[] = {
79 /* Nothing yet .. */
80};
81
82struct sh64_platform platform_parms = {
83 .readonly_rootfs = 1,
84 .initial_root_dev = 0x0100,
85 .loader_type = 1,
86 .io_res_p = io_resources,
87 .io_res_count = ARRAY_SIZE(io_resources),
88 .kram_res_p = kram_resources,
89 .kram_res_count = ARRAY_SIZE(kram_resources),
90 .xram_res_p = xram_resources,
91 .xram_res_count = ARRAY_SIZE(xram_resources),
92 .rom_res_p = rom_resources,
93 .rom_res_count = ARRAY_SIZE(rom_resources),
94};
95
96int platform_int_priority[NR_IRQS] = {
97 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
98 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
99 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
100 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
101 TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
102 RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
103 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
104 RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
105};
106
107void __init platform_setup(void)
108{
109 /* Simulator platform leaves the decision to head.S */
110 platform_parms.fpu_flags = fpu_in_use;
111}
112
113void __init platform_monitor(void)
114{
115 /* Nothing yet .. */
116}
117
118void __init platform_reserve(void)
119{
120 /* Nothing yet .. */
121}
122
123const char *get_system_type(void)
124{
125 return "SH-5 Simulator";
126}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-16 14:24:12 -0500