Linux-2.6.12-rc2v2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

1 files changed, 293 insertions, 0 deletions

diff --git a/arch/sh64/Kconfig b/arch/sh64/Kconfig
new file mode 100644
index 000000000000..76eb81fba45e
--- /dev/null
+++ b/arch/sh64/Kconfig
@@ -0,0 +1,293 @@
+#
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/config-language.txt.
+#
+
+mainmenu "Linux/SH64 Kernel Configuration"
+
+config SUPERH
+        bool
+        default y
+
+config SUPERH64
+        bool
+        default y
+
+config MMU
+        bool
+        default y
+
+config UID16
+        bool
+        default y
+
+config RWSEM_GENERIC_SPINLOCK
+        bool
+        default y
+
+config GENERIC_CALIBRATE_DELAY
+        bool
+        default y
+
+config LOG_BUF_SHIFT
+        int
+        default 14
+
+config RWSEM_XCHGADD_ALGORITHM
+        bool
+
+config GENERIC_ISA_DMA
+        bool
+
+source init/Kconfig
+
+menu "System type"
+
+choice
+        prompt "SuperH system type"
+        default SH_SIMULATOR
+
+config SH_GENERIC
+        bool "Generic"
+
+config SH_SIMULATOR
+        bool "Simulator"
+
+config SH_CAYMAN
+        bool "Cayman"
+
+config SH_ROMRAM
+        bool "ROM/RAM"
+
+config SH_HARP
+        bool "ST50-Harp"
+
+endchoice
+
+choice
+        prompt "Processor family"
+        default CPU_SH5
+
+config CPU_SH5
+        bool "SH-5"
+
+endchoice
+
+choice
+        prompt "Processor type"
+
+config CPU_SUBTYPE_SH5_101
+        bool "SH5-101"
+        depends on CPU_SH5
+
+config CPU_SUBTYPE_SH5_103
+        bool "SH5-103"
+        depends on CPU_SH5
+
+endchoice
+
+choice
+        prompt "Endianness"
+        default LITTLE_ENDIAN
+
+config LITTLE_ENDIAN
+        bool "Little-Endian"
+
+config BIG_ENDIAN
+        bool "Big-Endian"
+
+endchoice
+
+config SH_FPU
+        bool "FPU support"
+        default y
+
+config SH64_FPU_DENORM_FLUSH
+        depends on SH_FPU
+        bool "Flush floating point denorms to zero"
+
+choice
+        prompt "Page table levels"
+        default SH64_PGTABLE_2_LEVEL
+
+config SH64_PGTABLE_2_LEVEL
+        bool "2"
+
+config SH64_PGTABLE_3_LEVEL
+        bool "3"
+
+endchoice
+
+choice
+        prompt "HugeTLB page size"
+        depends on HUGETLB_PAGE && MMU
+        default HUGETLB_PAGE_SIZE_64K
+
+config HUGETLB_PAGE_SIZE_64K
+        bool "64K"
+
+config HUGETLB_PAGE_SIZE_1MB
+        bool "1MB"
+
+config HUGETLB_PAGE_SIZE_512MB
+        bool "512MB"
+
+endchoice
+
+config SH64_USER_MISALIGNED_FIXUP
+        bool "Fixup misaligned loads/stores occurring in user mode"
+
+comment "Memory options"
+
+config CACHED_MEMORY_OFFSET
+        hex "Cached Area Offset"
+        depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
+        default "20000000"
+
+config MEMORY_START
+        hex "Physical memory start address"
+        depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
+        default "80000000"
+
+config MEMORY_SIZE_IN_MB
+        int "Memory size (in MB)" if SH_HARP || SH_CAYMAN || SH_SIMULATOR
+        default "64" if SH_HARP || SH_CAYMAN
+        default "8" if SH_SIMULATOR
+
+comment "Cache options"
+
+config DCACHE_DISABLED
+        bool "DCache Disabling"
+        depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
+
+choice
+        prompt "DCache mode"
+        depends on !DCACHE_DISABLED && !SH_SIMULATOR
+        default DCACHE_WRITE_BACK
+
+config DCACHE_WRITE_BACK
+        bool "Write-back"
+
+config DCACHE_WRITE_THROUGH
+        bool "Write-through"
+
+endchoice
+
+config ICACHE_DISABLED
+        bool "ICache Disabling"
+        depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
+
+config PCIDEVICE_MEMORY_START
+        hex
+        depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
+        default "C0000000"
+
+config DEVICE_MEMORY_START
+        hex
+        depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
+        default "E0000000"
+
+config FLASH_MEMORY_START
+        hex "Flash memory/on-chip devices start address"
+        depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
+        default "00000000"
+
+config PCI_BLOCK_START
+        hex "PCI block start address"
+        depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
+        default "40000000"
+
+comment "CPU Subtype specific options"
+
+config SH64_ID2815_WORKAROUND
+        bool "Include workaround for SH5-101 cut2 silicon defect ID2815"
+
+comment "Misc options"
+config HEARTBEAT
+        bool "Heartbeat LED"
+
+config HDSP253_LED
+        bool "Support for HDSP-253 LED"
+        depends on SH_CAYMAN
+
+config SH_DMA
+        tristate "DMA controller (DMAC) support"
+
+config PREEMPT
+        bool "Preemptible Kernel (EXPERIMENTAL)"
+        depends on EXPERIMENTAL
+
+endmenu
+
+menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
+
+config ISA
+        bool
+
+config SBUS
+        bool
+
+config PCI
+        bool "PCI support"
+        help
+          Find out whether you have a PCI motherboard. PCI is the name of a
+          bus system, i.e. the way the CPU talks to the other stuff inside
+          your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
+          VESA. If you have PCI, say Y, otherwise N.
+
+          The PCI-HOWTO, available from
+          <http://www.tldp.org/docs.html#howto>, contains valuable
+          information about which PCI hardware does work under Linux and which
+          doesn't.
+
+config SH_PCIDMA_NONCOHERENT
+        bool "Cache and PCI noncoherent"
+        depends on PCI
+        default y
+        help
+          Enable this option if your platform does not have a CPU cache which
+          remains coherent with PCI DMA. It is safest to say 'Y', although you
+          will see better performance if you can say 'N', because the PCI DMA
+          code will not have to flush the CPU's caches. If you have a PCI host
+          bridge integrated with your SH CPU, refer carefully to the chip specs
+          to see if you can say 'N' here. Otherwise, leave it as 'Y'.
+
+source "drivers/pci/Kconfig"
+
+source "drivers/pcmcia/Kconfig"
+
+source "drivers/pci/hotplug/Kconfig"
+
+endmenu
+
+menu "Executable file formats"
+
+source "fs/Kconfig.binfmt"
+
+endmenu
+
+source "drivers/Kconfig"
+
+source "fs/Kconfig"
+
+source "arch/sh64/oprofile/Kconfig"
+
+source "arch/sh64/Kconfig.debug"
+
+source "security/Kconfig"
+
+source "crypto/Kconfig"
+
+source "lib/Kconfig"
+
+#
+# Use the generic interrupt handling code in kernel/irq/:
+#
+config GENERIC_HARDIRQS
+        bool
+        default y
+
+config GENERIC_IRQ_PROBE
+        bool
+        default y
+