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authorPaul Mundt <lethal@linux-sh.org>2010-04-02 03:13:27 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-04-02 03:13:27 -0400
commitbe97d758e5728099e95fe229866d5c6c900d3092 (patch)
tree5c5a3fa4b7978857562d730e3101181b5fbebb9f /arch/sh/mm/tlb-sh3.c
parent5dd6ef5050c5012267e2b84f3d82ba85cdb5ca32 (diff)
sh: Fix up the SH-3 build for recent TLB changes.
While the MMUCR.URB and ITLB/UTLB differentiation works fine for all SH-4 and later TLBs, these features are absent on SH-3. This splits out local_flush_tlb_all() in to SH-4 and PTEAEX copies while restoring the old SH-3 one, subsequently fixing up the build. This will probably want some further reordering and tidying in the future, but that's out of scope at present. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/tlb-sh3.c')
-rw-r--r--arch/sh/mm/tlb-sh3.c19
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c
index 4f5f7cbdd508..7a940dbfc2e9 100644
--- a/arch/sh/mm/tlb-sh3.c
+++ b/arch/sh/mm/tlb-sh3.c
@@ -77,3 +77,22 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
77 for (i = 0; i < ways; i++) 77 for (i = 0; i < ways; i++)
78 __raw_writel(data, addr + (i << 8)); 78 __raw_writel(data, addr + (i << 8));
79} 79}
80
81void local_flush_tlb_all(void)
82{
83 unsigned long flags, status;
84
85 /*
86 * Flush all the TLB.
87 *
88 * Write to the MMU control register's bit:
89 * TF-bit for SH-3, TI-bit for SH-4.
90 * It's same position, bit #2.
91 */
92 local_irq_save(flags);
93 status = __raw_readl(MMUCR);
94 status |= 0x04;
95 __raw_writel(status, MMUCR);
96 ctrl_barrier();
97 local_irq_restore(flags);
98}