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authorDave Airlie <airlied@redhat.com>2010-12-21 18:48:54 -0500
committerDave Airlie <airlied@redhat.com>2010-12-21 18:48:54 -0500
commitae09f09e94d755ed45c58b695675636c0ec53f9e (patch)
tree77cb9bac7d81f5b1250b8638a007e10c17b600af /arch/sh/mm/cache.c
parent1d99e5c57255d188773fb437391df24fe8faf575 (diff)
parent5909a77ac62cc042f94bd262016cf468a2f96022 (diff)
Merge remote branch 'intel/drm-intel-next' of /ssd/git/drm-next into drm-core-next
* 'intel/drm-intel-next' of /ssd/git/drm-next: (771 commits) drm/i915: Undo "Uncouple render/power ctx before suspending" drm/i915: Allow the application to choose the constant addressing mode drm/i915: dynamic render p-state support for Sandy Bridge drm/i915: Enable EI mode for RCx decision making on Sandybridge drm/i915/sdvo: Border and stall select became test bits in gen5 drm/i915: Add Guess-o-matic for pageflip timestamping. drm/i915: Add support for precise vblank timestamping (v2) drm/i915: Add frame buffer compression on Sandybridge drm/i915: Add self-refresh support on Sandybridge drm/i915: Wait for vblank before unpinning old fb Revert "drm/i915: Avoid using PIPE_CONTROL on Ironlake" drm/i915: Pass clock limits down to PLL matcher drm/i915: Poll for seqno completion if IRQ is disabled drm/i915/ringbuffer: Make IRQ refcnting atomic agp/intel: Fix missed cached memory flags setting in i965_write_entry() drm/i915/sdvo: Only use the SDVO pin if it is in the valid range drm/i915: Enable RC6 autodownclocking on Sandybridge drm/i915: Terminate the FORCE WAKE after we have finished reading drm/i915/gtt: Clear the cachelines upon resume drm/i915: Restore GTT mapping first upon resume ...
Diffstat (limited to 'arch/sh/mm/cache.c')
-rw-r--r--arch/sh/mm/cache.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/sh/mm/cache.c b/arch/sh/mm/cache.c
index ba401d137bb9..88d3dc3d30d5 100644
--- a/arch/sh/mm/cache.c
+++ b/arch/sh/mm/cache.c
@@ -60,14 +60,14 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
60 unsigned long len) 60 unsigned long len)
61{ 61{
62 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && 62 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
63 !test_bit(PG_dcache_dirty, &page->flags)) { 63 test_bit(PG_dcache_clean, &page->flags)) {
64 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 64 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
65 memcpy(vto, src, len); 65 memcpy(vto, src, len);
66 kunmap_coherent(vto); 66 kunmap_coherent(vto);
67 } else { 67 } else {
68 memcpy(dst, src, len); 68 memcpy(dst, src, len);
69 if (boot_cpu_data.dcache.n_aliases) 69 if (boot_cpu_data.dcache.n_aliases)
70 set_bit(PG_dcache_dirty, &page->flags); 70 clear_bit(PG_dcache_clean, &page->flags);
71 } 71 }
72 72
73 if (vma->vm_flags & VM_EXEC) 73 if (vma->vm_flags & VM_EXEC)
@@ -79,14 +79,14 @@ void copy_from_user_page(struct vm_area_struct *vma, struct page *page,
79 unsigned long len) 79 unsigned long len)
80{ 80{
81 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && 81 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
82 !test_bit(PG_dcache_dirty, &page->flags)) { 82 test_bit(PG_dcache_clean, &page->flags)) {
83 void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 83 void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
84 memcpy(dst, vfrom, len); 84 memcpy(dst, vfrom, len);
85 kunmap_coherent(vfrom); 85 kunmap_coherent(vfrom);
86 } else { 86 } else {
87 memcpy(dst, src, len); 87 memcpy(dst, src, len);
88 if (boot_cpu_data.dcache.n_aliases) 88 if (boot_cpu_data.dcache.n_aliases)
89 set_bit(PG_dcache_dirty, &page->flags); 89 clear_bit(PG_dcache_clean, &page->flags);
90 } 90 }
91} 91}
92 92
@@ -98,7 +98,7 @@ void copy_user_highpage(struct page *to, struct page *from,
98 vto = kmap_atomic(to, KM_USER1); 98 vto = kmap_atomic(to, KM_USER1);
99 99
100 if (boot_cpu_data.dcache.n_aliases && page_mapped(from) && 100 if (boot_cpu_data.dcache.n_aliases && page_mapped(from) &&
101 !test_bit(PG_dcache_dirty, &from->flags)) { 101 test_bit(PG_dcache_clean, &from->flags)) {
102 vfrom = kmap_coherent(from, vaddr); 102 vfrom = kmap_coherent(from, vaddr);
103 copy_page(vto, vfrom); 103 copy_page(vto, vfrom);
104 kunmap_coherent(vfrom); 104 kunmap_coherent(vfrom);
@@ -141,7 +141,7 @@ void __update_cache(struct vm_area_struct *vma,
141 141
142 page = pfn_to_page(pfn); 142 page = pfn_to_page(pfn);
143 if (pfn_valid(pfn)) { 143 if (pfn_valid(pfn)) {
144 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); 144 int dirty = !test_and_set_bit(PG_dcache_clean, &page->flags);
145 if (dirty) 145 if (dirty)
146 __flush_purge_region(page_address(page), PAGE_SIZE); 146 __flush_purge_region(page_address(page), PAGE_SIZE);
147 } 147 }
@@ -153,7 +153,7 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
153 153
154 if (pages_do_alias(addr, vmaddr)) { 154 if (pages_do_alias(addr, vmaddr)) {
155 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) && 155 if (boot_cpu_data.dcache.n_aliases && page_mapped(page) &&
156 !test_bit(PG_dcache_dirty, &page->flags)) { 156 test_bit(PG_dcache_clean, &page->flags)) {
157 void *kaddr; 157 void *kaddr;
158 158
159 kaddr = kmap_coherent(page, vmaddr); 159 kaddr = kmap_coherent(page, vmaddr);