sh: Prepare for dynamic PMB support

To allow the MMU to be switched between 29bit and 32bit mode at runtime
some constants need to swapped for functions that return a runtime
value.

Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 3 insertions, 3 deletions

diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 639bb329fc81..56dd55a1b13e 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -88,12 +88,12 @@ static inline void flush_cache_4096(unsigned long start,
         unsigned long flags, exec_offset = 0;
 
         /*
-         * All types of SH-4 require PC to be in P2 to operate on the I-cache.
-         * Some types of SH-4 require PC to be in P2 to operate on the D-cache.
+         * All types of SH-4 require PC to be uncached to operate on the I-cache.
+         * Some types of SH-4 require PC to be uncached to operate on the D-cache.
          */
         if ((boot_cpu_data.flags & CPU_HAS_P2_FLUSH_BUG) ||
             (start < CACHE_OC_ADDRESS_ARRAY))
-                exec_offset = 0x20000000;
+                exec_offset = cached_to_uncached;
 
         local_irq_save(flags);
         __flush_cache_4096(start | SH_CACHE_ASSOC,