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authorPaul Mundt <lethal@linux-sh.org>2007-07-05 21:58:04 -0400
committerPaul Mundt <lethal@linux-sh.org>2007-07-05 21:58:04 -0400
commit04c7d9579f25ff0dd01efa958805f34c92bc6a71 (patch)
tree125a0da3b1d4397af86b562c5b4e8df1eedf10ab /arch/sh/lib
parent75f016a7ce75220d898608791870ab7da549a430 (diff)
sh: Correct __xdiv64_32/div64_32 return value size.
These should be returning a uint32_t, whereas they were erroneously returning a u64 before. As the register sizes are 32-bits, this doesn't really make a lot of sense. Reported-by: Katsuya MATSUBARA <matsu@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/lib')
-rw-r--r--arch/sh/lib/div64-generic.c9
-rw-r--r--arch/sh/lib/div64.S6
2 files changed, 7 insertions, 8 deletions
diff --git a/arch/sh/lib/div64-generic.c b/arch/sh/lib/div64-generic.c
index c02473afd581..d9482cd2a9ea 100644
--- a/arch/sh/lib/div64-generic.c
+++ b/arch/sh/lib/div64-generic.c
@@ -4,16 +4,15 @@
4 4
5#include <linux/types.h> 5#include <linux/types.h>
6 6
7extern u64 __xdiv64_32(u64 n, u32 d); 7extern uint32_t __xdiv64_32(u64 n, u32 d);
8 8
9u64 __div64_32(u64 *xp, u32 y) 9uint32_t __div64_32(u64 *xp, u32 y)
10{ 10{
11 u64 rem; 11 uint32_t rem;
12 u64 q = __xdiv64_32(*xp, y); 12 uint32_t q = __xdiv64_32(*xp, y);
13 13
14 rem = *xp - q * y; 14 rem = *xp - q * y;
15 *xp = q; 15 *xp = q;
16 16
17 return rem; 17 return rem;
18} 18}
19
diff --git a/arch/sh/lib/div64.S b/arch/sh/lib/div64.S
index eefc275d64a7..5ee7334ea64f 100644
--- a/arch/sh/lib/div64.S
+++ b/arch/sh/lib/div64.S
@@ -1,12 +1,12 @@
1/* 1/*
2 * unsigned long long __xdiv64_32(unsigned long long n, unsigned long d); 2 * unsigned long __xdiv64_32(unsigned long long n, unsigned long d);
3 */ 3 */
4 4
5#include <linux/linkage.h> 5#include <linux/linkage.h>
6 6
7.text 7.text
8ENTRY(__xdiv64_32) 8ENTRY(__xdiv64_32)
9#ifdef __LITTLE_ENDIAN__ 9#ifdef CONFIG_CPU_LITTLE_ENDIAN
10 mov r4, r0 10 mov r4, r0
11 mov r5, r1 11 mov r5, r1
12#else 12#else
@@ -34,7 +34,7 @@ ENTRY(__xdiv64_32)
34 rotcl r0 34 rotcl r0
35 div1 r6, r1 35 div1 r6, r1
36 .endr 36 .endr
37#ifdef __LITTLE_ENDIAN__ 37#ifdef CONFIG_CPU_LITTLE_ENDIAN
38 mov r2, r1 38 mov r2, r1
39 rts 39 rts
40 rotcl r0 40 rotcl r0