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author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-11 13:08:33 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-11 13:08:33 -0400 |
commit | d3d07d941fd80c173b6d690ded00ee5fb8302e06 (patch) | |
tree | f1a82c956e393df9933c8544bb564ef1735384ee /arch/sh/lib64/sdivsi3.S | |
parent | 6cd8e300b49332eb9eeda45816c711c198d31505 (diff) | |
parent | 54ff328b46e58568c4b3350c2fa3223ef862e5a4 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (266 commits)
sh: Tie sparseirq in to Kconfig.
sh: Wire up sys_rt_tgsigqueueinfo.
sh: Fix sys_pwritev() syscall table entry for sh32.
sh: Fix sh4a llsc-based cmpxchg()
sh: sh7724: Add JPU support
sh: sh7724: INTC setting update
sh: sh7722 clock framework rewrite
sh: sh7366 clock framework rewrite
sh: sh7343 clock framework rewrite
sh: sh7724 clock framework rewrite V3
sh: sh7723 clock framework rewrite V2
sh: add enable()/disable()/set_rate() to div6 code
sh: add AP325RXA mode pin configuration
sh: add Migo-R mode pin configuration
sh: sh7722 mode pin definitions
sh: sh7724 mode pin comments
sh: sh7723 mode pin V2
sh: rework mode pin code
sh: clock div6 helper code
sh: clock div4 frequency table offset fix
...
Diffstat (limited to 'arch/sh/lib64/sdivsi3.S')
-rw-r--r-- | arch/sh/lib64/sdivsi3.S | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/sh/lib64/sdivsi3.S b/arch/sh/lib64/sdivsi3.S index 6a800c6a4904..1963bbd42288 100644 --- a/arch/sh/lib64/sdivsi3.S +++ b/arch/sh/lib64/sdivsi3.S | |||
@@ -1,4 +1,6 @@ | |||
1 | .global __sdivsi3 | 1 | .global __sdivsi3 |
2 | .global __sdivsi3_1 | ||
3 | .global __sdivsi3_2 | ||
2 | .section .text..SHmedia32,"ax" | 4 | .section .text..SHmedia32,"ax" |
3 | .align 2 | 5 | .align 2 |
4 | 6 | ||
@@ -6,13 +8,15 @@ | |||
6 | /* clobbered: r1,r18,r19,r20,r21,r25,tr0 */ | 8 | /* clobbered: r1,r18,r19,r20,r21,r25,tr0 */ |
7 | /* result in r0 */ | 9 | /* result in r0 */ |
8 | __sdivsi3: | 10 | __sdivsi3: |
11 | __sdivsi3_1: | ||
9 | ptb __div_table,tr0 | 12 | ptb __div_table,tr0 |
13 | gettr tr0,r20 | ||
10 | 14 | ||
15 | __sdivsi3_2: | ||
11 | nsb r5, r1 | 16 | nsb r5, r1 |
12 | shlld r5, r1, r25 /* normalize; [-2 ..1, 1..2) in s2.62 */ | 17 | shlld r5, r1, r25 /* normalize; [-2 ..1, 1..2) in s2.62 */ |
13 | shari r25, 58, r21 /* extract 5(6) bit index (s2.4 with hole -1..1) */ | 18 | shari r25, 58, r21 /* extract 5(6) bit index (s2.4 with hole -1..1) */ |
14 | /* bubble */ | 19 | /* bubble */ |
15 | gettr tr0,r20 | ||
16 | ldx.ub r20, r21, r19 /* u0.8 */ | 20 | ldx.ub r20, r21, r19 /* u0.8 */ |
17 | shari r25, 32, r25 /* normalize to s2.30 */ | 21 | shari r25, 32, r25 /* normalize to s2.30 */ |
18 | shlli r21, 1, r21 | 22 | shlli r21, 1, r21 |