diff options
author | Ryusuke Sakato <sakato@hsdv.com> | 2006-10-11 23:16:13 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2006-10-11 23:16:13 -0400 |
commit | 8ae91b9ad88a130cd50fc0b78b16e7b9510b8067 (patch) | |
tree | 663d99ba90da95c166962bbdee7e207f2b98183f /arch/sh/kernel | |
parent | baf4326e49801526e4516e4de7f37b5e51468c49 (diff) |
sh: SH-4A UBC support
A simple patch to enable the UBC on SH-4A.
Signed-off-by: Ryusuke Sakato <sakato@hsdv.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel')
-rw-r--r-- | arch/sh/kernel/process.c | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c index 0b1d5dd7a93b..91516dca4a85 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process.c | |||
@@ -5,6 +5,7 @@ | |||
5 | * Copyright (C) 1995 Linus Torvalds | 5 | * Copyright (C) 1995 Linus Torvalds |
6 | * | 6 | * |
7 | * SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima | 7 | * SuperH version: Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima |
8 | * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC | ||
8 | */ | 9 | */ |
9 | 10 | ||
10 | /* | 11 | /* |
@@ -290,6 +291,24 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, | |||
290 | static void | 291 | static void |
291 | ubc_set_tracing(int asid, unsigned long pc) | 292 | ubc_set_tracing(int asid, unsigned long pc) |
292 | { | 293 | { |
294 | #if defined(CONFIG_CPU_SH4A) | ||
295 | unsigned long val; | ||
296 | |||
297 | val = (UBC_CBR_ID_INST | UBC_CBR_RW_READ | UBC_CBR_CE); | ||
298 | val |= (UBC_CBR_AIE | UBC_CBR_AIV_SET(asid)); | ||
299 | |||
300 | ctrl_outl(val, UBC_CBR0); | ||
301 | ctrl_outl(pc, UBC_CAR0); | ||
302 | ctrl_outl(0x0, UBC_CAMR0); | ||
303 | ctrl_outl(0x0, UBC_CBCR); | ||
304 | |||
305 | val = (UBC_CRR_RES | UBC_CRR_PCB | UBC_CRR_BIE); | ||
306 | ctrl_outl(val, UBC_CRR0); | ||
307 | |||
308 | /* Read UBC register that we writed last. For chekking UBC Register changed */ | ||
309 | val = ctrl_inl(UBC_CRR0); | ||
310 | |||
311 | #else /* CONFIG_CPU_SH4A */ | ||
293 | ctrl_outl(pc, UBC_BARA); | 312 | ctrl_outl(pc, UBC_BARA); |
294 | 313 | ||
295 | #ifdef CONFIG_MMU | 314 | #ifdef CONFIG_MMU |
@@ -307,6 +326,7 @@ ubc_set_tracing(int asid, unsigned long pc) | |||
307 | ctrl_outw(BBR_INST | BBR_READ, UBC_BBRA); | 326 | ctrl_outw(BBR_INST | BBR_READ, UBC_BBRA); |
308 | ctrl_outw(BRCR_PCBA, UBC_BRCR); | 327 | ctrl_outw(BRCR_PCBA, UBC_BRCR); |
309 | } | 328 | } |
329 | #endif /* CONFIG_CPU_SH4A */ | ||
310 | } | 330 | } |
311 | 331 | ||
312 | /* | 332 | /* |
@@ -359,8 +379,13 @@ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *ne | |||
359 | #endif | 379 | #endif |
360 | ubc_set_tracing(asid, next->thread.ubc_pc); | 380 | ubc_set_tracing(asid, next->thread.ubc_pc); |
361 | } else { | 381 | } else { |
382 | #if defined(CONFIG_CPU_SH4A) | ||
383 | ctrl_outl(UBC_CBR_INIT, UBC_CBR0); | ||
384 | ctrl_outl(UBC_CRR_INIT, UBC_CRR0); | ||
385 | #else | ||
362 | ctrl_outw(0, UBC_BBRA); | 386 | ctrl_outw(0, UBC_BBRA); |
363 | ctrl_outw(0, UBC_BBRB); | 387 | ctrl_outw(0, UBC_BBRB); |
388 | #endif | ||
364 | } | 389 | } |
365 | 390 | ||
366 | return prev; | 391 | return prev; |
@@ -460,8 +485,13 @@ asmlinkage void break_point_trap(unsigned long r4, unsigned long r5, | |||
460 | struct pt_regs regs) | 485 | struct pt_regs regs) |
461 | { | 486 | { |
462 | /* Clear tracing. */ | 487 | /* Clear tracing. */ |
488 | #if defined(CONFIG_CPU_SH4A) | ||
489 | ctrl_outl(UBC_CBR_INIT, UBC_CBR0); | ||
490 | ctrl_outl(UBC_CRR_INIT, UBC_CRR0); | ||
491 | #else | ||
463 | ctrl_outw(0, UBC_BBRA); | 492 | ctrl_outw(0, UBC_BBRA); |
464 | ctrl_outw(0, UBC_BBRB); | 493 | ctrl_outw(0, UBC_BBRB); |
494 | #endif | ||
465 | current->thread.ubc_pc = 0; | 495 | current->thread.ubc_pc = 0; |
466 | ubc_usercnt -= 1; | 496 | ubc_usercnt -= 1; |
467 | 497 | ||