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authorYoshinori Sato <ysato@users.sourceforge.jp>2006-12-07 04:01:23 -0500
committerPaul Mundt <lethal@linux-sh.org>2006-12-11 18:42:07 -0500
commit780a1568886a2f5df9bf11b72ba0624c80db5b3b (patch)
tree985399f4e21f5d77512eda0ae2abe541982e8c61 /arch/sh/kernel
parentff4e2ca7c64cd87ec72fa0d238c1b34493133910 (diff)
sh: IPR IRQ updates for SH7619/SH7206.
This updates the SH7619 and SH7206 code for the IPR IRQ changes. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel')
-rw-r--r--arch/sh/kernel/cpu/sh2/setup-sh7619.c41
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c62
2 files changed, 99 insertions, 4 deletions
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 82c2d905152f..79283e6c1d8f 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -51,3 +51,44 @@ static int __init sh7619_devices_setup(void)
51 ARRAY_SIZE(sh7619_devices)); 51 ARRAY_SIZE(sh7619_devices));
52} 52}
53__initcall(sh7619_devices_setup); 53__initcall(sh7619_devices_setup);
54
55#define INTC_IPRC 0xf8080000UL
56#define INTC_IPRD 0xf8080002UL
57
58#define CMI0_IRQ 86
59
60#define SCIF0_ERI_IRQ 88
61#define SCIF0_RXI_IRQ 89
62#define SCIF0_BRI_IRQ 90
63#define SCIF0_TXI_IRQ 91
64
65#define SCIF1_ERI_IRQ 92
66#define SCIF1_RXI_IRQ 93
67#define SCIF1_BRI_IRQ 94
68#define SCIF1_TXI_IRQ 95
69
70#define SCIF2_BRI_IRQ 96
71#define SCIF2_ERI_IRQ 97
72#define SCIF2_RXI_IRQ 98
73#define SCIF2_TXI_IRQ 99
74
75static struct ipr_data sh7619_ipr_map[] = {
76 { CMI0_IRQ, INTC_IPRC, 1, 2 },
77 { SCIF0_ERI_IRQ, INTC_IPRD, 3, 3 },
78 { SCIF0_RXI_IRQ, INTC_IPRD, 3, 3 },
79 { SCIF0_BRI_IRQ, INTC_IPRD, 3, 3 },
80 { SCIF0_TXI_IRQ, INTC_IPRD, 3, 3 },
81 { SCIF1_ERI_IRQ, INTC_IPRD, 2, 3 },
82 { SCIF1_RXI_IRQ, INTC_IPRD, 2, 3 },
83 { SCIF1_BRI_IRQ, INTC_IPRD, 2, 3 },
84 { SCIF1_TXI_IRQ, INTC_IPRD, 2, 3 },
85 { SCIF2_ERI_IRQ, INTC_IPRD, 1, 3 },
86 { SCIF2_RXI_IRQ, INTC_IPRD, 1, 3 },
87 { SCIF2_BRI_IRQ, INTC_IPRD, 1, 3 },
88 { SCIF2_TXI_IRQ, INTC_IPRD, 1, 3 },
89};
90
91void __init init_IRQ_ipr(void)
92{
93 make_ipr_irq(sh7619_ipr_map, ARRAY_SIZE(sh7619_ipr_map));
94}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index cdfeef49e62e..4b60fcc7d667 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -17,22 +17,22 @@ static struct plat_sci_port sci_platform_data[] = {
17 .mapbase = 0xfffe8000, 17 .mapbase = 0xfffe8000,
18 .flags = UPF_BOOT_AUTOCONF, 18 .flags = UPF_BOOT_AUTOCONF,
19 .type = PORT_SCIF, 19 .type = PORT_SCIF,
20 .irqs = { 240, 241, 242, 243}, 20 .irqs = { 241, 242, 243, 240},
21 }, { 21 }, {
22 .mapbase = 0xfffe8800, 22 .mapbase = 0xfffe8800,
23 .flags = UPF_BOOT_AUTOCONF, 23 .flags = UPF_BOOT_AUTOCONF,
24 .type = PORT_SCIF, 24 .type = PORT_SCIF,
25 .irqs = { 244, 245, 246, 247}, 25 .irqs = { 247, 244, 245, 246},
26 }, { 26 }, {
27 .mapbase = 0xfffe9000, 27 .mapbase = 0xfffe9000,
28 .flags = UPF_BOOT_AUTOCONF, 28 .flags = UPF_BOOT_AUTOCONF,
29 .type = PORT_SCIF, 29 .type = PORT_SCIF,
30 .irqs = { 248, 249, 250, 251}, 30 .irqs = { 249, 250, 251, 248},
31 }, { 31 }, {
32 .mapbase = 0xfffe9800, 32 .mapbase = 0xfffe9800,
33 .flags = UPF_BOOT_AUTOCONF, 33 .flags = UPF_BOOT_AUTOCONF,
34 .type = PORT_SCIF, 34 .type = PORT_SCIF,
35 .irqs = { 252, 253, 254, 255}, 35 .irqs = { 253, 254, 255, 252},
36 }, { 36 }, {
37 .flags = 0, 37 .flags = 0,
38 } 38 }
@@ -56,3 +56,57 @@ static int __init sh7206_devices_setup(void)
56 ARRAY_SIZE(sh7206_devices)); 56 ARRAY_SIZE(sh7206_devices));
57} 57}
58__initcall(sh7206_devices_setup); 58__initcall(sh7206_devices_setup);
59
60#define INTC_IPR08 0xfffe0c04UL
61#define INTC_IPR09 0xfffe0c06UL
62#define INTC_IPR14 0xfffe0c10UL
63
64#define CMI0_IRQ 140
65
66#define MTU1_TGI1A 164
67
68#define SCIF0_BRI_IRQ 240
69#define SCIF0_ERI_IRQ 241
70#define SCIF0_RXI_IRQ 242
71#define SCIF0_TXI_IRQ 243
72
73#define SCIF1_BRI_IRQ 244
74#define SCIF1_ERI_IRQ 245
75#define SCIF1_RXI_IRQ 246
76#define SCIF1_TXI_IRQ 247
77
78#define SCIF2_BRI_IRQ 248
79#define SCIF2_ERI_IRQ 249
80#define SCIF2_RXI_IRQ 250
81#define SCIF2_TXI_IRQ 251
82
83#define SCIF3_BRI_IRQ 252
84#define SCIF3_ERI_IRQ 253
85#define SCIF3_RXI_IRQ 254
86#define SCIF3_TXI_IRQ 255
87
88static struct ipr_data sh7206_ipr_map[] = {
89 { CMI0_IRQ, INTC_IPR08, 3, 2 },
90 { MTU2_TGI1A, INTC_IPR09, 1, 2 },
91 { SCIF0_ERI_IRQ, INTC_IPR14, 3, 3 },
92 { SCIF0_RXI_IRQ, INTC_IPR14, 3, 3 },
93 { SCIF0_BRI_IRQ, INTC_IPR14, 3, 3 },
94 { SCIF0_TXI_IRQ, INTC_IPR14, 3, 3 },
95 { SCIF1_ERI_IRQ, INTC_IPR14, 2, 3 },
96 { SCIF1_RXI_IRQ, INTC_IPR14, 2, 3 },
97 { SCIF1_BRI_IRQ, INTC_IPR14, 2, 3 },
98 { SCIF1_TXI_IRQ, INTC_IPR14, 2, 3 },
99 { SCIF2_ERI_IRQ, INTC_IPR14, 1, 3 },
100 { SCIF2_RXI_IRQ, INTC_IPR14, 1, 3 },
101 { SCIF2_BRI_IRQ, INTC_IPR14, 1, 3 },
102 { SCIF2_TXI_IRQ, INTC_IPR14, 1, 3 },
103 { SCIF3_ERI_IRQ, INTC_IPR14, 0, 3 },
104 { SCIF3_RXI_IRQ, INTC_IPR14, 0, 3 },
105 { SCIF3_BRI_IRQ, INTC_IPR14, 0, 3 },
106 { SCIF3_TXI_IRQ, INTC_IPR14, 0, 3 },
107};
108
109void __init init_IRQ_ipr(void)
110{
111 make_ipr_irq(sh7206_ipr_map, ARRAY_SIZE(sh7206_ipr_map));
112}