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authorPaul Mundt <lethal@linux-sh.org>2009-05-12 06:54:36 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-05-12 06:54:36 -0400
commitfd5b12458b25a88eb6f6b56464846d98a45e8928 (patch)
tree916107480879f131b504652af4f74524b2f327b3 /arch/sh/kernel
parent9fe5ee0efb1b1d4a0939bc4252a8427e3337d96a (diff)
parent8be5f1a68f2c14082939dd54e7037dcee2eb54f8 (diff)
Merge branch 'master' into sh/clkfwk
Diffstat (limited to 'arch/sh/kernel')
-rw-r--r--arch/sh/kernel/Makefile_322
-rw-r--r--arch/sh/kernel/Makefile_642
-rw-r--r--arch/sh/kernel/cpu/clock.c1
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c108
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh770x.c108
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7710.c108
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c270
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh4-202.c164
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7343.c98
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c98
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c195
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7763.c204
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7770.c300
-rw-r--r--arch/sh/kernel/time.c29
-rw-r--r--arch/sh/kernel/timers/Makefile7
-rw-r--r--arch/sh/kernel/timers/timer-tmu.c295
-rw-r--r--arch/sh/kernel/timers/timer.c49
17 files changed, 1656 insertions, 382 deletions
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32
index aee08afe5ff7..9411e3e31e68 100644
--- a/arch/sh/kernel/Makefile_32
+++ b/arch/sh/kernel/Makefile_32
@@ -14,7 +14,7 @@ obj-y := debugtraps.o idle.o io.o io_generic.o irq.o \
14 sys_sh.o sys_sh32.o syscalls_32.o time.o topology.o \ 14 sys_sh.o sys_sh32.o syscalls_32.o time.o topology.o \
15 traps.o traps_32.o 15 traps.o traps_32.o
16 16
17obj-y += cpu/ timers/ 17obj-y += cpu/
18obj-$(CONFIG_VSYSCALL) += vsyscall/ 18obj-$(CONFIG_VSYSCALL) += vsyscall/
19obj-$(CONFIG_SMP) += smp.o 19obj-$(CONFIG_SMP) += smp.o
20obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o 20obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
diff --git a/arch/sh/kernel/Makefile_64 b/arch/sh/kernel/Makefile_64
index c845a0d61979..67b9f6c6326b 100644
--- a/arch/sh/kernel/Makefile_64
+++ b/arch/sh/kernel/Makefile_64
@@ -4,7 +4,7 @@ obj-y := debugtraps.o idle.o io.o io_generic.o irq.o machvec.o process_64.o \
4 ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \ 4 ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \
5 syscalls_64.o time.o topology.o traps.o traps_64.o 5 syscalls_64.o time.o topology.o traps.o traps_64.o
6 6
7obj-y += cpu/ timers/ 7obj-y += cpu/
8obj-$(CONFIG_SMP) += smp.o 8obj-$(CONFIG_SMP) += smp.o
9obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o 9obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
10obj-$(CONFIG_MODULES) += sh_ksyms_64.o module.o 10obj-$(CONFIG_MODULES) += sh_ksyms_64.o module.o
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index f833843a194a..61ff227561dc 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -30,7 +30,6 @@
30#include <linux/platform_device.h> 30#include <linux/platform_device.h>
31#include <linux/proc_fs.h> 31#include <linux/proc_fs.h>
32#include <asm/clock.h> 32#include <asm/clock.h>
33#include <asm/timer.h>
34 33
35static LIST_HEAD(clock_list); 34static LIST_HEAD(clock_list);
36static DEFINE_SPINLOCK(clock_lock); 35static DEFINE_SPINLOCK(clock_lock);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index 63b67badd67e..39513664d5d7 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -13,6 +13,7 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/serial.h> 14#include <linux/serial.h>
15#include <linux/serial_sci.h> 15#include <linux/serial_sci.h>
16#include <linux/sh_timer.h>
16#include <asm/rtc.h> 17#include <asm/rtc.h>
17 18
18enum { 19enum {
@@ -116,7 +117,102 @@ static struct platform_device rtc_device = {
116 }, 117 },
117}; 118};
118 119
120static struct sh_timer_config tmu0_platform_data = {
121 .name = "TMU0",
122 .channel_offset = 0x02,
123 .timer_bit = 0,
124 .clk = "module_clk",
125 .clockevent_rating = 200,
126};
127
128static struct resource tmu0_resources[] = {
129 [0] = {
130 .name = "TMU0",
131 .start = 0xfffffe94,
132 .end = 0xfffffe9f,
133 .flags = IORESOURCE_MEM,
134 },
135 [1] = {
136 .start = 16,
137 .flags = IORESOURCE_IRQ,
138 },
139};
140
141static struct platform_device tmu0_device = {
142 .name = "sh_tmu",
143 .id = 0,
144 .dev = {
145 .platform_data = &tmu0_platform_data,
146 },
147 .resource = tmu0_resources,
148 .num_resources = ARRAY_SIZE(tmu0_resources),
149};
150
151static struct sh_timer_config tmu1_platform_data = {
152 .name = "TMU1",
153 .channel_offset = 0xe,
154 .timer_bit = 1,
155 .clk = "module_clk",
156 .clocksource_rating = 200,
157};
158
159static struct resource tmu1_resources[] = {
160 [0] = {
161 .name = "TMU1",
162 .start = 0xfffffea0,
163 .end = 0xfffffeab,
164 .flags = IORESOURCE_MEM,
165 },
166 [1] = {
167 .start = 17,
168 .flags = IORESOURCE_IRQ,
169 },
170};
171
172static struct platform_device tmu1_device = {
173 .name = "sh_tmu",
174 .id = 1,
175 .dev = {
176 .platform_data = &tmu1_platform_data,
177 },
178 .resource = tmu1_resources,
179 .num_resources = ARRAY_SIZE(tmu1_resources),
180};
181
182static struct sh_timer_config tmu2_platform_data = {
183 .name = "TMU2",
184 .channel_offset = 0x1a,
185 .timer_bit = 2,
186 .clk = "module_clk",
187};
188
189static struct resource tmu2_resources[] = {
190 [0] = {
191 .name = "TMU2",
192 .start = 0xfffffeac,
193 .end = 0xfffffebb,
194 .flags = IORESOURCE_MEM,
195 },
196 [1] = {
197 .start = 18,
198 .flags = IORESOURCE_IRQ,
199 },
200};
201
202static struct platform_device tmu2_device = {
203 .name = "sh_tmu",
204 .id = 2,
205 .dev = {
206 .platform_data = &tmu2_platform_data,
207 },
208 .resource = tmu2_resources,
209 .num_resources = ARRAY_SIZE(tmu2_resources),
210};
211
119static struct platform_device *sh7705_devices[] __initdata = { 212static struct platform_device *sh7705_devices[] __initdata = {
213 &tmu0_device,
214 &tmu1_device,
215 &tmu2_device,
120 &sci_device, 216 &sci_device,
121 &rtc_device, 217 &rtc_device,
122}; 218};
@@ -128,6 +224,18 @@ static int __init sh7705_devices_setup(void)
128} 224}
129__initcall(sh7705_devices_setup); 225__initcall(sh7705_devices_setup);
130 226
227static struct platform_device *sh7705_early_devices[] __initdata = {
228 &tmu0_device,
229 &tmu1_device,
230 &tmu2_device,
231};
232
233void __init plat_early_device_setup(void)
234{
235 early_platform_add_devices(sh7705_early_devices,
236 ARRAY_SIZE(sh7705_early_devices));
237}
238
131void __init plat_irq_setup(void) 239void __init plat_irq_setup(void)
132{ 240{
133 register_intc_controller(&intc_desc); 241 register_intc_controller(&intc_desc);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index a74f960b5e79..9412d915b84e 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -18,6 +18,7 @@
18#include <linux/platform_device.h> 18#include <linux/platform_device.h>
19#include <linux/serial.h> 19#include <linux/serial.h>
20#include <linux/serial_sci.h> 20#include <linux/serial_sci.h>
21#include <linux/sh_timer.h>
21 22
22enum { 23enum {
23 UNUSED = 0, 24 UNUSED = 0,
@@ -144,7 +145,102 @@ static struct platform_device sci_device = {
144 }, 145 },
145}; 146};
146 147
148static struct sh_timer_config tmu0_platform_data = {
149 .name = "TMU0",
150 .channel_offset = 0x02,
151 .timer_bit = 0,
152 .clk = "module_clk",
153 .clockevent_rating = 200,
154};
155
156static struct resource tmu0_resources[] = {
157 [0] = {
158 .name = "TMU0",
159 .start = 0xfffffe94,
160 .end = 0xfffffe9f,
161 .flags = IORESOURCE_MEM,
162 },
163 [1] = {
164 .start = 16,
165 .flags = IORESOURCE_IRQ,
166 },
167};
168
169static struct platform_device tmu0_device = {
170 .name = "sh_tmu",
171 .id = 0,
172 .dev = {
173 .platform_data = &tmu0_platform_data,
174 },
175 .resource = tmu0_resources,
176 .num_resources = ARRAY_SIZE(tmu0_resources),
177};
178
179static struct sh_timer_config tmu1_platform_data = {
180 .name = "TMU1",
181 .channel_offset = 0xe,
182 .timer_bit = 1,
183 .clk = "module_clk",
184 .clocksource_rating = 200,
185};
186
187static struct resource tmu1_resources[] = {
188 [0] = {
189 .name = "TMU1",
190 .start = 0xfffffea0,
191 .end = 0xfffffeab,
192 .flags = IORESOURCE_MEM,
193 },
194 [1] = {
195 .start = 17,
196 .flags = IORESOURCE_IRQ,
197 },
198};
199
200static struct platform_device tmu1_device = {
201 .name = "sh_tmu",
202 .id = 1,
203 .dev = {
204 .platform_data = &tmu1_platform_data,
205 },
206 .resource = tmu1_resources,
207 .num_resources = ARRAY_SIZE(tmu1_resources),
208};
209
210static struct sh_timer_config tmu2_platform_data = {
211 .name = "TMU2",
212 .channel_offset = 0x1a,
213 .timer_bit = 2,
214 .clk = "module_clk",
215};
216
217static struct resource tmu2_resources[] = {
218 [0] = {
219 .name = "TMU2",
220 .start = 0xfffffeac,
221 .end = 0xfffffebb,
222 .flags = IORESOURCE_MEM,
223 },
224 [1] = {
225 .start = 18,
226 .flags = IORESOURCE_IRQ,
227 },
228};
229
230static struct platform_device tmu2_device = {
231 .name = "sh_tmu",
232 .id = 2,
233 .dev = {
234 .platform_data = &tmu2_platform_data,
235 },
236 .resource = tmu2_resources,
237 .num_resources = ARRAY_SIZE(tmu2_resources),
238};
239
147static struct platform_device *sh770x_devices[] __initdata = { 240static struct platform_device *sh770x_devices[] __initdata = {
241 &tmu0_device,
242 &tmu1_device,
243 &tmu2_device,
148 &sci_device, 244 &sci_device,
149 &rtc_device, 245 &rtc_device,
150}; 246};
@@ -156,6 +252,18 @@ static int __init sh770x_devices_setup(void)
156} 252}
157__initcall(sh770x_devices_setup); 253__initcall(sh770x_devices_setup);
158 254
255static struct platform_device *sh770x_early_devices[] __initdata = {
256 &tmu0_device,
257 &tmu1_device,
258 &tmu2_device,
259};
260
261void __init plat_early_device_setup(void)
262{
263 early_platform_add_devices(sh770x_early_devices,
264 ARRAY_SIZE(sh770x_early_devices));
265}
266
159void __init plat_irq_setup(void) 267void __init plat_irq_setup(void)
160{ 268{
161 register_intc_controller(&intc_desc); 269 register_intc_controller(&intc_desc);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 335098b66e2f..07ff38d055a7 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -13,6 +13,7 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/serial.h> 14#include <linux/serial.h>
15#include <linux/serial_sci.h> 15#include <linux/serial_sci.h>
16#include <linux/sh_timer.h>
16#include <asm/rtc.h> 17#include <asm/rtc.h>
17 18
18enum { 19enum {
@@ -120,7 +121,102 @@ static struct platform_device sci_device = {
120 }, 121 },
121}; 122};
122 123
124static struct sh_timer_config tmu0_platform_data = {
125 .name = "TMU0",
126 .channel_offset = 0x02,
127 .timer_bit = 0,
128 .clk = "module_clk",
129 .clockevent_rating = 200,
130};
131
132static struct resource tmu0_resources[] = {
133 [0] = {
134 .name = "TMU0",
135 .start = 0xa412fe94,
136 .end = 0xa412fe9f,
137 .flags = IORESOURCE_MEM,
138 },
139 [1] = {
140 .start = 16,
141 .flags = IORESOURCE_IRQ,
142 },
143};
144
145static struct platform_device tmu0_device = {
146 .name = "sh_tmu",
147 .id = 0,
148 .dev = {
149 .platform_data = &tmu0_platform_data,
150 },
151 .resource = tmu0_resources,
152 .num_resources = ARRAY_SIZE(tmu0_resources),
153};
154
155static struct sh_timer_config tmu1_platform_data = {
156 .name = "TMU1",
157 .channel_offset = 0xe,
158 .timer_bit = 1,
159 .clk = "module_clk",
160 .clocksource_rating = 200,
161};
162
163static struct resource tmu1_resources[] = {
164 [0] = {
165 .name = "TMU1",
166 .start = 0xa412fea0,
167 .end = 0xa412feab,
168 .flags = IORESOURCE_MEM,
169 },
170 [1] = {
171 .start = 17,
172 .flags = IORESOURCE_IRQ,
173 },
174};
175
176static struct platform_device tmu1_device = {
177 .name = "sh_tmu",
178 .id = 1,
179 .dev = {
180 .platform_data = &tmu1_platform_data,
181 },
182 .resource = tmu1_resources,
183 .num_resources = ARRAY_SIZE(tmu1_resources),
184};
185
186static struct sh_timer_config tmu2_platform_data = {
187 .name = "TMU2",
188 .channel_offset = 0x1a,
189 .timer_bit = 2,
190 .clk = "module_clk",
191};
192
193static struct resource tmu2_resources[] = {
194 [0] = {
195 .name = "TMU2",
196 .start = 0xa412feac,
197 .end = 0xa412feb5,
198 .flags = IORESOURCE_MEM,
199 },
200 [1] = {
201 .start = 18,
202 .flags = IORESOURCE_IRQ,
203 },
204};
205
206static struct platform_device tmu2_device = {
207 .name = "sh_tmu",
208 .id = 2,
209 .dev = {
210 .platform_data = &tmu2_platform_data,
211 },
212 .resource = tmu2_resources,
213 .num_resources = ARRAY_SIZE(tmu2_resources),
214};
215
123static struct platform_device *sh7710_devices[] __initdata = { 216static struct platform_device *sh7710_devices[] __initdata = {
217 &tmu0_device,
218 &tmu1_device,
219 &tmu2_device,
124 &sci_device, 220 &sci_device,
125 &rtc_device, 221 &rtc_device,
126}; 222};
@@ -132,6 +228,18 @@ static int __init sh7710_devices_setup(void)
132} 228}
133__initcall(sh7710_devices_setup); 229__initcall(sh7710_devices_setup);
134 230
231static struct platform_device *sh7710_early_devices[] __initdata = {
232 &tmu0_device,
233 &tmu1_device,
234 &tmu2_device,
235};
236
237void __init plat_early_device_setup(void)
238{
239 early_platform_add_devices(sh7710_early_devices,
240 ARRAY_SIZE(sh7710_early_devices));
241}
242
135void __init plat_irq_setup(void) 243void __init plat_irq_setup(void)
136{ 244{
137 register_intc_controller(&intc_desc); 245 register_intc_controller(&intc_desc);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 003874a2fd2a..d8b46f5dff60 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -18,6 +18,7 @@
18#include <linux/serial.h> 18#include <linux/serial.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/serial_sci.h> 20#include <linux/serial_sci.h>
21#include <linux/sh_timer.h>
21#include <asm/rtc.h> 22#include <asm/rtc.h>
22 23
23static struct resource rtc_resources[] = { 24static struct resource rtc_resources[] = {
@@ -123,7 +124,259 @@ static struct platform_device usbf_device = {
123 .resource = usbf_resources, 124 .resource = usbf_resources,
124}; 125};
125 126
127static struct sh_timer_config cmt0_platform_data = {
128 .name = "CMT0",
129 .channel_offset = 0x10,
130 .timer_bit = 0,
131 .clk = "module_clk",
132 .clockevent_rating = 125,
133 .clocksource_rating = 125,
134};
135
136static struct resource cmt0_resources[] = {
137 [0] = {
138 .name = "CMT0",
139 .start = 0x044a0010,
140 .end = 0x044a001b,
141 .flags = IORESOURCE_MEM,
142 },
143 [1] = {
144 .start = 104,
145 .flags = IORESOURCE_IRQ,
146 },
147};
148
149static struct platform_device cmt0_device = {
150 .name = "sh_cmt",
151 .id = 0,
152 .dev = {
153 .platform_data = &cmt0_platform_data,
154 },
155 .resource = cmt0_resources,
156 .num_resources = ARRAY_SIZE(cmt0_resources),
157};
158
159static struct sh_timer_config cmt1_platform_data = {
160 .name = "CMT1",
161 .channel_offset = 0x20,
162 .timer_bit = 1,
163 .clk = "module_clk",
164};
165
166static struct resource cmt1_resources[] = {
167 [0] = {
168 .name = "CMT1",
169 .start = 0x044a0020,
170 .end = 0x044a002b,
171 .flags = IORESOURCE_MEM,
172 },
173 [1] = {
174 .start = 104,
175 .flags = IORESOURCE_IRQ,
176 },
177};
178
179static struct platform_device cmt1_device = {
180 .name = "sh_cmt",
181 .id = 1,
182 .dev = {
183 .platform_data = &cmt1_platform_data,
184 },
185 .resource = cmt1_resources,
186 .num_resources = ARRAY_SIZE(cmt1_resources),
187};
188
189static struct sh_timer_config cmt2_platform_data = {
190 .name = "CMT2",
191 .channel_offset = 0x30,
192 .timer_bit = 2,
193 .clk = "module_clk",
194};
195
196static struct resource cmt2_resources[] = {
197 [0] = {
198 .name = "CMT2",
199 .start = 0x044a0030,
200 .end = 0x044a003b,
201 .flags = IORESOURCE_MEM,
202 },
203 [1] = {
204 .start = 104,
205 .flags = IORESOURCE_IRQ,
206 },
207};
208
209static struct platform_device cmt2_device = {
210 .name = "sh_cmt",
211 .id = 2,
212 .dev = {
213 .platform_data = &cmt2_platform_data,
214 },
215 .resource = cmt2_resources,
216 .num_resources = ARRAY_SIZE(cmt2_resources),
217};
218
219static struct sh_timer_config cmt3_platform_data = {
220 .name = "CMT3",
221 .channel_offset = 0x40,
222 .timer_bit = 3,
223 .clk = "module_clk",
224};
225
226static struct resource cmt3_resources[] = {
227 [0] = {
228 .name = "CMT3",
229 .start = 0x044a0040,
230 .end = 0x044a004b,
231 .flags = IORESOURCE_MEM,
232 },
233 [1] = {
234 .start = 104,
235 .flags = IORESOURCE_IRQ,
236 },
237};
238
239static struct platform_device cmt3_device = {
240 .name = "sh_cmt",
241 .id = 3,
242 .dev = {
243 .platform_data = &cmt3_platform_data,
244 },
245 .resource = cmt3_resources,
246 .num_resources = ARRAY_SIZE(cmt3_resources),
247};
248
249static struct sh_timer_config cmt4_platform_data = {
250 .name = "CMT4",
251 .channel_offset = 0x50,
252 .timer_bit = 4,
253 .clk = "module_clk",
254};
255
256static struct resource cmt4_resources[] = {
257 [0] = {
258 .name = "CMT4",
259 .start = 0x044a0050,
260 .end = 0x044a005b,
261 .flags = IORESOURCE_MEM,
262 },
263 [1] = {
264 .start = 104,
265 .flags = IORESOURCE_IRQ,
266 },
267};
268
269static struct platform_device cmt4_device = {
270 .name = "sh_cmt",
271 .id = 4,
272 .dev = {
273 .platform_data = &cmt4_platform_data,
274 },
275 .resource = cmt4_resources,
276 .num_resources = ARRAY_SIZE(cmt4_resources),
277};
278
279static struct sh_timer_config tmu0_platform_data = {
280 .name = "TMU0",
281 .channel_offset = 0x02,
282 .timer_bit = 0,
283 .clk = "module_clk",
284 .clockevent_rating = 200,
285};
286
287static struct resource tmu0_resources[] = {
288 [0] = {
289 .name = "TMU0",
290 .start = 0xa412fe94,
291 .end = 0xa412fe9f,
292 .flags = IORESOURCE_MEM,
293 },
294 [1] = {
295 .start = 16,
296 .flags = IORESOURCE_IRQ,
297 },
298};
299
300static struct platform_device tmu0_device = {
301 .name = "sh_tmu",
302 .id = 0,
303 .dev = {
304 .platform_data = &tmu0_platform_data,
305 },
306 .resource = tmu0_resources,
307 .num_resources = ARRAY_SIZE(tmu0_resources),
308};
309
310static struct sh_timer_config tmu1_platform_data = {
311 .name = "TMU1",
312 .channel_offset = 0xe,
313 .timer_bit = 1,
314 .clk = "module_clk",
315 .clocksource_rating = 200,
316};
317
318static struct resource tmu1_resources[] = {
319 [0] = {
320 .name = "TMU1",
321 .start = 0xa412fea0,
322 .end = 0xa412feab,
323 .flags = IORESOURCE_MEM,
324 },
325 [1] = {
326 .start = 17,
327 .flags = IORESOURCE_IRQ,
328 },
329};
330
331static struct platform_device tmu1_device = {
332 .name = "sh_tmu",
333 .id = 1,
334 .dev = {
335 .platform_data = &tmu1_platform_data,
336 },
337 .resource = tmu1_resources,
338 .num_resources = ARRAY_SIZE(tmu1_resources),
339};
340
341static struct sh_timer_config tmu2_platform_data = {
342 .name = "TMU2",
343 .channel_offset = 0x1a,
344 .timer_bit = 2,
345 .clk = "module_clk",
346};
347
348static struct resource tmu2_resources[] = {
349 [0] = {
350 .name = "TMU2",
351 .start = 0xa412feac,
352 .end = 0xa412feb5,
353 .flags = IORESOURCE_MEM,
354 },
355 [1] = {
356 .start = 18,
357 .flags = IORESOURCE_IRQ,
358 },
359};
360
361static struct platform_device tmu2_device = {
362 .name = "sh_tmu",
363 .id = 2,
364 .dev = {
365 .platform_data = &tmu2_platform_data,
366 },
367 .resource = tmu2_resources,
368 .num_resources = ARRAY_SIZE(tmu2_resources),
369};
370
126static struct platform_device *sh7720_devices[] __initdata = { 371static struct platform_device *sh7720_devices[] __initdata = {
372 &cmt0_device,
373 &cmt1_device,
374 &cmt2_device,
375 &cmt3_device,
376 &cmt4_device,
377 &tmu0_device,
378 &tmu1_device,
379 &tmu2_device,
127 &rtc_device, 380 &rtc_device,
128 &sci_device, 381 &sci_device,
129 &usb_ohci_device, 382 &usb_ohci_device,
@@ -137,6 +390,23 @@ static int __init sh7720_devices_setup(void)
137} 390}
138__initcall(sh7720_devices_setup); 391__initcall(sh7720_devices_setup);
139 392
393static struct platform_device *sh7720_early_devices[] __initdata = {
394 &cmt0_device,
395 &cmt1_device,
396 &cmt2_device,
397 &cmt3_device,
398 &cmt4_device,
399 &tmu0_device,
400 &tmu1_device,
401 &tmu2_device,
402};
403
404void __init plat_early_device_setup(void)
405{
406 early_platform_add_devices(sh7720_early_devices,
407 ARRAY_SIZE(sh7720_early_devices));
408}
409
140enum { 410enum {
141 UNUSED = 0, 411 UNUSED = 0,
142 412
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index 7371abf64f80..be79fa136255 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -2,6 +2,7 @@
2 * SH4-202 Setup 2 * SH4-202 Setup
3 * 3 *
4 * Copyright (C) 2006 Paul Mundt 4 * Copyright (C) 2006 Paul Mundt
5 * Copyright (C) 2009 Magnus Damm
5 * 6 *
6 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
@@ -11,6 +12,8 @@
11#include <linux/init.h> 12#include <linux/init.h>
12#include <linux/serial.h> 13#include <linux/serial.h>
13#include <linux/serial_sci.h> 14#include <linux/serial_sci.h>
15#include <linux/sh_timer.h>
16#include <linux/io.h>
14 17
15static struct plat_sci_port sci_platform_data[] = { 18static struct plat_sci_port sci_platform_data[] = {
16 { 19 {
@@ -31,8 +34,103 @@ static struct platform_device sci_device = {
31 }, 34 },
32}; 35};
33 36
37static struct sh_timer_config tmu0_platform_data = {
38 .name = "TMU0",
39 .channel_offset = 0x04,
40 .timer_bit = 0,
41 .clk = "module_clk",
42 .clockevent_rating = 200,
43};
44
45static struct resource tmu0_resources[] = {
46 [0] = {
47 .name = "TMU0",
48 .start = 0xffd80008,
49 .end = 0xffd80013,
50 .flags = IORESOURCE_MEM,
51 },
52 [1] = {
53 .start = 16,
54 .flags = IORESOURCE_IRQ,
55 },
56};
57
58static struct platform_device tmu0_device = {
59 .name = "sh_tmu",
60 .id = 0,
61 .dev = {
62 .platform_data = &tmu0_platform_data,
63 },
64 .resource = tmu0_resources,
65 .num_resources = ARRAY_SIZE(tmu0_resources),
66};
67
68static struct sh_timer_config tmu1_platform_data = {
69 .name = "TMU1",
70 .channel_offset = 0x10,
71 .timer_bit = 1,
72 .clk = "module_clk",
73 .clocksource_rating = 200,
74};
75
76static struct resource tmu1_resources[] = {
77 [0] = {
78 .name = "TMU1",
79 .start = 0xffd80014,
80 .end = 0xffd8001f,
81 .flags = IORESOURCE_MEM,
82 },
83 [1] = {
84 .start = 17,
85 .flags = IORESOURCE_IRQ,
86 },
87};
88
89static struct platform_device tmu1_device = {
90 .name = "sh_tmu",
91 .id = 1,
92 .dev = {
93 .platform_data = &tmu1_platform_data,
94 },
95 .resource = tmu1_resources,
96 .num_resources = ARRAY_SIZE(tmu1_resources),
97};
98
99static struct sh_timer_config tmu2_platform_data = {
100 .name = "TMU2",
101 .channel_offset = 0x1c,
102 .timer_bit = 2,
103 .clk = "module_clk",
104};
105
106static struct resource tmu2_resources[] = {
107 [0] = {
108 .name = "TMU2",
109 .start = 0xffd80020,
110 .end = 0xffd8002f,
111 .flags = IORESOURCE_MEM,
112 },
113 [1] = {
114 .start = 18,
115 .flags = IORESOURCE_IRQ,
116 },
117};
118
119static struct platform_device tmu2_device = {
120 .name = "sh_tmu",
121 .id = 2,
122 .dev = {
123 .platform_data = &tmu2_platform_data,
124 },
125 .resource = tmu2_resources,
126 .num_resources = ARRAY_SIZE(tmu2_resources),
127};
128
34static struct platform_device *sh4202_devices[] __initdata = { 129static struct platform_device *sh4202_devices[] __initdata = {
35 &sci_device, 130 &sci_device,
131 &tmu0_device,
132 &tmu1_device,
133 &tmu2_device,
36}; 134};
37 135
38static int __init sh4202_devices_setup(void) 136static int __init sh4202_devices_setup(void)
@@ -42,7 +140,71 @@ static int __init sh4202_devices_setup(void)
42} 140}
43__initcall(sh4202_devices_setup); 141__initcall(sh4202_devices_setup);
44 142
143static struct platform_device *sh4202_early_devices[] __initdata = {
144 &tmu0_device,
145 &tmu1_device,
146 &tmu2_device,
147};
148
149void __init plat_early_device_setup(void)
150{
151 early_platform_add_devices(sh4202_early_devices,
152 ARRAY_SIZE(sh4202_early_devices));
153}
154
155enum {
156 UNUSED = 0,
157
158 /* interrupt sources */
159 IRL0, IRL1, IRL2, IRL3, /* only IRLM mode supported */
160 HUDI, TMU0, TMU1, TMU2, RTC, SCIF, WDT,
161};
162
163static struct intc_vect vectors[] __initdata = {
164 INTC_VECT(HUDI, 0x600),
165 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
166 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
167 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
168 INTC_VECT(RTC, 0x4c0),
169 INTC_VECT(SCIF, 0x700), INTC_VECT(SCIF, 0x720),
170 INTC_VECT(SCIF, 0x740), INTC_VECT(SCIF, 0x760),
171 INTC_VECT(WDT, 0x560),
172};
173
174static struct intc_prio_reg prio_registers[] __initdata = {
175 { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
176 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, 0, 0, 0 } },
177 { 0xffd0000c, 0, 16, 4, /* IPRC */ { 0, 0, SCIF, HUDI } },
178 { 0xffd00010, 0, 16, 4, /* IPRD */ { IRL0, IRL1, IRL2, IRL3 } },
179};
180
181static DECLARE_INTC_DESC(intc_desc, "sh4-202", vectors, NULL,
182 NULL, prio_registers, NULL);
183
184static struct intc_vect vectors_irlm[] __initdata = {
185 INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0),
186 INTC_VECT(IRL2, 0x300), INTC_VECT(IRL3, 0x360),
187};
188
189static DECLARE_INTC_DESC(intc_desc_irlm, "sh4-202_irlm", vectors_irlm, NULL,
190 NULL, prio_registers, NULL);
191
45void __init plat_irq_setup(void) 192void __init plat_irq_setup(void)
46{ 193{
47 /* do nothing - all IRL interrupts are handled by the board code */ 194 register_intc_controller(&intc_desc);
195}
196
197#define INTC_ICR 0xffd00000UL
198#define INTC_ICR_IRLM (1<<7)
199
200void __init plat_irq_setup_pins(int mode)
201{
202 switch (mode) {
203 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
204 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
205 register_intc_controller(&intc_desc_irlm);
206 break;
207 default:
208 BUG();
209 }
48} 210}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 42ce5fcbd735..6307e087c864 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -173,6 +173,98 @@ static struct platform_device cmt_device = {
173 .num_resources = ARRAY_SIZE(cmt_resources), 173 .num_resources = ARRAY_SIZE(cmt_resources),
174}; 174};
175 175
176static struct sh_timer_config tmu0_platform_data = {
177 .name = "TMU0",
178 .channel_offset = 0x04,
179 .timer_bit = 0,
180 .clk = "tmu0",
181 .clockevent_rating = 200,
182};
183
184static struct resource tmu0_resources[] = {
185 [0] = {
186 .name = "TMU0",
187 .start = 0xffd80008,
188 .end = 0xffd80013,
189 .flags = IORESOURCE_MEM,
190 },
191 [1] = {
192 .start = 16,
193 .flags = IORESOURCE_IRQ,
194 },
195};
196
197static struct platform_device tmu0_device = {
198 .name = "sh_tmu",
199 .id = 0,
200 .dev = {
201 .platform_data = &tmu0_platform_data,
202 },
203 .resource = tmu0_resources,
204 .num_resources = ARRAY_SIZE(tmu0_resources),
205};
206
207static struct sh_timer_config tmu1_platform_data = {
208 .name = "TMU1",
209 .channel_offset = 0x10,
210 .timer_bit = 1,
211 .clk = "tmu0",
212 .clocksource_rating = 200,
213};
214
215static struct resource tmu1_resources[] = {
216 [0] = {
217 .name = "TMU1",
218 .start = 0xffd80014,
219 .end = 0xffd8001f,
220 .flags = IORESOURCE_MEM,
221 },
222 [1] = {
223 .start = 17,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
228static struct platform_device tmu1_device = {
229 .name = "sh_tmu",
230 .id = 1,
231 .dev = {
232 .platform_data = &tmu1_platform_data,
233 },
234 .resource = tmu1_resources,
235 .num_resources = ARRAY_SIZE(tmu1_resources),
236};
237
238static struct sh_timer_config tmu2_platform_data = {
239 .name = "TMU2",
240 .channel_offset = 0x1c,
241 .timer_bit = 2,
242 .clk = "tmu0",
243};
244
245static struct resource tmu2_resources[] = {
246 [0] = {
247 .name = "TMU2",
248 .start = 0xffd80020,
249 .end = 0xffd8002b,
250 .flags = IORESOURCE_MEM,
251 },
252 [1] = {
253 .start = 18,
254 .flags = IORESOURCE_IRQ,
255 },
256};
257
258static struct platform_device tmu2_device = {
259 .name = "sh_tmu",
260 .id = 2,
261 .dev = {
262 .platform_data = &tmu2_platform_data,
263 },
264 .resource = tmu2_resources,
265 .num_resources = ARRAY_SIZE(tmu2_resources),
266};
267
176static struct plat_sci_port sci_platform_data[] = { 268static struct plat_sci_port sci_platform_data[] = {
177 { 269 {
178 .mapbase = 0xffe00000, 270 .mapbase = 0xffe00000,
@@ -213,6 +305,9 @@ static struct platform_device sci_device = {
213 305
214static struct platform_device *sh7343_devices[] __initdata = { 306static struct platform_device *sh7343_devices[] __initdata = {
215 &cmt_device, 307 &cmt_device,
308 &tmu0_device,
309 &tmu1_device,
310 &tmu2_device,
216 &iic0_device, 311 &iic0_device,
217 &iic1_device, 312 &iic1_device,
218 &sci_device, 313 &sci_device,
@@ -234,6 +329,9 @@ __initcall(sh7343_devices_setup);
234 329
235static struct platform_device *sh7343_early_devices[] __initdata = { 330static struct platform_device *sh7343_early_devices[] __initdata = {
236 &cmt_device, 331 &cmt_device,
332 &tmu0_device,
333 &tmu1_device,
334 &tmu2_device,
237}; 335};
238 336
239void __init plat_early_device_setup(void) 337void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index d0172afa0b5d..318516f6bfad 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -180,6 +180,98 @@ static struct platform_device cmt_device = {
180 .num_resources = ARRAY_SIZE(cmt_resources), 180 .num_resources = ARRAY_SIZE(cmt_resources),
181}; 181};
182 182
183static struct sh_timer_config tmu0_platform_data = {
184 .name = "TMU0",
185 .channel_offset = 0x04,
186 .timer_bit = 0,
187 .clk = "tmu0",
188 .clockevent_rating = 200,
189};
190
191static struct resource tmu0_resources[] = {
192 [0] = {
193 .name = "TMU0",
194 .start = 0xffd80008,
195 .end = 0xffd80013,
196 .flags = IORESOURCE_MEM,
197 },
198 [1] = {
199 .start = 16,
200 .flags = IORESOURCE_IRQ,
201 },
202};
203
204static struct platform_device tmu0_device = {
205 .name = "sh_tmu",
206 .id = 0,
207 .dev = {
208 .platform_data = &tmu0_platform_data,
209 },
210 .resource = tmu0_resources,
211 .num_resources = ARRAY_SIZE(tmu0_resources),
212};
213
214static struct sh_timer_config tmu1_platform_data = {
215 .name = "TMU1",
216 .channel_offset = 0x10,
217 .timer_bit = 1,
218 .clk = "tmu0",
219 .clocksource_rating = 200,
220};
221
222static struct resource tmu1_resources[] = {
223 [0] = {
224 .name = "TMU1",
225 .start = 0xffd80014,
226 .end = 0xffd8001f,
227 .flags = IORESOURCE_MEM,
228 },
229 [1] = {
230 .start = 17,
231 .flags = IORESOURCE_IRQ,
232 },
233};
234
235static struct platform_device tmu1_device = {
236 .name = "sh_tmu",
237 .id = 1,
238 .dev = {
239 .platform_data = &tmu1_platform_data,
240 },
241 .resource = tmu1_resources,
242 .num_resources = ARRAY_SIZE(tmu1_resources),
243};
244
245static struct sh_timer_config tmu2_platform_data = {
246 .name = "TMU2",
247 .channel_offset = 0x1c,
248 .timer_bit = 2,
249 .clk = "tmu0",
250};
251
252static struct resource tmu2_resources[] = {
253 [0] = {
254 .name = "TMU2",
255 .start = 0xffd80020,
256 .end = 0xffd8002b,
257 .flags = IORESOURCE_MEM,
258 },
259 [1] = {
260 .start = 18,
261 .flags = IORESOURCE_IRQ,
262 },
263};
264
265static struct platform_device tmu2_device = {
266 .name = "sh_tmu",
267 .id = 2,
268 .dev = {
269 .platform_data = &tmu2_platform_data,
270 },
271 .resource = tmu2_resources,
272 .num_resources = ARRAY_SIZE(tmu2_resources),
273};
274
183static struct plat_sci_port sci_platform_data[] = { 275static struct plat_sci_port sci_platform_data[] = {
184 { 276 {
185 .mapbase = 0xffe00000, 277 .mapbase = 0xffe00000,
@@ -202,6 +294,9 @@ static struct platform_device sci_device = {
202 294
203static struct platform_device *sh7366_devices[] __initdata = { 295static struct platform_device *sh7366_devices[] __initdata = {
204 &cmt_device, 296 &cmt_device,
297 &tmu0_device,
298 &tmu1_device,
299 &tmu2_device,
205 &iic_device, 300 &iic_device,
206 &sci_device, 301 &sci_device,
207 &usb_host_device, 302 &usb_host_device,
@@ -223,6 +318,9 @@ __initcall(sh7366_devices_setup);
223 318
224static struct platform_device *sh7366_early_devices[] __initdata = { 319static struct platform_device *sh7366_early_devices[] __initdata = {
225 &cmt_device, 320 &cmt_device,
321 &tmu0_device,
322 &tmu1_device,
323 &tmu2_device,
226}; 324};
227 325
228void __init plat_early_device_setup(void) 326void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 080f541ae08d..191f0e2a7e08 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -268,8 +268,197 @@ static struct platform_device cmt_device = {
268 .num_resources = ARRAY_SIZE(cmt_resources), 268 .num_resources = ARRAY_SIZE(cmt_resources),
269}; 269};
270 270
271static struct sh_timer_config tmu0_platform_data = {
272 .name = "TMU0",
273 .channel_offset = 0x04,
274 .timer_bit = 0,
275 .clk = "tmu0",
276 .clockevent_rating = 200,
277};
278
279static struct resource tmu0_resources[] = {
280 [0] = {
281 .name = "TMU0",
282 .start = 0xffd80008,
283 .end = 0xffd80013,
284 .flags = IORESOURCE_MEM,
285 },
286 [1] = {
287 .start = 16,
288 .flags = IORESOURCE_IRQ,
289 },
290};
291
292static struct platform_device tmu0_device = {
293 .name = "sh_tmu",
294 .id = 0,
295 .dev = {
296 .platform_data = &tmu0_platform_data,
297 },
298 .resource = tmu0_resources,
299 .num_resources = ARRAY_SIZE(tmu0_resources),
300};
301
302static struct sh_timer_config tmu1_platform_data = {
303 .name = "TMU1",
304 .channel_offset = 0x10,
305 .timer_bit = 1,
306 .clk = "tmu0",
307 .clocksource_rating = 200,
308};
309
310static struct resource tmu1_resources[] = {
311 [0] = {
312 .name = "TMU1",
313 .start = 0xffd80014,
314 .end = 0xffd8001f,
315 .flags = IORESOURCE_MEM,
316 },
317 [1] = {
318 .start = 17,
319 .flags = IORESOURCE_IRQ,
320 },
321};
322
323static struct platform_device tmu1_device = {
324 .name = "sh_tmu",
325 .id = 1,
326 .dev = {
327 .platform_data = &tmu1_platform_data,
328 },
329 .resource = tmu1_resources,
330 .num_resources = ARRAY_SIZE(tmu1_resources),
331};
332
333static struct sh_timer_config tmu2_platform_data = {
334 .name = "TMU2",
335 .channel_offset = 0x1c,
336 .timer_bit = 2,
337 .clk = "tmu0",
338};
339
340static struct resource tmu2_resources[] = {
341 [0] = {
342 .name = "TMU2",
343 .start = 0xffd80020,
344 .end = 0xffd8002b,
345 .flags = IORESOURCE_MEM,
346 },
347 [1] = {
348 .start = 18,
349 .flags = IORESOURCE_IRQ,
350 },
351};
352
353static struct platform_device tmu2_device = {
354 .name = "sh_tmu",
355 .id = 2,
356 .dev = {
357 .platform_data = &tmu2_platform_data,
358 },
359 .resource = tmu2_resources,
360 .num_resources = ARRAY_SIZE(tmu2_resources),
361};
362
363
364static struct sh_timer_config tmu3_platform_data = {
365 .name = "TMU3",
366 .channel_offset = 0x04,
367 .timer_bit = 0,
368 .clk = "tmu1",
369};
370
371static struct resource tmu3_resources[] = {
372 [0] = {
373 .name = "TMU3",
374 .start = 0xffd90008,
375 .end = 0xffd90013,
376 .flags = IORESOURCE_MEM,
377 },
378 [1] = {
379 .start = 57,
380 .flags = IORESOURCE_IRQ,
381 },
382};
383
384static struct platform_device tmu3_device = {
385 .name = "sh_tmu",
386 .id = 3,
387 .dev = {
388 .platform_data = &tmu3_platform_data,
389 },
390 .resource = tmu3_resources,
391 .num_resources = ARRAY_SIZE(tmu3_resources),
392};
393
394static struct sh_timer_config tmu4_platform_data = {
395 .name = "TMU4",
396 .channel_offset = 0x10,
397 .timer_bit = 1,
398 .clk = "tmu1",
399};
400
401static struct resource tmu4_resources[] = {
402 [0] = {
403 .name = "TMU4",
404 .start = 0xffd90014,
405 .end = 0xffd9001f,
406 .flags = IORESOURCE_MEM,
407 },
408 [1] = {
409 .start = 58,
410 .flags = IORESOURCE_IRQ,
411 },
412};
413
414static struct platform_device tmu4_device = {
415 .name = "sh_tmu",
416 .id = 4,
417 .dev = {
418 .platform_data = &tmu4_platform_data,
419 },
420 .resource = tmu4_resources,
421 .num_resources = ARRAY_SIZE(tmu4_resources),
422};
423
424static struct sh_timer_config tmu5_platform_data = {
425 .name = "TMU5",
426 .channel_offset = 0x1c,
427 .timer_bit = 2,
428 .clk = "tmu1",
429};
430
431static struct resource tmu5_resources[] = {
432 [0] = {
433 .name = "TMU5",
434 .start = 0xffd90020,
435 .end = 0xffd9002b,
436 .flags = IORESOURCE_MEM,
437 },
438 [1] = {
439 .start = 57,
440 .flags = IORESOURCE_IRQ,
441 },
442};
443
444static struct platform_device tmu5_device = {
445 .name = "sh_tmu",
446 .id = 5,
447 .dev = {
448 .platform_data = &tmu5_platform_data,
449 },
450 .resource = tmu5_resources,
451 .num_resources = ARRAY_SIZE(tmu5_resources),
452};
453
271static struct platform_device *sh7724_devices[] __initdata = { 454static struct platform_device *sh7724_devices[] __initdata = {
272 &cmt_device, 455 &cmt_device,
456 &tmu0_device,
457 &tmu1_device,
458 &tmu2_device,
459 &tmu3_device,
460 &tmu4_device,
461 &tmu5_device,
273 &sci_device, 462 &sci_device,
274 &rtc_device, 463 &rtc_device,
275 &iic0_device, 464 &iic0_device,
@@ -292,6 +481,12 @@ device_initcall(sh7724_devices_setup);
292 481
293static struct platform_device *sh7724_early_devices[] __initdata = { 482static struct platform_device *sh7724_early_devices[] __initdata = {
294 &cmt_device, 483 &cmt_device,
484 &tmu0_device,
485 &tmu1_device,
486 &tmu2_device,
487 &tmu3_device,
488 &tmu4_device,
489 &tmu5_device,
295}; 490};
296 491
297void __init plat_early_device_setup(void) 492void __init plat_early_device_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index bdf0f61ae1ed..c91f34c9aa83 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -12,6 +12,7 @@
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/serial.h> 14#include <linux/serial.h>
15#include <linux/sh_timer.h>
15#include <linux/io.h> 16#include <linux/io.h>
16#include <linux/serial_sci.h> 17#include <linux/serial_sci.h>
17 18
@@ -113,7 +114,195 @@ static struct platform_device usbf_device = {
113 .resource = usbf_resources, 114 .resource = usbf_resources,
114}; 115};
115 116
117static struct sh_timer_config tmu0_platform_data = {
118 .name = "TMU0",
119 .channel_offset = 0x04,
120 .timer_bit = 0,
121 .clk = "module_clk",
122 .clockevent_rating = 200,
123};
124
125static struct resource tmu0_resources[] = {
126 [0] = {
127 .name = "TMU0",
128 .start = 0xffd80008,
129 .end = 0xffd80013,
130 .flags = IORESOURCE_MEM,
131 },
132 [1] = {
133 .start = 28,
134 .flags = IORESOURCE_IRQ,
135 },
136};
137
138static struct platform_device tmu0_device = {
139 .name = "sh_tmu",
140 .id = 0,
141 .dev = {
142 .platform_data = &tmu0_platform_data,
143 },
144 .resource = tmu0_resources,
145 .num_resources = ARRAY_SIZE(tmu0_resources),
146};
147
148static struct sh_timer_config tmu1_platform_data = {
149 .name = "TMU1",
150 .channel_offset = 0x10,
151 .timer_bit = 1,
152 .clk = "module_clk",
153 .clocksource_rating = 200,
154};
155
156static struct resource tmu1_resources[] = {
157 [0] = {
158 .name = "TMU1",
159 .start = 0xffd80014,
160 .end = 0xffd8001f,
161 .flags = IORESOURCE_MEM,
162 },
163 [1] = {
164 .start = 29,
165 .flags = IORESOURCE_IRQ,
166 },
167};
168
169static struct platform_device tmu1_device = {
170 .name = "sh_tmu",
171 .id = 1,
172 .dev = {
173 .platform_data = &tmu1_platform_data,
174 },
175 .resource = tmu1_resources,
176 .num_resources = ARRAY_SIZE(tmu1_resources),
177};
178
179static struct sh_timer_config tmu2_platform_data = {
180 .name = "TMU2",
181 .channel_offset = 0x1c,
182 .timer_bit = 2,
183 .clk = "module_clk",
184};
185
186static struct resource tmu2_resources[] = {
187 [0] = {
188 .name = "TMU2",
189 .start = 0xffd80020,
190 .end = 0xffd8002f,
191 .flags = IORESOURCE_MEM,
192 },
193 [1] = {
194 .start = 30,
195 .flags = IORESOURCE_IRQ,
196 },
197};
198
199static struct platform_device tmu2_device = {
200 .name = "sh_tmu",
201 .id = 2,
202 .dev = {
203 .platform_data = &tmu2_platform_data,
204 },
205 .resource = tmu2_resources,
206 .num_resources = ARRAY_SIZE(tmu2_resources),
207};
208
209static struct sh_timer_config tmu3_platform_data = {
210 .name = "TMU3",
211 .channel_offset = 0x04,
212 .timer_bit = 0,
213 .clk = "module_clk",
214};
215
216static struct resource tmu3_resources[] = {
217 [0] = {
218 .name = "TMU3",
219 .start = 0xffd88008,
220 .end = 0xffd88013,
221 .flags = IORESOURCE_MEM,
222 },
223 [1] = {
224 .start = 96,
225 .flags = IORESOURCE_IRQ,
226 },
227};
228
229static struct platform_device tmu3_device = {
230 .name = "sh_tmu",
231 .id = 3,
232 .dev = {
233 .platform_data = &tmu3_platform_data,
234 },
235 .resource = tmu3_resources,
236 .num_resources = ARRAY_SIZE(tmu3_resources),
237};
238
239static struct sh_timer_config tmu4_platform_data = {
240 .name = "TMU4",
241 .channel_offset = 0x10,
242 .timer_bit = 1,
243 .clk = "module_clk",
244};
245
246static struct resource tmu4_resources[] = {
247 [0] = {
248 .name = "TMU4",
249 .start = 0xffd88014,
250 .end = 0xffd8801f,
251 .flags = IORESOURCE_MEM,
252 },
253 [1] = {
254 .start = 97,
255 .flags = IORESOURCE_IRQ,
256 },
257};
258
259static struct platform_device tmu4_device = {
260 .name = "sh_tmu",
261 .id = 4,
262 .dev = {
263 .platform_data = &tmu4_platform_data,
264 },
265 .resource = tmu4_resources,
266 .num_resources = ARRAY_SIZE(tmu4_resources),
267};
268
269static struct sh_timer_config tmu5_platform_data = {
270 .name = "TMU5",
271 .channel_offset = 0x1c,
272 .timer_bit = 2,
273 .clk = "module_clk",
274};
275
276static struct resource tmu5_resources[] = {
277 [0] = {
278 .name = "TMU5",
279 .start = 0xffd88020,
280 .end = 0xffd8802b,
281 .flags = IORESOURCE_MEM,
282 },
283 [1] = {
284 .start = 98,
285 .flags = IORESOURCE_IRQ,
286 },
287};
288
289static struct platform_device tmu5_device = {
290 .name = "sh_tmu",
291 .id = 5,
292 .dev = {
293 .platform_data = &tmu5_platform_data,
294 },
295 .resource = tmu5_resources,
296 .num_resources = ARRAY_SIZE(tmu5_resources),
297};
298
116static struct platform_device *sh7763_devices[] __initdata = { 299static struct platform_device *sh7763_devices[] __initdata = {
300 &tmu0_device,
301 &tmu1_device,
302 &tmu2_device,
303 &tmu3_device,
304 &tmu4_device,
305 &tmu5_device,
117 &rtc_device, 306 &rtc_device,
118 &sci_device, 307 &sci_device,
119 &usb_ohci_device, 308 &usb_ohci_device,
@@ -127,6 +316,21 @@ static int __init sh7763_devices_setup(void)
127} 316}
128__initcall(sh7763_devices_setup); 317__initcall(sh7763_devices_setup);
129 318
319static struct platform_device *sh7763_early_devices[] __initdata = {
320 &tmu0_device,
321 &tmu1_device,
322 &tmu2_device,
323 &tmu3_device,
324 &tmu4_device,
325 &tmu5_device,
326};
327
328void __init plat_early_device_setup(void)
329{
330 early_platform_add_devices(sh7763_early_devices,
331 ARRAY_SIZE(sh7763_early_devices));
332}
333
130enum { 334enum {
131 UNUSED = 0, 335 UNUSED = 0,
132 336
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index b73578ee295d..b61d6143aaaa 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -11,6 +11,7 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/serial.h> 12#include <linux/serial.h>
13#include <linux/serial_sci.h> 13#include <linux/serial_sci.h>
14#include <linux/sh_timer.h>
14 15
15static struct plat_sci_port sci_platform_data[] = { 16static struct plat_sci_port sci_platform_data[] = {
16 { 17 {
@@ -76,7 +77,288 @@ static struct platform_device sci_device = {
76 }, 77 },
77}; 78};
78 79
80static struct sh_timer_config tmu0_platform_data = {
81 .name = "TMU0",
82 .channel_offset = 0x04,
83 .timer_bit = 0,
84 .clk = "module_clk",
85 .clockevent_rating = 200,
86};
87
88static struct resource tmu0_resources[] = {
89 [0] = {
90 .name = "TMU0",
91 .start = 0xffd80008,
92 .end = 0xffd80013,
93 .flags = IORESOURCE_MEM,
94 },
95 [1] = {
96 .start = 16,
97 .flags = IORESOURCE_IRQ,
98 },
99};
100
101static struct platform_device tmu0_device = {
102 .name = "sh_tmu",
103 .id = 0,
104 .dev = {
105 .platform_data = &tmu0_platform_data,
106 },
107 .resource = tmu0_resources,
108 .num_resources = ARRAY_SIZE(tmu0_resources),
109};
110
111static struct sh_timer_config tmu1_platform_data = {
112 .name = "TMU1",
113 .channel_offset = 0x10,
114 .timer_bit = 1,
115 .clk = "module_clk",
116 .clocksource_rating = 200,
117};
118
119static struct resource tmu1_resources[] = {
120 [0] = {
121 .name = "TMU1",
122 .start = 0xffd80014,
123 .end = 0xffd8001f,
124 .flags = IORESOURCE_MEM,
125 },
126 [1] = {
127 .start = 17,
128 .flags = IORESOURCE_IRQ,
129 },
130};
131
132static struct platform_device tmu1_device = {
133 .name = "sh_tmu",
134 .id = 1,
135 .dev = {
136 .platform_data = &tmu1_platform_data,
137 },
138 .resource = tmu1_resources,
139 .num_resources = ARRAY_SIZE(tmu1_resources),
140};
141
142static struct sh_timer_config tmu2_platform_data = {
143 .name = "TMU2",
144 .channel_offset = 0x1c,
145 .timer_bit = 2,
146 .clk = "module_clk",
147};
148
149static struct resource tmu2_resources[] = {
150 [0] = {
151 .name = "TMU2",
152 .start = 0xffd80020,
153 .end = 0xffd8002f,
154 .flags = IORESOURCE_MEM,
155 },
156 [1] = {
157 .start = 18,
158 .flags = IORESOURCE_IRQ,
159 },
160};
161
162static struct platform_device tmu2_device = {
163 .name = "sh_tmu",
164 .id = 2,
165 .dev = {
166 .platform_data = &tmu2_platform_data,
167 },
168 .resource = tmu2_resources,
169 .num_resources = ARRAY_SIZE(tmu2_resources),
170};
171
172static struct sh_timer_config tmu3_platform_data = {
173 .name = "TMU3",
174 .channel_offset = 0x04,
175 .timer_bit = 0,
176 .clk = "module_clk",
177};
178
179static struct resource tmu3_resources[] = {
180 [0] = {
181 .name = "TMU3",
182 .start = 0xffd81008,
183 .end = 0xffd81013,
184 .flags = IORESOURCE_MEM,
185 },
186 [1] = {
187 .start = 19,
188 .flags = IORESOURCE_IRQ,
189 },
190};
191
192static struct platform_device tmu3_device = {
193 .name = "sh_tmu",
194 .id = 3,
195 .dev = {
196 .platform_data = &tmu3_platform_data,
197 },
198 .resource = tmu3_resources,
199 .num_resources = ARRAY_SIZE(tmu3_resources),
200};
201
202static struct sh_timer_config tmu4_platform_data = {
203 .name = "TMU4",
204 .channel_offset = 0x10,
205 .timer_bit = 1,
206 .clk = "module_clk",
207};
208
209static struct resource tmu4_resources[] = {
210 [0] = {
211 .name = "TMU4",
212 .start = 0xffd81014,
213 .end = 0xffd8101f,
214 .flags = IORESOURCE_MEM,
215 },
216 [1] = {
217 .start = 20,
218 .flags = IORESOURCE_IRQ,
219 },
220};
221
222static struct platform_device tmu4_device = {
223 .name = "sh_tmu",
224 .id = 4,
225 .dev = {
226 .platform_data = &tmu4_platform_data,
227 },
228 .resource = tmu4_resources,
229 .num_resources = ARRAY_SIZE(tmu4_resources),
230};
231
232static struct sh_timer_config tmu5_platform_data = {
233 .name = "TMU5",
234 .channel_offset = 0x1c,
235 .timer_bit = 2,
236 .clk = "module_clk",
237};
238
239static struct resource tmu5_resources[] = {
240 [0] = {
241 .name = "TMU5",
242 .start = 0xffd81020,
243 .end = 0xffd8102f,
244 .flags = IORESOURCE_MEM,
245 },
246 [1] = {
247 .start = 21,
248 .flags = IORESOURCE_IRQ,
249 },
250};
251
252static struct platform_device tmu5_device = {
253 .name = "sh_tmu",
254 .id = 5,
255 .dev = {
256 .platform_data = &tmu5_platform_data,
257 },
258 .resource = tmu5_resources,
259 .num_resources = ARRAY_SIZE(tmu5_resources),
260};
261
262static struct sh_timer_config tmu6_platform_data = {
263 .name = "TMU6",
264 .channel_offset = 0x04,
265 .timer_bit = 0,
266 .clk = "module_clk",
267};
268
269static struct resource tmu6_resources[] = {
270 [0] = {
271 .name = "TMU6",
272 .start = 0xffd82008,
273 .end = 0xffd82013,
274 .flags = IORESOURCE_MEM,
275 },
276 [1] = {
277 .start = 22,
278 .flags = IORESOURCE_IRQ,
279 },
280};
281
282static struct platform_device tmu6_device = {
283 .name = "sh_tmu",
284 .id = 6,
285 .dev = {
286 .platform_data = &tmu6_platform_data,
287 },
288 .resource = tmu6_resources,
289 .num_resources = ARRAY_SIZE(tmu6_resources),
290};
291
292static struct sh_timer_config tmu7_platform_data = {
293 .name = "TMU7",
294 .channel_offset = 0x10,
295 .timer_bit = 1,
296 .clk = "module_clk",
297};
298
299static struct resource tmu7_resources[] = {
300 [0] = {
301 .name = "TMU7",
302 .start = 0xffd82014,
303 .end = 0xffd8201f,
304 .flags = IORESOURCE_MEM,
305 },
306 [1] = {
307 .start = 23,
308 .flags = IORESOURCE_IRQ,
309 },
310};
311
312static struct platform_device tmu7_device = {
313 .name = "sh_tmu",
314 .id = 7,
315 .dev = {
316 .platform_data = &tmu7_platform_data,
317 },
318 .resource = tmu7_resources,
319 .num_resources = ARRAY_SIZE(tmu7_resources),
320};
321
322static struct sh_timer_config tmu8_platform_data = {
323 .name = "TMU8",
324 .channel_offset = 0x1c,
325 .timer_bit = 2,
326 .clk = "module_clk",
327};
328
329static struct resource tmu8_resources[] = {
330 [0] = {
331 .name = "TMU8",
332 .start = 0xffd82020,
333 .end = 0xffd8202b,
334 .flags = IORESOURCE_MEM,
335 },
336 [1] = {
337 .start = 24,
338 .flags = IORESOURCE_IRQ,
339 },
340};
341
342static struct platform_device tmu8_device = {
343 .name = "sh_tmu",
344 .id = 8,
345 .dev = {
346 .platform_data = &tmu8_platform_data,
347 },
348 .resource = tmu8_resources,
349 .num_resources = ARRAY_SIZE(tmu8_resources),
350};
351
79static struct platform_device *sh7770_devices[] __initdata = { 352static struct platform_device *sh7770_devices[] __initdata = {
353 &tmu0_device,
354 &tmu1_device,
355 &tmu2_device,
356 &tmu3_device,
357 &tmu4_device,
358 &tmu5_device,
359 &tmu6_device,
360 &tmu7_device,
361 &tmu8_device,
80 &sci_device, 362 &sci_device,
81}; 363};
82 364
@@ -87,6 +369,24 @@ static int __init sh7770_devices_setup(void)
87} 369}
88__initcall(sh7770_devices_setup); 370__initcall(sh7770_devices_setup);
89 371
372static struct platform_device *sh7770_early_devices[] __initdata = {
373 &tmu0_device,
374 &tmu1_device,
375 &tmu2_device,
376 &tmu3_device,
377 &tmu4_device,
378 &tmu5_device,
379 &tmu6_device,
380 &tmu7_device,
381 &tmu8_device,
382};
383
384void __init plat_early_device_setup(void)
385{
386 early_platform_add_devices(sh7770_early_devices,
387 ARRAY_SIZE(sh7770_early_devices));
388}
389
90void __init plat_irq_setup(void) 390void __init plat_irq_setup(void)
91{ 391{
92} 392}
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index a77838f539f8..2edde32c764b 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -22,9 +22,6 @@
22#include <linux/rtc.h> 22#include <linux/rtc.h>
23#include <asm/clock.h> 23#include <asm/clock.h>
24#include <asm/rtc.h> 24#include <asm/rtc.h>
25#include <asm/timer.h>
26
27struct sys_timer *sys_timer;
28 25
29/* Dummy RTC ops */ 26/* Dummy RTC ops */
30static void null_rtc_get_time(struct timespec *tv) 27static void null_rtc_get_time(struct timespec *tv)
@@ -94,20 +91,9 @@ module_init(rtc_generic_init);
94 91
95void (*board_time_init)(void); 92void (*board_time_init)(void);
96 93
97struct clocksource clocksource_sh = {
98 .name = "SuperH",
99};
100
101unsigned long long sched_clock(void) 94unsigned long long sched_clock(void)
102{ 95{
103 unsigned long long cycles; 96 return (jiffies_64 - INITIAL_JIFFIES) * (NSEC_PER_SEC / HZ);
104
105 /* jiffies based sched_clock if no clocksource is installed */
106 if (!clocksource_sh.rating)
107 return (jiffies_64 - INITIAL_JIFFIES) * (NSEC_PER_SEC / HZ);
108
109 cycles = clocksource_sh.read(&clocksource_sh);
110 return cyc2ns(&clocksource_sh, cycles);
111} 97}
112 98
113static void __init sh_late_time_init(void) 99static void __init sh_late_time_init(void)
@@ -117,18 +103,7 @@ static void __init sh_late_time_init(void)
117 * Run probe() for one "earlytimer" device. 103 * Run probe() for one "earlytimer" device.
118 */ 104 */
119 early_platform_driver_register_all("earlytimer"); 105 early_platform_driver_register_all("earlytimer");
120 if (early_platform_driver_probe("earlytimer", 1, 0)) 106 early_platform_driver_probe("earlytimer", 1, 0);
121 return;
122
123 /*
124 * Find the timer to use as the system timer, it will be
125 * initialized for us.
126 */
127 sys_timer = get_sys_timer();
128 if (unlikely(!sys_timer))
129 panic("System timer missing.\n");
130
131 printk(KERN_INFO "Using %s for system timer\n", sys_timer->name);
132} 107}
133 108
134void __init time_init(void) 109void __init time_init(void)
diff --git a/arch/sh/kernel/timers/Makefile b/arch/sh/kernel/timers/Makefile
deleted file mode 100644
index 8bceba59e76f..000000000000
--- a/arch/sh/kernel/timers/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for the various Linux/SuperH timers
3#
4
5obj-y := timer.o
6
7obj-$(CONFIG_SH_TMU) += timer-tmu.o
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
deleted file mode 100644
index a693dcdbe13e..000000000000
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ /dev/null
@@ -1,295 +0,0 @@
1/*
2 * arch/sh/kernel/timers/timer-tmu.c - TMU Timer Support
3 *
4 * Copyright (C) 2005 - 2007 Paul Mundt
5 *
6 * TMU handling code hacked out of arch/sh/kernel/time.c
7 *
8 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
9 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
10 * Copyright (C) 2002, 2003, 2004 Paul Mundt
11 * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
16 */
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/interrupt.h>
20#include <linux/seqlock.h>
21#include <linux/clockchips.h>
22#include <asm/timer.h>
23#include <asm/rtc.h>
24#include <asm/io.h>
25#include <asm/irq.h>
26#include <asm/clock.h>
27
28#define TMU_TOCR_INIT 0x00
29#define TMU_TCR_INIT 0x0020
30
31#define TMU0 (0)
32#define TMU1 (1)
33
34static inline void _tmu_start(int tmu_num)
35{
36 ctrl_outb(ctrl_inb(TMU_012_TSTR) | (0x1<<tmu_num), TMU_012_TSTR);
37}
38
39static inline void _tmu_set_irq(int tmu_num, int enabled)
40{
41 register unsigned long tmu_tcr = TMU0_TCR + (0xc*tmu_num);
42 ctrl_outw( (enabled ? ctrl_inw(tmu_tcr) | (1<<5) : ctrl_inw(tmu_tcr) & ~(1<<5)), tmu_tcr);
43}
44
45static inline void _tmu_stop(int tmu_num)
46{
47 ctrl_outb(ctrl_inb(TMU_012_TSTR) & ~(0x1<<tmu_num), TMU_012_TSTR);
48}
49
50static inline void _tmu_clear_status(int tmu_num)
51{
52 register unsigned long tmu_tcr = TMU0_TCR + (0xc*tmu_num);
53 /* Clear UNF bit */
54 ctrl_outw(ctrl_inw(tmu_tcr) & ~0x100, tmu_tcr);
55}
56
57static inline unsigned long _tmu_read(int tmu_num)
58{
59 return ctrl_inl(TMU0_TCNT+0xC*tmu_num);
60}
61
62static int tmu_timer_start(void)
63{
64 _tmu_start(TMU0);
65 _tmu_start(TMU1);
66 _tmu_set_irq(TMU0,1);
67 return 0;
68}
69
70static int tmu_timer_stop(void)
71{
72 _tmu_stop(TMU0);
73 _tmu_stop(TMU1);
74 _tmu_clear_status(TMU0);
75 return 0;
76}
77
78/*
79 * also when the module_clk is scaled the TMU1
80 * will show the same frequency
81 */
82static int tmus_are_scaled;
83
84static cycle_t tmu_timer_read(struct clocksource *cs)
85{
86 return ((cycle_t)(~_tmu_read(TMU1)))<<tmus_are_scaled;
87}
88
89
90static unsigned long tmu_latest_interval[3];
91static void tmu_timer_set_interval(int tmu_num, unsigned long interval, unsigned int reload)
92{
93 unsigned long tmu_tcnt = TMU0_TCNT + tmu_num*0xC;
94 unsigned long tmu_tcor = TMU0_TCOR + tmu_num*0xC;
95
96 _tmu_stop(tmu_num);
97
98 ctrl_outl(interval, tmu_tcnt);
99 tmu_latest_interval[tmu_num] = interval;
100
101 /*
102 * TCNT reloads from TCOR on underflow, clear it if we don't
103 * intend to auto-reload
104 */
105 ctrl_outl( reload ? interval : 0 , tmu_tcor);
106
107 _tmu_start(tmu_num);
108}
109
110static int tmu_set_next_event(unsigned long cycles,
111 struct clock_event_device *evt)
112{
113 tmu_timer_set_interval(TMU0,cycles, evt->mode == CLOCK_EVT_MODE_PERIODIC);
114 _tmu_set_irq(TMU0,1);
115 return 0;
116}
117
118static void tmu_set_mode(enum clock_event_mode mode,
119 struct clock_event_device *evt)
120{
121 switch (mode) {
122 case CLOCK_EVT_MODE_PERIODIC:
123 ctrl_outl(tmu_latest_interval[TMU0], TMU0_TCOR);
124 break;
125 case CLOCK_EVT_MODE_ONESHOT:
126 ctrl_outl(0, TMU0_TCOR);
127 break;
128 case CLOCK_EVT_MODE_UNUSED:
129 case CLOCK_EVT_MODE_SHUTDOWN:
130 case CLOCK_EVT_MODE_RESUME:
131 break;
132 }
133}
134
135static struct clock_event_device tmu0_clockevent = {
136 .name = "tmu0",
137 .shift = 32,
138 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
139 .set_mode = tmu_set_mode,
140 .set_next_event = tmu_set_next_event,
141};
142
143static irqreturn_t tmu_timer_interrupt(int irq, void *dummy)
144{
145 struct clock_event_device *evt = &tmu0_clockevent;
146 _tmu_clear_status(TMU0);
147 _tmu_set_irq(TMU0,tmu0_clockevent.mode != CLOCK_EVT_MODE_ONESHOT);
148
149 switch (tmu0_clockevent.mode) {
150 case CLOCK_EVT_MODE_ONESHOT:
151 case CLOCK_EVT_MODE_PERIODIC:
152 evt->event_handler(evt);
153 break;
154 default:
155 break;
156 }
157
158 return IRQ_HANDLED;
159}
160
161static struct irqaction tmu0_irq = {
162 .name = "periodic/oneshot timer",
163 .handler = tmu_timer_interrupt,
164 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
165};
166
167static void __init tmu_clk_init(struct clk *clk)
168{
169 u8 divisor = TMU_TCR_INIT & 0x7;
170 int tmu_num = clk->name[3]-'0';
171 ctrl_outw(TMU_TCR_INIT, TMU0_TCR+(tmu_num*0xC));
172 clk->rate = clk_get_rate(clk->parent) / (4 << (divisor << 1));
173}
174
175static unsigned long tmu_clk_recalc(struct clk *clk)
176{
177 int tmu_num = clk->name[3]-'0';
178 unsigned long new_rate;
179 unsigned long flags;
180 u8 divisor = ctrl_inw(TMU0_TCR+tmu_num*0xC) & 0x7;
181
182 new_rate = clk_get_rate(clk->parent) / (4 << (divisor << 1));
183 if (clk->rate == new_rate || tmu_num)
184 return clk->rate; /* No more work on TMU1 */
185
186 local_irq_save(flags);
187 tmus_are_scaled = (clk->rate > new_rate);
188
189 _tmu_stop(TMU0);
190
191 tmu0_clockevent.mult = div_sc(clk->rate, NSEC_PER_SEC,
192 tmu0_clockevent.shift);
193 tmu0_clockevent.max_delta_ns =
194 clockevent_delta2ns(-1, &tmu0_clockevent);
195 tmu0_clockevent.min_delta_ns =
196 clockevent_delta2ns(1, &tmu0_clockevent);
197
198 if (tmus_are_scaled)
199 tmu_latest_interval[TMU0] >>= 1;
200 else
201 tmu_latest_interval[TMU0] <<= 1;
202
203 tmu_timer_set_interval(TMU0,
204 tmu_latest_interval[TMU0],
205 tmu0_clockevent.mode == CLOCK_EVT_MODE_PERIODIC);
206
207 _tmu_start(TMU0);
208
209 local_irq_restore(flags);
210 return new_rate;
211}
212
213static struct clk_ops tmu_clk_ops = {
214 .init = tmu_clk_init,
215 .recalc = tmu_clk_recalc,
216};
217
218static struct clk tmu0_clk = {
219 .name = "tmu0_clk",
220 .ops = &tmu_clk_ops,
221};
222
223static struct clk tmu1_clk = {
224 .name = "tmu1_clk",
225 .ops = &tmu_clk_ops,
226};
227
228static int tmu_timer_init(void)
229{
230 unsigned long interval;
231 unsigned long frequency;
232
233 setup_irq(CONFIG_SH_TIMER_IRQ, &tmu0_irq);
234
235 tmu0_clk.parent = clk_get(NULL, "module_clk");
236 tmu1_clk.parent = clk_get(NULL, "module_clk");
237
238 tmu_timer_stop();
239
240#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && \
241 !defined(CONFIG_CPU_SUBTYPE_SH7721) && \
242 !defined(CONFIG_CPU_SUBTYPE_SH7760) && \
243 !defined(CONFIG_CPU_SUBTYPE_SH7785) && \
244 !defined(CONFIG_CPU_SUBTYPE_SH7786) && \
245 !defined(CONFIG_CPU_SUBTYPE_SHX3)
246 ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
247#endif
248
249 clk_register(&tmu0_clk);
250 clk_register(&tmu1_clk);
251 clk_enable(&tmu0_clk);
252 clk_enable(&tmu1_clk);
253
254 frequency = clk_get_rate(&tmu0_clk);
255 interval = (frequency + HZ / 2) / HZ;
256
257 tmu_timer_set_interval(TMU0,interval, 1);
258 tmu_timer_set_interval(TMU1,~0,1);
259
260 _tmu_start(TMU1);
261
262 clocksource_sh.rating = 200;
263 clocksource_sh.mask = CLOCKSOURCE_MASK(32);
264 clocksource_sh.read = tmu_timer_read;
265 clocksource_sh.shift = 10;
266 clocksource_sh.mult = clocksource_hz2mult(clk_get_rate(&tmu1_clk),
267 clocksource_sh.shift);
268 clocksource_sh.flags = CLOCK_SOURCE_IS_CONTINUOUS;
269 clocksource_register(&clocksource_sh);
270
271 tmu0_clockevent.mult = div_sc(frequency, NSEC_PER_SEC,
272 tmu0_clockevent.shift);
273 tmu0_clockevent.max_delta_ns =
274 clockevent_delta2ns(-1, &tmu0_clockevent);
275 tmu0_clockevent.min_delta_ns =
276 clockevent_delta2ns(1, &tmu0_clockevent);
277
278 tmu0_clockevent.cpumask = cpumask_of(0);
279 tmu0_clockevent.rating = 100;
280
281 clockevents_register_device(&tmu0_clockevent);
282
283 return 0;
284}
285
286static struct sys_timer_ops tmu_timer_ops = {
287 .init = tmu_timer_init,
288 .start = tmu_timer_start,
289 .stop = tmu_timer_stop,
290};
291
292struct sys_timer tmu_timer = {
293 .name = "tmu",
294 .ops = &tmu_timer_ops,
295};
diff --git a/arch/sh/kernel/timers/timer.c b/arch/sh/kernel/timers/timer.c
deleted file mode 100644
index 920891acb779..000000000000
--- a/arch/sh/kernel/timers/timer.c
+++ /dev/null
@@ -1,49 +0,0 @@
1/*
2 * arch/sh/kernel/timers/timer.c - Common timer code
3 *
4 * Copyright (C) 2005 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/timer.h>
13#include <linux/string.h>
14#include <asm/timer.h>
15
16static struct sys_timer *sys_timers[] = {
17#ifdef CONFIG_SH_TMU
18 &tmu_timer,
19#endif
20 NULL,
21};
22
23static char timer_override[10];
24static int __init timer_setup(char *str)
25{
26 if (str)
27 strlcpy(timer_override, str, sizeof(timer_override));
28 return 1;
29}
30__setup("timer=", timer_setup);
31
32struct sys_timer *get_sys_timer(void)
33{
34 int i;
35
36 for (i = 0; i < ARRAY_SIZE(sys_timers); i++) {
37 struct sys_timer *t = sys_timers[i];
38
39 if (unlikely(!t))
40 break;
41 if (unlikely(timer_override[0]))
42 if ((strcmp(timer_override, t->name) != 0))
43 continue;
44 if (likely(t->ops->init() == 0))
45 return t;
46 }
47
48 return NULL;
49}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 01:38:17 -0500