diff options
author | Paul Mundt <lethal@linux-sh.org> | 2011-01-06 04:27:34 -0500 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2011-01-06 04:27:34 -0500 |
commit | 1928e87bcf185f56008d0746f887b691c1cb8c4a (patch) | |
tree | bc8db9e9cb40b73742d05e2e68189bd647687249 /arch/sh/kernel | |
parent | ca9c20ce2b383032b71bdae9ec0b468d428ca8d4 (diff) | |
parent | 3c0eee3fe6a3a1c745379547c7e7c904aa64f6d5 (diff) |
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
drivers/video/sh_mobile_lcdcfb.c
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel')
-rw-r--r-- | arch/sh/kernel/cpu/sh2a/clock-sh7201.c | 2 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4/clock-sh4-202.c | 3 |
2 files changed, 2 insertions, 3 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c index b26264dc2aef..c509c40cba4b 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c | |||
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12}; | |||
34 | 34 | ||
35 | static void master_clk_init(struct clk *clk) | 35 | static void master_clk_init(struct clk *clk) |
36 | { | 36 | { |
37 | return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; | 37 | clk->rate = 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; |
38 | } | 38 | } |
39 | 39 | ||
40 | static struct clk_ops sh7201_master_clk_ops = { | 40 | static struct clk_ops sh7201_master_clk_ops = { |
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c index b601fa3978d1..6282a839e08e 100644 --- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c +++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c | |||
@@ -81,8 +81,7 @@ static void shoc_clk_init(struct clk *clk) | |||
81 | for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) { | 81 | for (i = 0; i < ARRAY_SIZE(frqcr3_divisors); i++) { |
82 | int divisor = frqcr3_divisors[i]; | 82 | int divisor = frqcr3_divisors[i]; |
83 | 83 | ||
84 | if (clk->ops->set_rate(clk, clk->parent->rate / | 84 | if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) |
85 | divisor, 0) == 0) | ||
86 | break; | 85 | break; |
87 | } | 86 | } |
88 | 87 | ||