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authorPaul Mundt <lethal@linux-sh.org>2008-09-04 05:53:58 -0400
committerPaul Mundt <lethal@linux-sh.org>2008-09-07 21:35:04 -0400
commitfa43972fab24a3c050e880a7831f9378c6cebc0b (patch)
tree35d51e6a0ac6556f82d843506e8317854dc3192c /arch/sh/kernel/traps_32.c
parent7d96169cb769f459dd6730b06fa3a88cb0c9297d (diff)
sh: fixup many sparse errors.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/traps_32.c')
-rw-r--r--arch/sh/kernel/traps_32.c68
1 files changed, 35 insertions, 33 deletions
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 511a9426cec5..4901f6732162 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -192,6 +192,7 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
192 int ret, index, count; 192 int ret, index, count;
193 unsigned long *rm, *rn; 193 unsigned long *rm, *rn;
194 unsigned char *src, *dst; 194 unsigned char *src, *dst;
195 unsigned char __user *srcu, *dstu;
195 196
196 index = (instruction>>8)&15; /* 0x0F00 */ 197 index = (instruction>>8)&15; /* 0x0F00 */
197 rn = &regs->regs[index]; 198 rn = &regs->regs[index];
@@ -206,28 +207,28 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
206 case 0: /* mov.[bwl] to/from memory via r0+rn */ 207 case 0: /* mov.[bwl] to/from memory via r0+rn */
207 if (instruction & 8) { 208 if (instruction & 8) {
208 /* from memory */ 209 /* from memory */
209 src = (unsigned char*) *rm; 210 srcu = (unsigned char __user *)*rm;
210 src += regs->regs[0]; 211 srcu += regs->regs[0];
211 dst = (unsigned char*) rn; 212 dst = (unsigned char *)rn;
212 *(unsigned long*)dst = 0; 213 *(unsigned long *)dst = 0;
213 214
214#if !defined(__LITTLE_ENDIAN__) 215#if !defined(__LITTLE_ENDIAN__)
215 dst += 4-count; 216 dst += 4-count;
216#endif 217#endif
217 if (ma->from(dst, src, count)) 218 if (ma->from(dst, srcu, count))
218 goto fetch_fault; 219 goto fetch_fault;
219 220
220 sign_extend(count, dst); 221 sign_extend(count, dst);
221 } else { 222 } else {
222 /* to memory */ 223 /* to memory */
223 src = (unsigned char*) rm; 224 src = (unsigned char *)rm;
224#if !defined(__LITTLE_ENDIAN__) 225#if !defined(__LITTLE_ENDIAN__)
225 src += 4-count; 226 src += 4-count;
226#endif 227#endif
227 dst = (unsigned char*) *rn; 228 dstu = (unsigned char __user *)*rn;
228 dst += regs->regs[0]; 229 dstu += regs->regs[0];
229 230
230 if (ma->to(dst, src, count)) 231 if (ma->to(dstu, src, count))
231 goto fetch_fault; 232 goto fetch_fault;
232 } 233 }
233 ret = 0; 234 ret = 0;
@@ -235,10 +236,10 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
235 236
236 case 1: /* mov.l Rm,@(disp,Rn) */ 237 case 1: /* mov.l Rm,@(disp,Rn) */
237 src = (unsigned char*) rm; 238 src = (unsigned char*) rm;
238 dst = (unsigned char*) *rn; 239 dstu = (unsigned char __user *)*rn;
239 dst += (instruction&0x000F)<<2; 240 dstu += (instruction&0x000F)<<2;
240 241
241 if (ma->to(dst, src, 4)) 242 if (ma->to(dstu, src, 4))
242 goto fetch_fault; 243 goto fetch_fault;
243 ret = 0; 244 ret = 0;
244 break; 245 break;
@@ -247,28 +248,28 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
247 if (instruction & 4) 248 if (instruction & 4)
248 *rn -= count; 249 *rn -= count;
249 src = (unsigned char*) rm; 250 src = (unsigned char*) rm;
250 dst = (unsigned char*) *rn; 251 dstu = (unsigned char __user *)*rn;
251#if !defined(__LITTLE_ENDIAN__) 252#if !defined(__LITTLE_ENDIAN__)
252 src += 4-count; 253 src += 4-count;
253#endif 254#endif
254 if (ma->to(dst, src, count)) 255 if (ma->to(dstu, src, count))
255 goto fetch_fault; 256 goto fetch_fault;
256 ret = 0; 257 ret = 0;
257 break; 258 break;
258 259
259 case 5: /* mov.l @(disp,Rm),Rn */ 260 case 5: /* mov.l @(disp,Rm),Rn */
260 src = (unsigned char*) *rm; 261 srcu = (unsigned char __user *)*rm;
261 src += (instruction&0x000F)<<2; 262 srcu += (instruction & 0x000F) << 2;
262 dst = (unsigned char*) rn; 263 dst = (unsigned char *)rn;
263 *(unsigned long*)dst = 0; 264 *(unsigned long *)dst = 0;
264 265
265 if (ma->from(dst, src, 4)) 266 if (ma->from(dst, srcu, 4))
266 goto fetch_fault; 267 goto fetch_fault;
267 ret = 0; 268 ret = 0;
268 break; 269 break;
269 270
270 case 6: /* mov.[bwl] from memory, possibly with post-increment */ 271 case 6: /* mov.[bwl] from memory, possibly with post-increment */
271 src = (unsigned char*) *rm; 272 srcu = (unsigned char __user *)*rm;
272 if (instruction & 4) 273 if (instruction & 4)
273 *rm += count; 274 *rm += count;
274 dst = (unsigned char*) rn; 275 dst = (unsigned char*) rn;
@@ -277,7 +278,7 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
277#if !defined(__LITTLE_ENDIAN__) 278#if !defined(__LITTLE_ENDIAN__)
278 dst += 4-count; 279 dst += 4-count;
279#endif 280#endif
280 if (ma->from(dst, src, count)) 281 if (ma->from(dst, srcu, count))
281 goto fetch_fault; 282 goto fetch_fault;
282 sign_extend(count, dst); 283 sign_extend(count, dst);
283 ret = 0; 284 ret = 0;
@@ -286,28 +287,28 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
286 case 8: 287 case 8:
287 switch ((instruction&0xFF00)>>8) { 288 switch ((instruction&0xFF00)>>8) {
288 case 0x81: /* mov.w R0,@(disp,Rn) */ 289 case 0x81: /* mov.w R0,@(disp,Rn) */
289 src = (unsigned char*) &regs->regs[0]; 290 src = (unsigned char *) &regs->regs[0];
290#if !defined(__LITTLE_ENDIAN__) 291#if !defined(__LITTLE_ENDIAN__)
291 src += 2; 292 src += 2;
292#endif 293#endif
293 dst = (unsigned char*) *rm; /* called Rn in the spec */ 294 dstu = (unsigned char __user *)*rm; /* called Rn in the spec */
294 dst += (instruction&0x000F)<<1; 295 dstu += (instruction & 0x000F) << 1;
295 296
296 if (ma->to(dst, src, 2)) 297 if (ma->to(dstu, src, 2))
297 goto fetch_fault; 298 goto fetch_fault;
298 ret = 0; 299 ret = 0;
299 break; 300 break;
300 301
301 case 0x85: /* mov.w @(disp,Rm),R0 */ 302 case 0x85: /* mov.w @(disp,Rm),R0 */
302 src = (unsigned char*) *rm; 303 srcu = (unsigned char __user *)*rm;
303 src += (instruction&0x000F)<<1; 304 srcu += (instruction & 0x000F) << 1;
304 dst = (unsigned char*) &regs->regs[0]; 305 dst = (unsigned char *) &regs->regs[0];
305 *(unsigned long*)dst = 0; 306 *(unsigned long *)dst = 0;
306 307
307#if !defined(__LITTLE_ENDIAN__) 308#if !defined(__LITTLE_ENDIAN__)
308 dst += 2; 309 dst += 2;
309#endif 310#endif
310 if (ma->from(dst, src, 2)) 311 if (ma->from(dst, srcu, 2))
311 goto fetch_fault; 312 goto fetch_fault;
312 sign_extend(2, dst); 313 sign_extend(2, dst);
313 ret = 0; 314 ret = 0;
@@ -333,7 +334,8 @@ static inline int handle_delayslot(struct pt_regs *regs,
333 struct mem_access *ma) 334 struct mem_access *ma)
334{ 335{
335 opcode_t instruction; 336 opcode_t instruction;
336 void *addr = (void *)(regs->pc + instruction_size(old_instruction)); 337 void __user *addr = (void __user *)(regs->pc +
338 instruction_size(old_instruction));
337 339
338 if (copy_from_user(&instruction, addr, sizeof(instruction))) { 340 if (copy_from_user(&instruction, addr, sizeof(instruction))) {
339 /* the instruction-fetch faulted */ 341 /* the instruction-fetch faulted */
@@ -559,7 +561,7 @@ asmlinkage void do_address_error(struct pt_regs *regs,
559 } 561 }
560 562
561 set_fs(USER_DS); 563 set_fs(USER_DS);
562 if (copy_from_user(&instruction, (void *)(regs->pc), 564 if (copy_from_user(&instruction, (void __user *)(regs->pc),
563 sizeof(instruction))) { 565 sizeof(instruction))) {
564 /* Argh. Fault on the instruction itself. 566 /* Argh. Fault on the instruction itself.
565 This should never happen non-SMP 567 This should never happen non-SMP
@@ -589,7 +591,7 @@ uspace_segv:
589 die("unaligned program counter", regs, error_code); 591 die("unaligned program counter", regs, error_code);
590 592
591 set_fs(KERNEL_DS); 593 set_fs(KERNEL_DS);
592 if (copy_from_user(&instruction, (void *)(regs->pc), 594 if (copy_from_user(&instruction, (void __user *)(regs->pc),
593 sizeof(instruction))) { 595 sizeof(instruction))) {
594 /* Argh. Fault on the instruction itself. 596 /* Argh. Fault on the instruction itself.
595 This should never happen non-SMP 597 This should never happen non-SMP