sh: Support for L2 cache on newer SH-4A CPUs.

This implements preliminary support for the L2 caches found
on newer SH-4A CPUs.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 5 insertions, 1 deletions

diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 6810de3f8ed2..5f587332234a 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -416,7 +416,7 @@ const char *get_cpu_subtype(void)
 /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
 static const char *cpu_flags[] = {
         "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
-        "ptea", "llsc", NULL
+        "ptea", "llsc", "l2", NULL
 };
 
 static void show_cpuflags(struct seq_file *m)
@@ -480,6 +480,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 show_cacheinfo(m, "dcache", boot_cpu_data.dcache);
         }
 
+        /* Optional secondary cache */
+        if (boot_cpu_data.flags & CPU_HAS_L2_CACHE)
+                show_cacheinfo(m, "scache", boot_cpu_data.scache);
+
         seq_printf(m, "bogomips\t: %lu.%02lu\n",
                      boot_cpu_data.loops_per_jiffy/(500000/HZ),
                      (boot_cpu_data.loops_per_jiffy/(5000/HZ)) % 100);