diff options
author | Jon Frosdick <jon.frosdick@st.com> | 2009-08-24 03:20:44 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-08-24 03:20:44 -0400 |
commit | b46373e0d4b9f714ab757aae0c19c41fbcc73ef5 (patch) | |
tree | 9c2c39193b94dc247b66832267b7e105dd1cda25 /arch/sh/kernel/process_32.c | |
parent | 27a30f53bbb77fd7e2e0459197e23b63fe3b74d4 (diff) |
sh: Use internal watchdog timer to perform reset
This patches will trigger a reboot using the watchdog
timer instead of double fault. Unlike the previous
method, this one actually works in 32 bit mode.
Reset should also be cleaner.
Signed-off-by: Jon Frosdick <jon.frosdick@st.com>
Signed-off-by: Carl Shaw <carl.shaw@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/process_32.c')
-rw-r--r-- | arch/sh/kernel/process_32.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c index 9fee977f176b..0673c4746be3 100644 --- a/arch/sh/kernel/process_32.c +++ b/arch/sh/kernel/process_32.c | |||
@@ -32,15 +32,35 @@ | |||
32 | #include <asm/ubc.h> | 32 | #include <asm/ubc.h> |
33 | #include <asm/fpu.h> | 33 | #include <asm/fpu.h> |
34 | #include <asm/syscalls.h> | 34 | #include <asm/syscalls.h> |
35 | #include <asm/watchdog.h> | ||
35 | 36 | ||
36 | int ubc_usercnt = 0; | 37 | int ubc_usercnt = 0; |
37 | 38 | ||
39 | #ifdef CONFIG_32BIT | ||
40 | static void watchdog_trigger_immediate(void) | ||
41 | { | ||
42 | sh_wdt_write_cnt(0xFF); | ||
43 | sh_wdt_write_csr(0xC2); | ||
44 | } | ||
45 | |||
46 | void machine_restart(char * __unused) | ||
47 | { | ||
48 | local_irq_disable(); | ||
49 | |||
50 | /* Use watchdog timer to trigger reset */ | ||
51 | watchdog_trigger_immediate(); | ||
52 | |||
53 | while (1) | ||
54 | cpu_sleep(); | ||
55 | } | ||
56 | #else | ||
38 | void machine_restart(char * __unused) | 57 | void machine_restart(char * __unused) |
39 | { | 58 | { |
40 | /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ | 59 | /* SR.BL=1 and invoke address error to let CPU reset (manual reset) */ |
41 | asm volatile("ldc %0, sr\n\t" | 60 | asm volatile("ldc %0, sr\n\t" |
42 | "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001)); | 61 | "mov.l @%1, %0" : : "r" (0x10000000), "r" (0x80000001)); |
43 | } | 62 | } |
63 | #endif | ||
44 | 64 | ||
45 | void machine_halt(void) | 65 | void machine_halt(void) |
46 | { | 66 | { |