diff options
author | Paul Mundt <lethal@linux-sh.org> | 2009-05-11 16:59:27 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-05-11 16:59:27 -0400 |
commit | f5c84cf50812c80133e64683d0500b2416d55cb3 (patch) | |
tree | eb116c797a5b56d96deeca62f5122d0de197f601 /arch/sh/kernel/cpu | |
parent | aa87aa343f2cd236b5eccd643abd4df918ed5c4f (diff) |
sh: clkfwk: Tidy up on-chip clock registration and rate propagation.
This tidies up the set_rate hack that the on-chip clocks were abusing to
trigger rate propagation, which is now handled generically.
Additionally, now that CLK_ENABLE_ON_INIT is wired up where it needs to
be for these clocks, the clk_enable() can go away. In some cases this was
bumping up the refcount higher than it should have been.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu')
-rw-r--r-- | arch/sh/kernel/cpu/sh4/clock-sh4-202.c | 19 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7763.c | 17 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7780.c | 17 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7785.c | 15 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7786.c | 15 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-shx3.c | 15 |
6 files changed, 19 insertions, 79 deletions
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c index 0caca9f99fe8..435f4f12ffb8 100644 --- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c +++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c | |||
@@ -127,7 +127,7 @@ static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id) | |||
127 | frqcr3 |= tmp << 6; | 127 | frqcr3 |= tmp << 6; |
128 | ctrl_outl(frqcr3, CPG2_FRQCR3); | 128 | ctrl_outl(frqcr3, CPG2_FRQCR3); |
129 | 129 | ||
130 | return clk->parent->rate / frqcr3_divisors[tmp]; | 130 | clk->rate = clk->parent->rate / frqcr3_divisors[tmp]; |
131 | 131 | ||
132 | return 0; | 132 | return 0; |
133 | } | 133 | } |
@@ -153,28 +153,17 @@ static struct clk *sh4202_onchip_clocks[] = { | |||
153 | static int __init sh4202_clk_init(void) | 153 | static int __init sh4202_clk_init(void) |
154 | { | 154 | { |
155 | struct clk *clk = clk_get(NULL, "master_clk"); | 155 | struct clk *clk = clk_get(NULL, "master_clk"); |
156 | int i; | 156 | int i, ret = 0; |
157 | 157 | ||
158 | for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) { | 158 | for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) { |
159 | struct clk *clkp = sh4202_onchip_clocks[i]; | 159 | struct clk *clkp = sh4202_onchip_clocks[i]; |
160 | 160 | ||
161 | clkp->parent = clk; | 161 | clkp->parent = clk; |
162 | clk_register(clkp); | 162 | ret |= clk_register(clkp); |
163 | clk_enable(clkp); | ||
164 | } | 163 | } |
165 | 164 | ||
166 | /* | ||
167 | * Now that we have the rest of the clocks registered, we need to | ||
168 | * force the parent clock to propagate so that these clocks will | ||
169 | * automatically figure out their rate. We cheat by handing the | ||
170 | * parent clock its current rate and forcing child propagation. | ||
171 | */ | ||
172 | clk_set_rate(clk, clk_get_rate(clk)); | ||
173 | |||
174 | clk_put(clk); | 165 | clk_put(clk); |
175 | 166 | ||
176 | return 0; | 167 | return ret; |
177 | } | 168 | } |
178 | |||
179 | arch_initcall(sh4202_clk_init); | 169 | arch_initcall(sh4202_clk_init); |
180 | |||
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c index 21bd70f9ee45..0110da64a43b 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c | |||
@@ -93,28 +93,17 @@ static struct clk *sh7763_onchip_clocks[] = { | |||
93 | static int __init sh7763_clk_init(void) | 93 | static int __init sh7763_clk_init(void) |
94 | { | 94 | { |
95 | struct clk *clk = clk_get(NULL, "master_clk"); | 95 | struct clk *clk = clk_get(NULL, "master_clk"); |
96 | int i; | 96 | int i, ret = 0; |
97 | 97 | ||
98 | for (i = 0; i < ARRAY_SIZE(sh7763_onchip_clocks); i++) { | 98 | for (i = 0; i < ARRAY_SIZE(sh7763_onchip_clocks); i++) { |
99 | struct clk *clkp = sh7763_onchip_clocks[i]; | 99 | struct clk *clkp = sh7763_onchip_clocks[i]; |
100 | 100 | ||
101 | clkp->parent = clk; | 101 | clkp->parent = clk; |
102 | clk_register(clkp); | 102 | ret |= clk_register(clkp); |
103 | clk_enable(clkp); | ||
104 | } | 103 | } |
105 | 104 | ||
106 | /* | ||
107 | * Now that we have the rest of the clocks registered, we need to | ||
108 | * force the parent clock to propagate so that these clocks will | ||
109 | * automatically figure out their rate. We cheat by handing the | ||
110 | * parent clock its current rate and forcing child propagation. | ||
111 | */ | ||
112 | clk_set_rate(clk, clk_get_rate(clk)); | ||
113 | |||
114 | clk_put(clk); | 105 | clk_put(clk); |
115 | 106 | ||
116 | return 0; | 107 | return ret; |
117 | } | 108 | } |
118 | |||
119 | arch_initcall(sh7763_clk_init); | 109 | arch_initcall(sh7763_clk_init); |
120 | |||
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c index 4c11f8917e40..0a22d50b109f 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c | |||
@@ -99,28 +99,17 @@ static struct clk *sh7780_onchip_clocks[] = { | |||
99 | static int __init sh7780_clk_init(void) | 99 | static int __init sh7780_clk_init(void) |
100 | { | 100 | { |
101 | struct clk *clk = clk_get(NULL, "master_clk"); | 101 | struct clk *clk = clk_get(NULL, "master_clk"); |
102 | int i; | 102 | int i, ret = 0; |
103 | 103 | ||
104 | for (i = 0; i < ARRAY_SIZE(sh7780_onchip_clocks); i++) { | 104 | for (i = 0; i < ARRAY_SIZE(sh7780_onchip_clocks); i++) { |
105 | struct clk *clkp = sh7780_onchip_clocks[i]; | 105 | struct clk *clkp = sh7780_onchip_clocks[i]; |
106 | 106 | ||
107 | clkp->parent = clk; | 107 | clkp->parent = clk; |
108 | clk_register(clkp); | 108 | ret |= clk_register(clkp); |
109 | clk_enable(clkp); | ||
110 | } | 109 | } |
111 | 110 | ||
112 | /* | ||
113 | * Now that we have the rest of the clocks registered, we need to | ||
114 | * force the parent clock to propagate so that these clocks will | ||
115 | * automatically figure out their rate. We cheat by handing the | ||
116 | * parent clock its current rate and forcing child propagation. | ||
117 | */ | ||
118 | clk_set_rate(clk, clk_get_rate(clk)); | ||
119 | |||
120 | clk_put(clk); | 111 | clk_put(clk); |
121 | 112 | ||
122 | return 0; | 113 | return ret; |
123 | } | 114 | } |
124 | |||
125 | arch_initcall(sh7780_clk_init); | 115 | arch_initcall(sh7780_clk_init); |
126 | |||
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c index edd432894bd9..4dcd1f6f0cbd 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c | |||
@@ -137,26 +137,17 @@ static struct clk *sh7785_onchip_clocks[] = { | |||
137 | static int __init sh7785_clk_init(void) | 137 | static int __init sh7785_clk_init(void) |
138 | { | 138 | { |
139 | struct clk *clk = clk_get(NULL, "master_clk"); | 139 | struct clk *clk = clk_get(NULL, "master_clk"); |
140 | int i; | 140 | int i, ret = 0; |
141 | 141 | ||
142 | for (i = 0; i < ARRAY_SIZE(sh7785_onchip_clocks); i++) { | 142 | for (i = 0; i < ARRAY_SIZE(sh7785_onchip_clocks); i++) { |
143 | struct clk *clkp = sh7785_onchip_clocks[i]; | 143 | struct clk *clkp = sh7785_onchip_clocks[i]; |
144 | 144 | ||
145 | clkp->parent = clk; | 145 | clkp->parent = clk; |
146 | clk_register(clkp); | 146 | ret |= clk_register(clkp); |
147 | clk_enable(clkp); | ||
148 | } | 147 | } |
149 | 148 | ||
150 | /* | ||
151 | * Now that we have the rest of the clocks registered, we need to | ||
152 | * force the parent clock to propagate so that these clocks will | ||
153 | * automatically figure out their rate. We cheat by handing the | ||
154 | * parent clock its current rate and forcing child propagation. | ||
155 | */ | ||
156 | clk_set_rate(clk, clk_get_rate(clk)); | ||
157 | |||
158 | clk_put(clk); | 149 | clk_put(clk); |
159 | 150 | ||
160 | return 0; | 151 | return ret; |
161 | } | 152 | } |
162 | arch_initcall(sh7785_clk_init); | 153 | arch_initcall(sh7785_clk_init); |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c index 2825494f85dc..825556fe2306 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c | |||
@@ -123,26 +123,17 @@ static struct clk *sh7786_onchip_clocks[] = { | |||
123 | static int __init sh7786_clk_init(void) | 123 | static int __init sh7786_clk_init(void) |
124 | { | 124 | { |
125 | struct clk *clk = clk_get(NULL, "master_clk"); | 125 | struct clk *clk = clk_get(NULL, "master_clk"); |
126 | int i; | 126 | int i, ret = 0; |
127 | 127 | ||
128 | for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) { | 128 | for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) { |
129 | struct clk *clkp = sh7786_onchip_clocks[i]; | 129 | struct clk *clkp = sh7786_onchip_clocks[i]; |
130 | 130 | ||
131 | clkp->parent = clk; | 131 | clkp->parent = clk; |
132 | clk_register(clkp); | 132 | ret |= clk_register(clkp); |
133 | clk_enable(clkp); | ||
134 | } | 133 | } |
135 | 134 | ||
136 | /* | ||
137 | * Now that we have the rest of the clocks registered, we need to | ||
138 | * force the parent clock to propagate so that these clocks will | ||
139 | * automatically figure out their rate. We cheat by handing the | ||
140 | * parent clock its current rate and forcing child propagation. | ||
141 | */ | ||
142 | clk_set_rate(clk, clk_get_rate(clk)); | ||
143 | |||
144 | clk_put(clk); | 135 | clk_put(clk); |
145 | 136 | ||
146 | return 0; | 137 | return ret; |
147 | } | 138 | } |
148 | arch_initcall(sh7786_clk_init); | 139 | arch_initcall(sh7786_clk_init); |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c index 6e5c864cf40f..1eb149b0fe6e 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c +++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c | |||
@@ -110,26 +110,17 @@ static struct clk *shx3_onchip_clocks[] = { | |||
110 | static int __init shx3_clk_init(void) | 110 | static int __init shx3_clk_init(void) |
111 | { | 111 | { |
112 | struct clk *clk = clk_get(NULL, "master_clk"); | 112 | struct clk *clk = clk_get(NULL, "master_clk"); |
113 | int i; | 113 | int i, ret = 0; |
114 | 114 | ||
115 | for (i = 0; i < ARRAY_SIZE(shx3_onchip_clocks); i++) { | 115 | for (i = 0; i < ARRAY_SIZE(shx3_onchip_clocks); i++) { |
116 | struct clk *clkp = shx3_onchip_clocks[i]; | 116 | struct clk *clkp = shx3_onchip_clocks[i]; |
117 | 117 | ||
118 | clkp->parent = clk; | 118 | clkp->parent = clk; |
119 | clk_register(clkp); | 119 | ret |= clk_register(clkp); |
120 | clk_enable(clkp); | ||
121 | } | 120 | } |
122 | 121 | ||
123 | /* | ||
124 | * Now that we have the rest of the clocks registered, we need to | ||
125 | * force the parent clock to propagate so that these clocks will | ||
126 | * automatically figure out their rate. We cheat by handing the | ||
127 | * parent clock its current rate and forcing child propagation. | ||
128 | */ | ||
129 | clk_set_rate(clk, clk_get_rate(clk)); | ||
130 | |||
131 | clk_put(clk); | 122 | clk_put(clk); |
132 | 123 | ||
133 | return 0; | 124 | return ret; |
134 | } | 125 | } |
135 | arch_initcall(shx3_clk_init); | 126 | arch_initcall(shx3_clk_init); |