aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/kernel/cpu
diff options
context:
space:
mode:
authorMagnus Damm <damm@igel.co.jp>2007-06-15 05:56:19 -0400
committerPaul Mundt <lethal@linux-sh.org>2007-06-15 05:56:19 -0400
commit68abdbbb03476a60d932eeba0035dd5069afec38 (patch)
treede3854f76d6d9aec121c432a3cd276bb756003c9 /arch/sh/kernel/cpu
parent50f63f2518ee68bc132d357d2b6fdb7f60ef79e0 (diff)
sh: rework ipr code
This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu')
-rw-r--r--arch/sh/kernel/cpu/irq/ipr.c59
-rw-r--r--arch/sh/kernel/cpu/sh2/setup-sh7619.c24
-rw-r--r--arch/sh/kernel/cpu/sh2a/setup-sh7206.c24
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7705.c40
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7709.c84
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7710.c42
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c58
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7760.c32
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c21
9 files changed, 229 insertions, 155 deletions
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index 210280b6fddf..98e84f40c713 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -22,58 +22,57 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24 24
25static inline struct ipr_desc *get_ipr_desc(unsigned int irq)
26{
27 struct irq_chip *chip = get_irq_chip(irq);
28 return (void *)((char *)chip - offsetof(struct ipr_desc, chip));
29}
30
25static void disable_ipr_irq(unsigned int irq) 31static void disable_ipr_irq(unsigned int irq)
26{ 32{
27 struct ipr_data *p = get_irq_chip_data(irq); 33 struct ipr_data *p = get_irq_chip_data(irq);
34 unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
28 /* Set the priority in IPR to 0 */ 35 /* Set the priority in IPR to 0 */
29 ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr); 36 ctrl_outw(ctrl_inw(addr) & (0xffff ^ (0xf << p->shift)), addr);
30} 37}
31 38
32static void enable_ipr_irq(unsigned int irq) 39static void enable_ipr_irq(unsigned int irq)
33{ 40{
34 struct ipr_data *p = get_irq_chip_data(irq); 41 struct ipr_data *p = get_irq_chip_data(irq);
42 unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
35 /* Set priority in IPR back to original value */ 43 /* Set priority in IPR back to original value */
36 ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr); 44 ctrl_outw(ctrl_inw(addr) | (p->priority << p->shift), addr);
37} 45}
38 46
39static struct irq_chip ipr_irq_chip = { 47/*
40 .name = "IPR", 48 * The shift value is now the number of bits to shift, not the number of
41 .mask = disable_ipr_irq, 49 * bits/4. This is to make it easier to read the value directly from the
42 .unmask = enable_ipr_irq, 50 * datasheets. The IPR address is calculated using the ipr_offset table.
43 .mask_ack = disable_ipr_irq, 51 */
44};
45
46unsigned int map_ipridx_to_addr(int idx) __attribute__ ((weak));
47unsigned int map_ipridx_to_addr(int idx)
48{
49 return 0;
50}
51 52
52void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs) 53void register_ipr_controller(struct ipr_desc *desc)
53{ 54{
54 int i; 55 int i;
55 56
56 for (i = 0; i < nr_irqs; i++) { 57 desc->chip.mask = disable_ipr_irq;
57 unsigned int irq = table[i].irq; 58 desc->chip.unmask = enable_ipr_irq;
59 desc->chip.mask_ack = disable_ipr_irq;
58 60
59 if (!irq) 61 for (i = 0; i < desc->nr_irqs; i++) {
60 irq = table[i].irq = i; 62 struct ipr_data *p = desc->ipr_data + i;
61 63
62 /* could the IPR index be mapped, if not we ignore this */ 64 BUG_ON(p->ipr_idx >= desc->nr_offsets);
63 if (!table[i].addr) { 65 BUG_ON(!desc->ipr_offsets[p->ipr_idx]);
64 table[i].addr = map_ipridx_to_addr(table[i].ipr_idx);
65 if (!table[i].addr)
66 continue;
67 }
68 66
69 disable_irq_nosync(irq); 67 disable_irq_nosync(p->irq);
70 set_irq_chip_and_handler_name(irq, &ipr_irq_chip, 68 set_irq_chip_and_handler_name(p->irq, &desc->chip,
71 handle_level_irq, "level"); 69 handle_level_irq, "level");
72 set_irq_chip_data(irq, &table[i]); 70 set_irq_chip_data(p->irq, p);
73 enable_ipr_irq(irq); 71 disable_ipr_irq(p->irq);
74 } 72 }
75} 73}
76EXPORT_SYMBOL(make_ipr_irq); 74
75EXPORT_SYMBOL(register_ipr_controller);
77 76
78#if !defined(CONFIG_CPU_HAS_PINT_IRQ) 77#if !defined(CONFIG_CPU_HAS_PINT_IRQ)
79int ipr_irq_demux(int irq) 78int ipr_irq_demux(int irq)
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index f83ff8a68f35..1a107fe22dde 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -52,7 +52,7 @@ static int __init sh7619_devices_setup(void)
52} 52}
53__initcall(sh7619_devices_setup); 53__initcall(sh7619_devices_setup);
54 54
55static struct ipr_data sh7619_ipr_map[] = { 55static struct ipr_data ipr_irq_table[] = {
56 { 86, 0, 4, 2 }, /* CMI0 */ 56 { 86, 0, 4, 2 }, /* CMI0 */
57 { 88, 1, 12, 3 }, /* SCIF0_ERI */ 57 { 88, 1, 12, 3 }, /* SCIF0_ERI */
58 { 89, 1, 12, 3 }, /* SCIF0_RXI */ 58 { 89, 1, 12, 3 }, /* SCIF0_RXI */
@@ -68,7 +68,7 @@ static struct ipr_data sh7619_ipr_map[] = {
68 { 99, 1, 4, 3 }, /* SCIF2_TXI */ 68 { 99, 1, 4, 3 }, /* SCIF2_TXI */
69}; 69};
70 70
71static unsigned int ipr_offsets[] = { 71static unsigned long ipr_offsets[] = {
72 0xf8080000, /* IPRC */ 72 0xf8080000, /* IPRC */
73 0xf8080002, /* IPRD */ 73 0xf8080002, /* IPRD */
74 0xf8080004, /* IPRE */ 74 0xf8080004, /* IPRE */
@@ -76,15 +76,19 @@ static unsigned int ipr_offsets[] = {
76 0xf8080008, /* IPRG */ 76 0xf8080008, /* IPRG */
77}; 77};
78 78
79/* given the IPR index return the address of the IPR register */ 79static struct ipr_desc ipr_irq_desc = {
80unsigned int map_ipridx_to_addr(int idx) 80 .ipr_offsets = ipr_offsets,
81{ 81 .nr_offsets = ARRAY_SIZE(ipr_offsets),
82 if (unlikely(idx >= ARRAY_SIZE(ipr_offsets))) 82
83 return 0; 83 .ipr_data = ipr_irq_table,
84 return ipr_offsets[idx]; 84 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
85} 85
86 .chip = {
87 .name = "IPR-sh7619",
88 },
89};
86 90
87void __init init_IRQ_ipr(void) 91void __init init_IRQ_ipr(void)
88{ 92{
89 make_ipr_irq(sh7619_ipr_map, ARRAY_SIZE(sh7619_ipr_map)); 93 register_ipr_controller(&ipr_irq_desc);
90} 94}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index 4ed9110632bc..b6e3a6351fa6 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -57,7 +57,7 @@ static int __init sh7206_devices_setup(void)
57} 57}
58__initcall(sh7206_devices_setup); 58__initcall(sh7206_devices_setup);
59 59
60static struct ipr_data sh7206_ipr_map[] = { 60static struct ipr_data ipr_irq_table[] = {
61 { 140, 7, 12, 2 }, /* CMI0 */ 61 { 140, 7, 12, 2 }, /* CMI0 */
62 { 164, 8, 4, 2 }, /* MTU2_TGI1A */ 62 { 164, 8, 4, 2 }, /* MTU2_TGI1A */
63 { 240, 13, 12, 3 }, /* SCIF0_BRI */ 63 { 240, 13, 12, 3 }, /* SCIF0_BRI */
@@ -78,7 +78,7 @@ static struct ipr_data sh7206_ipr_map[] = {
78 { 255, 13, 0, 3 }, /* SCIF3_TXI */ 78 { 255, 13, 0, 3 }, /* SCIF3_TXI */
79}; 79};
80 80
81static unsigned int ipr_offsets[] = { 81static unsigned long ipr_offsets[] = {
82 0xfffe0818, /* IPR01 */ 82 0xfffe0818, /* IPR01 */
83 0xfffe081a, /* IPR02 */ 83 0xfffe081a, /* IPR02 */
84 0, /* unused */ 84 0, /* unused */
@@ -95,15 +95,19 @@ static unsigned int ipr_offsets[] = {
95 0xfffe0c10, /* IPR14 */ 95 0xfffe0c10, /* IPR14 */
96}; 96};
97 97
98/* given the IPR index return the address of the IPR register */ 98static struct ipr_desc ipr_irq_desc = {
99unsigned int map_ipridx_to_addr(int idx) 99 .ipr_offsets = ipr_offsets,
100{ 100 .nr_offsets = ARRAY_SIZE(ipr_offsets),
101 if (unlikely(idx >= ARRAY_SIZE(ipr_offsets))) 101
102 return 0; 102 .ipr_data = ipr_irq_table,
103 return ipr_offsets[idx]; 103 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
104} 104
105 .chip = {
106 .name = "IPR-sh7206",
107 },
108};
105 109
106void __init init_IRQ_ipr(void) 110void __init init_IRQ_ipr(void)
107{ 111{
108 make_ipr_irq(sh7206_ipr_map, ARRAY_SIZE(sh7206_ipr_map)); 112 register_ipr_controller(&ipr_irq_desc);
109} 113}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index 1983fb7ad6ea..a55b8ce2c54c 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -48,7 +48,7 @@ static int __init sh7705_devices_setup(void)
48} 48}
49__initcall(sh7705_devices_setup); 49__initcall(sh7705_devices_setup);
50 50
51static struct ipr_data sh7705_ipr_map[] = { 51static struct ipr_data ipr_irq_table[] = {
52 /* IRQ, IPR-idx, shift, priority */ 52 /* IRQ, IPR-idx, shift, priority */
53 { 16, 0, 12, 2 }, /* TMU0 TUNI*/ 53 { 16, 0, 12, 2 }, /* TMU0 TUNI*/
54 { 17, 0, 8, 2 }, /* TMU1 TUNI */ 54 { 17, 0, 8, 2 }, /* TMU1 TUNI */
@@ -70,25 +70,29 @@ static struct ipr_data sh7705_ipr_map[] = {
70}; 70};
71 71
72static unsigned long ipr_offsets[] = { 72static unsigned long ipr_offsets[] = {
73 0xFFFFFEE2 /* 0: IPRA */ 73 0xFFFFFEE2, /* 0: IPRA */
74, 0xFFFFFEE4 /* 1: IPRB */ 74 0xFFFFFEE4, /* 1: IPRB */
75, 0xA4000016 /* 2: IPRC */ 75 0xA4000016, /* 2: IPRC */
76, 0xA4000018 /* 3: IPRD */ 76 0xA4000018, /* 3: IPRD */
77, 0xA400001A /* 4: IPRE */ 77 0xA400001A, /* 4: IPRE */
78, 0xA4080000 /* 5: IPRF */ 78 0xA4080000, /* 5: IPRF */
79, 0xA4080002 /* 6: IPRG */ 79 0xA4080002, /* 6: IPRG */
80, 0xA4080004 /* 7: IPRH */ 80 0xA4080004, /* 7: IPRH */
81}; 81};
82 82
83/* given the IPR index return the address of the IPR register */ 83static struct ipr_desc ipr_irq_desc = {
84unsigned int map_ipridx_to_addr(int idx) 84 .ipr_offsets = ipr_offsets,
85{ 85 .nr_offsets = ARRAY_SIZE(ipr_offsets),
86 if (idx >= ARRAY_SIZE(ipr_offsets)) 86
87 return 0; 87 .ipr_data = ipr_irq_table,
88 return ipr_offsets[idx]; 88 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
89} 89
90 .chip = {
91 .name = "IPR-sh7705",
92 },
93};
90 94
91void __init init_IRQ_ipr() 95void __init init_IRQ_ipr(void)
92{ 96{
93 make_ipr_irq(sh7705_ipr_map, ARRAY_SIZE(sh7705_ipr_map)); 97 register_ipr_controller(&ipr_irq_desc);
94} 98}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7709.c b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
index c7d7c35fc834..c0265a96e7d3 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7709.c
@@ -52,32 +52,66 @@ static int __init sh7709_devices_setup(void)
52} 52}
53__initcall(sh7709_devices_setup); 53__initcall(sh7709_devices_setup);
54 54
55#define IPRx(A,N) .addr=A, .shift=N 55static struct ipr_data ipr_irq_table[] = {
56#define IPRA(N) IPRx(0xfffffee2UL,N) 56 { 16, 0, 12, 2 }, /* TMU TUNI0 */
57#define IPRB(N) IPRx(0xfffffee4UL,N) 57 { 17, 0, 8, 4 }, /* TMU TUNI1 */
58#define IPRC(N) IPRx(0xa4000016UL,N) 58 { 18, 0, 4, 1 }, /* TMU TUNI1 */
59#define IPRD(N) IPRx(0xa4000018UL,N) 59 { 19, 0, 4, 1 }, /* TMU TUNI1 */
60#define IPRE(N) IPRx(0xa400001aUL,N) 60 { 20, 0, 0, 2 }, /* RTC CUI */
61 61 { 21, 0, 0, 2 }, /* RTC CUI */
62static struct ipr_data sh7709_ipr_map[] = { 62 { 22, 0, 0, 2 }, /* RTC CUI */
63 [16] = { IPRA(12), 2 }, /* TMU TUNI0 */ 63
64 [17] = { IPRA(8), 4 }, /* TMU TUNI1 */ 64 { 23, 1, 4, 3 }, /* SCI */
65 [18 ... 19] = { IPRA(4), 1 }, /* TMU TUNI1 */ 65 { 24, 1, 4, 3 }, /* SCI */
66 [20 ... 22] = { IPRA(0), 2 }, /* RTC CUI */ 66 { 25, 1, 4, 3 }, /* SCI */
67 [23 ... 26] = { IPRB(4), 3 }, /* SCI */ 67 { 26, 1, 4, 3 }, /* SCI */
68 [27] = { IPRB(12), 2 }, /* WDT ITI */ 68 { 27, 1, 12, 3 }, /* WDT ITI */
69 [32] = { IPRC(0), 1 }, /* IRQ 0 */ 69
70 [33] = { IPRC(4), 1 }, /* IRQ 1 */ 70 { 32, 2, 0, 1 }, /* IRQ 0 */
71 [34] = { IPRC(8), 1 }, /* IRQ 2 APM */ 71 { 33, 2, 4, 1 }, /* IRQ 1 */
72 [35] = { IPRC(12), 1 }, /* IRQ 3 TOUCHSCREEN */ 72 { 34, 2, 8, 1 }, /* IRQ 2 APM */
73 [36] = { IPRD(0), 1 }, /* IRQ 4 */ 73 { 35, 2, 12, 1 }, /* IRQ 3 TOUCHSCREEN */
74 [37] = { IPRD(4), 1 }, /* IRQ 5 */ 74
75 [48 ... 51] = { IPRE(12), 7 }, /* DMA */ 75 { 36, 3, 0, 1 }, /* IRQ 4 */
76 [52 ... 55] = { IPRE(8), 3 }, /* IRDA */ 76 { 37, 3, 4, 1 }, /* IRQ 5 */
77 [56 ... 59] = { IPRE(4), 3 }, /* SCIF */ 77
78 { 48, 4, 12, 7 }, /* DMA */
79 { 49, 4, 12, 7 }, /* DMA */
80 { 50, 4, 12, 7 }, /* DMA */
81 { 51, 4, 12, 7 }, /* DMA */
82
83 { 52, 4, 8, 3 }, /* IRDA */
84 { 53, 4, 8, 3 }, /* IRDA */
85 { 54, 4, 8, 3 }, /* IRDA */
86 { 55, 4, 8, 3 }, /* IRDA */
87
88 { 56, 4, 4, 3 }, /* SCIF */
89 { 57, 4, 4, 3 }, /* SCIF */
90 { 58, 4, 4, 3 }, /* SCIF */
91 { 59, 4, 4, 3 }, /* SCIF */
92};
93
94static unsigned long ipr_offsets[] = {
95 0xfffffee2, /* 0: IPRA */
96 0xfffffee4, /* 1: IPRB */
97 0xa4000016, /* 2: IPRC */
98 0xa4000018, /* 3: IPRD */
99 0xa400001a, /* 4: IPRE */
100};
101
102static struct ipr_desc ipr_irq_desc = {
103 .ipr_offsets = ipr_offsets,
104 .nr_offsets = ARRAY_SIZE(ipr_offsets),
105
106 .ipr_data = ipr_irq_table,
107 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
108
109 .chip = {
110 .name = "IPR-sh7709",
111 },
78}; 112};
79 113
80void __init init_IRQ_ipr() 114void __init init_IRQ_ipr(void)
81{ 115{
82 make_ipr_irq(sh7709_ipr_map, ARRAY_SIZE(sh7709_ipr_map)); 116 register_ipr_controller(&ipr_irq_desc);
83} 117}
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 51760a7e7f1c..f40e6dac337d 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -49,7 +49,7 @@ static int __init sh7710_devices_setup(void)
49} 49}
50__initcall(sh7710_devices_setup); 50__initcall(sh7710_devices_setup);
51 51
52static struct ipr_data sh7710_ipr_map[] = { 52static struct ipr_data ipr_irq_table[] = {
53 /* IRQ, IPR-idx, shift, priority */ 53 /* IRQ, IPR-idx, shift, priority */
54 { 16, 0, 12, 2 }, /* TMU0 TUNI*/ 54 { 16, 0, 12, 2 }, /* TMU0 TUNI*/
55 { 17, 0, 8, 2 }, /* TMU1 TUNI */ 55 { 17, 0, 8, 2 }, /* TMU1 TUNI */
@@ -78,26 +78,30 @@ static struct ipr_data sh7710_ipr_map[] = {
78}; 78};
79 79
80static unsigned long ipr_offsets[] = { 80static unsigned long ipr_offsets[] = {
81 0xA414FEE2 /* 0: IPRA */ 81 0xA414FEE2, /* 0: IPRA */
82, 0xA414FEE4 /* 1: IPRB */ 82 0xA414FEE4, /* 1: IPRB */
83, 0xA4140016 /* 2: IPRC */ 83 0xA4140016, /* 2: IPRC */
84, 0xA4140018 /* 3: IPRD */ 84 0xA4140018, /* 3: IPRD */
85, 0xA414001A /* 4: IPRE */ 85 0xA414001A, /* 4: IPRE */
86, 0xA4080000 /* 5: IPRF */ 86 0xA4080000, /* 5: IPRF */
87, 0xA4080002 /* 6: IPRG */ 87 0xA4080002, /* 6: IPRG */
88, 0xA4080004 /* 7: IPRH */ 88 0xA4080004, /* 7: IPRH */
89, 0xA4080006 /* 8: IPRI */ 89 0xA4080006, /* 8: IPRI */
90}; 90};
91 91
92/* given the IPR index return the address of the IPR register */ 92static struct ipr_desc ipr_irq_desc = {
93unsigned int map_ipridx_to_addr(int idx) 93 .ipr_offsets = ipr_offsets,
94{ 94 .nr_offsets = ARRAY_SIZE(ipr_offsets),
95 if (idx >= ARRAY_SIZE(ipr_offsets)) 95
96 return 0; 96 .ipr_data = ipr_irq_table,
97 return ipr_offsets[idx]; 97 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
98} 98
99 .chip = {
100 .name = "IPR-sh7710",
101 },
102};
99 103
100void __init init_IRQ_ipr() 104void __init init_IRQ_ipr(void)
101{ 105{
102 make_ipr_irq(sh7710_ipr_map, ARRAY_SIZE(sh7710_ipr_map)); 106 register_ipr_controller(&ipr_irq_desc);
103} 107}
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index 03b14cf78ddf..da153bcdfeb2 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -82,7 +82,7 @@ static int __init sh7750_devices_setup(void)
82} 82}
83__initcall(sh7750_devices_setup); 83__initcall(sh7750_devices_setup);
84 84
85static struct ipr_data sh7750_ipr_map[] = { 85static struct ipr_data ipr_irq_table[] = {
86 /* IRQ, IPR-idx, shift, priority */ 86 /* IRQ, IPR-idx, shift, priority */
87 { 16, 0, 12, 2 }, /* TMU0 TUNI*/ 87 { 16, 0, 12, 2 }, /* TMU0 TUNI*/
88 { 17, 0, 12, 2 }, /* TMU1 TUNI */ 88 { 17, 0, 12, 2 }, /* TMU1 TUNI */
@@ -106,8 +106,27 @@ static struct ipr_data sh7750_ipr_map[] = {
106 { 38, 2, 8, 7 }, /* DMAC DMAE */ 106 { 38, 2, 8, 7 }, /* DMAC DMAE */
107}; 107};
108 108
109static unsigned long ipr_offsets[] = {
110 0xffd00004UL, /* 0: IPRA */
111 0xffd00008UL, /* 1: IPRB */
112 0xffd0000cUL, /* 2: IPRC */
113 0xffd00010UL, /* 3: IPRD */
114};
115
116static struct ipr_desc ipr_irq_desc = {
117 .ipr_offsets = ipr_offsets,
118 .nr_offsets = ARRAY_SIZE(ipr_offsets),
119
120 .ipr_data = ipr_irq_table,
121 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
122
123 .chip = {
124 .name = "IPR-sh7750",
125 },
126};
127
109#ifdef CONFIG_CPU_SUBTYPE_SH7751 128#ifdef CONFIG_CPU_SUBTYPE_SH7751
110static struct ipr_data sh7751_ipr_map[] = { 129static struct ipr_data ipr_irq_table_sh7751[] = {
111 { 44, 2, 8, 7 }, /* DMAC DMTE4 */ 130 { 44, 2, 8, 7 }, /* DMAC DMTE4 */
112 { 45, 2, 8, 7 }, /* DMAC DMTE5 */ 131 { 45, 2, 8, 7 }, /* DMAC DMTE5 */
113 { 46, 2, 8, 7 }, /* DMAC DMTE6 */ 132 { 46, 2, 8, 7 }, /* DMAC DMTE6 */
@@ -118,21 +137,26 @@ static struct ipr_data sh7751_ipr_map[] = {
118 /*{ 72, INTPRI00, 8, ? },*/ /* TMU3 TUNI */ 137 /*{ 72, INTPRI00, 8, ? },*/ /* TMU3 TUNI */
119 /*{ 76, INTPRI00, 12, ? },*/ /* TMU4 TUNI */ 138 /*{ 76, INTPRI00, 12, ? },*/ /* TMU4 TUNI */
120}; 139};
121#endif
122 140
123static unsigned long ipr_offsets[] = { 141static struct ipr_desc ipr_irq_desc_sh7751 = {
124 0xffd00004UL, /* 0: IPRA */ 142 .ipr_offsets = ipr_offsets,
125 0xffd00008UL, /* 1: IPRB */ 143 .nr_offsets = ARRAY_SIZE(ipr_offsets),
126 0xffd0000cUL, /* 2: IPRC */ 144
127 0xffd00010UL, /* 3: IPRD */ 145 .ipr_data = ipr_irq_table_sh7751,
146 .nr_irqs = ARRAY_SIZE(ipr_irq_table_sh7751),
147
148 .chip = {
149 .name = "IPR-sh7751",
150 },
128}; 151};
152#endif
129 153
130/* given the IPR index return the address of the IPR register */ 154void __init init_IRQ_ipr(void)
131unsigned int map_ipridx_to_addr(int idx)
132{ 155{
133 if (idx >= ARRAY_SIZE(ipr_offsets)) 156 register_ipr_controller(&ipr_irq_desc);
134 return 0; 157#ifdef CONFIG_CPU_SUBTYPE_SH7751
135 return ipr_offsets[idx]; 158 register_ipr_controller(&ipr_irq_desc_sh7751);
159#endif
136} 160}
137 161
138#define INTC_ICR 0xffd00000UL 162#define INTC_ICR 0xffd00000UL
@@ -143,11 +167,3 @@ void ipr_irq_enable_irlm(void)
143{ 167{
144 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 168 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
145} 169}
146
147void __init init_IRQ_ipr()
148{
149 make_ipr_irq(sh7750_ipr_map, ARRAY_SIZE(sh7750_ipr_map));
150#ifdef CONFIG_CPU_SUBTYPE_SH7751
151 make_ipr_irq(sh7751_ipr_map, ARRAY_SIZE(sh7751_ipr_map));
152#endif
153}
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 6d3c91897774..3df169755673 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -109,7 +109,12 @@ static struct intc2_desc intc2_irq_desc __read_mostly = {
109 }, 109 },
110}; 110};
111 111
112static struct ipr_data sh7760_ipr_map[] = { 112void __init init_IRQ_intc2(void)
113{
114 register_intc2_controller(&intc2_irq_desc);
115}
116
117static struct ipr_data ipr_irq_table[] = {
113 /* IRQ, IPR-idx, shift, priority */ 118 /* IRQ, IPR-idx, shift, priority */
114 { 16, 0, 12, 2 }, /* TMU0 TUNI*/ 119 { 16, 0, 12, 2 }, /* TMU0 TUNI*/
115 { 17, 0, 8, 2 }, /* TMU1 TUNI */ 120 { 17, 0, 8, 2 }, /* TMU1 TUNI */
@@ -146,20 +151,19 @@ static unsigned long ipr_offsets[] = {
146 0xffd00010UL, /* 3: IPRD */ 151 0xffd00010UL, /* 3: IPRD */
147}; 152};
148 153
149/* given the IPR index return the address of the IPR register */ 154static struct ipr_desc ipr_irq_desc = {
150unsigned int map_ipridx_to_addr(int idx) 155 .ipr_offsets = ipr_offsets,
151{ 156 .nr_offsets = ARRAY_SIZE(ipr_offsets),
152 if (idx >= ARRAY_SIZE(ipr_offsets))
153 return 0;
154 return ipr_offsets[idx];
155}
156 157
157void __init init_IRQ_intc2(void) 158 .ipr_data = ipr_irq_table,
158{ 159 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
159 register_intc2_controller(&intc2_irq_desc); 160
160} 161 .chip = {
162 .name = "IPR-sh7760",
163 },
164};
161 165
162void __init init_IRQ_ipr(void) 166void __init init_IRQ_ipr(void)
163{ 167{
164 make_ipr_irq(sh7760_ipr_map, ARRAY_SIZE(sh7760_ipr_map)); 168 register_ipr_controller(&ipr_irq_desc);
165} 169}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index fa07fab4797f..a3e159ef6dfe 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -44,7 +44,7 @@ static int __init sh7722_devices_setup(void)
44} 44}
45__initcall(sh7722_devices_setup); 45__initcall(sh7722_devices_setup);
46 46
47static struct ipr_data sh7722_ipr_map[] = { 47static struct ipr_data ipr_irq_table[] = {
48 /* IRQ, IPR-idx, shift, prio */ 48 /* IRQ, IPR-idx, shift, prio */
49 { 16, 0, 12, 2 }, /* TMU0 */ 49 { 16, 0, 12, 2 }, /* TMU0 */
50 { 17, 0, 8, 2 }, /* TMU1 */ 50 { 17, 0, 8, 2 }, /* TMU1 */
@@ -69,16 +69,21 @@ static unsigned long ipr_offsets[] = {
69 0xa408002c, /* 11: IPRL */ 69 0xa408002c, /* 11: IPRL */
70}; 70};
71 71
72unsigned int map_ipridx_to_addr(int idx) 72static struct ipr_desc ipr_irq_desc = {
73{ 73 .ipr_offsets = ipr_offsets,
74 if (unlikely(idx >= ARRAY_SIZE(ipr_offsets))) 74 .nr_offsets = ARRAY_SIZE(ipr_offsets),
75 return 0; 75
76 return ipr_offsets[idx]; 76 .ipr_data = ipr_irq_table,
77} 77 .nr_irqs = ARRAY_SIZE(ipr_irq_table),
78
79 .chip = {
80 .name = "IPR-sh7722",
81 },
82};
78 83
79void __init init_IRQ_ipr(void) 84void __init init_IRQ_ipr(void)
80{ 85{
81 make_ipr_irq(sh7722_ipr_map, ARRAY_SIZE(sh7722_ipr_map)); 86 register_ipr_controller(&ipr_irq_desc);
82} 87}
83 88
84void __init plat_mem_setup(void) 89void __init plat_mem_setup(void)