diff options
author | Paul Mundt <lethal@linux-sh.org> | 2012-05-18 00:59:18 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2012-05-18 00:59:18 -0400 |
commit | 89ed34f34842fc4ed766a93838302f613d5f4801 (patch) | |
tree | 77ae6d1e0cc96751ba3972d8b10581e400e86ab6 /arch/sh/kernel/cpu | |
parent | f454314cff21155192d7358a9e890d7834078094 (diff) |
sh: sh7780 evt2irq migration.
Migrate SH7780 to evt2irq() backed hwirq lookups.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 37 |
1 files changed, 22 insertions, 15 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c index d431b0052d0c..de45b704687a 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/serial_sci.h> | 14 | #include <linux/serial_sci.h> |
15 | #include <linux/sh_dma.h> | 15 | #include <linux/sh_dma.h> |
16 | #include <linux/sh_timer.h> | 16 | #include <linux/sh_timer.h> |
17 | #include <linux/sh_intc.h> | ||
17 | #include <cpu/dma-register.h> | 18 | #include <cpu/dma-register.h> |
18 | 19 | ||
19 | static struct plat_sci_port scif0_platform_data = { | 20 | static struct plat_sci_port scif0_platform_data = { |
@@ -22,7 +23,7 @@ static struct plat_sci_port scif0_platform_data = { | |||
22 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, | 23 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, |
23 | .scbrr_algo_id = SCBRR_ALGO_1, | 24 | .scbrr_algo_id = SCBRR_ALGO_1, |
24 | .type = PORT_SCIF, | 25 | .type = PORT_SCIF, |
25 | .irqs = { 40, 40, 40, 40 }, | 26 | .irqs = SCIx_IRQ_MUXED(evt2irq(0x700)), |
26 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | 27 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, |
27 | }; | 28 | }; |
28 | 29 | ||
@@ -40,7 +41,7 @@ static struct plat_sci_port scif1_platform_data = { | |||
40 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, | 41 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, |
41 | .scbrr_algo_id = SCBRR_ALGO_1, | 42 | .scbrr_algo_id = SCBRR_ALGO_1, |
42 | .type = PORT_SCIF, | 43 | .type = PORT_SCIF, |
43 | .irqs = { 76, 76, 76, 76 }, | 44 | .irqs = SCIx_IRQ_MUXED(evt2irq(0xb80)), |
44 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, | 45 | .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, |
45 | }; | 46 | }; |
46 | 47 | ||
@@ -65,7 +66,7 @@ static struct resource tmu0_resources[] = { | |||
65 | .flags = IORESOURCE_MEM, | 66 | .flags = IORESOURCE_MEM, |
66 | }, | 67 | }, |
67 | [1] = { | 68 | [1] = { |
68 | .start = 28, | 69 | .start = evt2irq(0x580), |
69 | .flags = IORESOURCE_IRQ, | 70 | .flags = IORESOURCE_IRQ, |
70 | }, | 71 | }, |
71 | }; | 72 | }; |
@@ -93,7 +94,7 @@ static struct resource tmu1_resources[] = { | |||
93 | .flags = IORESOURCE_MEM, | 94 | .flags = IORESOURCE_MEM, |
94 | }, | 95 | }, |
95 | [1] = { | 96 | [1] = { |
96 | .start = 29, | 97 | .start = evt2irq(0x5a0), |
97 | .flags = IORESOURCE_IRQ, | 98 | .flags = IORESOURCE_IRQ, |
98 | }, | 99 | }, |
99 | }; | 100 | }; |
@@ -120,7 +121,7 @@ static struct resource tmu2_resources[] = { | |||
120 | .flags = IORESOURCE_MEM, | 121 | .flags = IORESOURCE_MEM, |
121 | }, | 122 | }, |
122 | [1] = { | 123 | [1] = { |
123 | .start = 30, | 124 | .start = evt2irq(0x5c0), |
124 | .flags = IORESOURCE_IRQ, | 125 | .flags = IORESOURCE_IRQ, |
125 | }, | 126 | }, |
126 | }; | 127 | }; |
@@ -147,7 +148,7 @@ static struct resource tmu3_resources[] = { | |||
147 | .flags = IORESOURCE_MEM, | 148 | .flags = IORESOURCE_MEM, |
148 | }, | 149 | }, |
149 | [1] = { | 150 | [1] = { |
150 | .start = 96, | 151 | .start = evt2irq(0xe00), |
151 | .flags = IORESOURCE_IRQ, | 152 | .flags = IORESOURCE_IRQ, |
152 | }, | 153 | }, |
153 | }; | 154 | }; |
@@ -174,7 +175,7 @@ static struct resource tmu4_resources[] = { | |||
174 | .flags = IORESOURCE_MEM, | 175 | .flags = IORESOURCE_MEM, |
175 | }, | 176 | }, |
176 | [1] = { | 177 | [1] = { |
177 | .start = 97, | 178 | .start = evt2irq(0xe20), |
178 | .flags = IORESOURCE_IRQ, | 179 | .flags = IORESOURCE_IRQ, |
179 | }, | 180 | }, |
180 | }; | 181 | }; |
@@ -201,7 +202,7 @@ static struct resource tmu5_resources[] = { | |||
201 | .flags = IORESOURCE_MEM, | 202 | .flags = IORESOURCE_MEM, |
202 | }, | 203 | }, |
203 | [1] = { | 204 | [1] = { |
204 | .start = 98, | 205 | .start = evt2irq(0xe40), |
205 | .flags = IORESOURCE_IRQ, | 206 | .flags = IORESOURCE_IRQ, |
206 | }, | 207 | }, |
207 | }; | 208 | }; |
@@ -224,7 +225,7 @@ static struct resource rtc_resources[] = { | |||
224 | }, | 225 | }, |
225 | [1] = { | 226 | [1] = { |
226 | /* Shared Period/Carry/Alarm IRQ */ | 227 | /* Shared Period/Carry/Alarm IRQ */ |
227 | .start = 20, | 228 | .start = evt2irq(0x480), |
228 | .flags = IORESOURCE_IRQ, | 229 | .flags = IORESOURCE_IRQ, |
229 | }, | 230 | }, |
230 | }; | 231 | }; |
@@ -321,10 +322,13 @@ static struct resource sh7780_dmae0_resources[] = { | |||
321 | .flags = IORESOURCE_MEM, | 322 | .flags = IORESOURCE_MEM, |
322 | }, | 323 | }, |
323 | { | 324 | { |
324 | /* Real DMA error IRQ is 38, and channel IRQs are 34-37, 44-45 */ | 325 | /* |
326 | * Real DMA error vector is 0x6c0, and channel | ||
327 | * vectors are 0x640-0x6a0, 0x780-0x7a0 | ||
328 | */ | ||
325 | .name = "error_irq", | 329 | .name = "error_irq", |
326 | .start = 34, | 330 | .start = evt2irq(0x640), |
327 | .end = 34, | 331 | .end = evt2irq(0x640), |
328 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, | 332 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, |
329 | }, | 333 | }, |
330 | }; | 334 | }; |
@@ -338,10 +342,13 @@ static struct resource sh7780_dmae1_resources[] = { | |||
338 | }, | 342 | }, |
339 | /* DMAC1 has no DMARS */ | 343 | /* DMAC1 has no DMARS */ |
340 | { | 344 | { |
341 | /* Real DMA error IRQ is 38, and channel IRQs are 46-47, 92-95 */ | 345 | /* |
346 | * Real DMA error vector is 0x6c0, and channel | ||
347 | * vectors are 0x7c0-0x7e0, 0xd80-0xde0 | ||
348 | */ | ||
342 | .name = "error_irq", | 349 | .name = "error_irq", |
343 | .start = 46, | 350 | .start = evt2irq(0x7c0), |
344 | .end = 46, | 351 | .end = evt2irq(0x7c0), |
345 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, | 352 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, |
346 | }, | 353 | }, |
347 | }; | 354 | }; |