diff options
author | Kuninori Morimoto <morimoto.kuninori@renesas.com> | 2009-03-25 20:39:49 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-03-30 18:39:51 -0400 |
commit | 1c58b0b1a1412ceb6b25dad81bc537bf0fe6ad46 (patch) | |
tree | 8ce3e19a311d8eb9c6e2830d557f8aa3d59b6ed8 /arch/sh/kernel/cpu | |
parent | f36b59d1a4fa1e29be606d0513b5f7fa6e720f79 (diff) |
sh: Tidy up sh7786 pinmux table.
Formatting and typo fix.
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c | 184 |
1 files changed, 39 insertions, 145 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c index 54ca6645d5a6..4229e0724c89 100644 --- a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c | |||
@@ -149,150 +149,44 @@ enum { | |||
149 | PINMUX_FUNCTION_END, | 149 | PINMUX_FUNCTION_END, |
150 | 150 | ||
151 | PINMUX_MARK_BEGIN, | 151 | PINMUX_MARK_BEGIN, |
152 | CDE_MARK, | 152 | DCLKIN_MARK, DCLKOUT_MARK, ODDF_MARK, |
153 | ETH_MAGIC_MARK, | 153 | VSYNC_MARK, HSYNC_MARK, CDE_MARK, DISP_MARK, |
154 | DISP_MARK, | 154 | DR0_MARK, DR1_MARK, DR2_MARK, DR3_MARK, DR4_MARK, DR5_MARK, |
155 | ETH_LINK_MARK, | 155 | DG0_MARK, DG1_MARK, DG2_MARK, DG3_MARK, DG4_MARK, DG5_MARK, |
156 | DR5_MARK, | 156 | DB0_MARK, DB1_MARK, DB2_MARK, DB3_MARK, DB4_MARK, DB5_MARK, |
157 | ETH_TX_ER_MARK, | 157 | ETH_MAGIC_MARK, ETH_LINK_MARK, ETH_TX_ER_MARK, ETH_TX_EN_MARK, |
158 | DR4_MARK, | 158 | ETH_MDIO_MARK, ETH_RX_CLK_MARK, ETH_MDC_MARK, ETH_COL_MARK, |
159 | ETH_TX_EN_MARK, | 159 | ETH_TX_CLK_MARK, ETH_CRS_MARK, ETH_RX_DV_MARK, ETH_RX_ER_MARK, |
160 | DR3_MARK, | 160 | ETH_TXD3_MARK, ETH_TXD2_MARK, ETH_TXD1_MARK, ETH_TXD0_MARK, |
161 | ETH_TXD3_MARK, | 161 | ETH_RXD3_MARK, ETH_RXD2_MARK, ETH_RXD1_MARK, ETH_RXD0_MARK, |
162 | DR2_MARK, | 162 | HSPI_CLK_MARK, HSPI_CS_MARK, HSPI_RX_MARK, HSPI_TX_MARK, |
163 | ETH_TXD2_MARK, | 163 | SCIF0_CTS_MARK, SCIF0_RTS_MARK, |
164 | DR1_MARK, | 164 | SCIF0_SCK_MARK, SCIF0_RXD_MARK, SCIF0_TXD_MARK, |
165 | ETH_TXD1_MARK, | 165 | SCIF1_SCK_MARK, SCIF1_RXD_MARK, SCIF1_TXD_MARK, |
166 | DR0_MARK, | 166 | SCIF3_SCK_MARK, SCIF3_RXD_MARK, SCIF3_TXD_MARK, |
167 | ETH_TXD0_MARK, | 167 | SCIF4_SCK_MARK, SCIF4_RXD_MARK, SCIF4_TXD_MARK, |
168 | 168 | SCIF5_SCK_MARK, SCIF5_RXD_MARK, SCIF5_TXD_MARK, | |
169 | VSYNC_MARK, | 169 | BREQ_MARK, IOIS16_MARK, CE2B_MARK, CE2A_MARK, BACK_MARK, |
170 | HSPI_CLK_MARK, | 170 | FALE_MARK, FRB_MARK, FSTATUS_MARK, |
171 | ODDF_MARK, | 171 | FSE_MARK, FCLE_MARK, |
172 | HSPI_CS_MARK, | 172 | DACK0_MARK, DACK1_MARK, DACK2_MARK, DACK3_MARK, |
173 | DG5_MARK, | 173 | DREQ0_MARK, DREQ1_MARK, DREQ2_MARK, DREQ3_MARK, |
174 | ETH_MDIO_MARK, | 174 | DRAK0_MARK, DRAK1_MARK, DRAK2_MARK, DRAK3_MARK, |
175 | DG4_MARK, | 175 | USB_OVC1_MARK, USB_OVC0_MARK, |
176 | ETH_RX_CLK_MARK, | 176 | USB_PENC1_MARK, USB_PENC0_MARK, |
177 | DG3_MARK, | ||
178 | ETH_MDC_MARK, | ||
179 | DG2_MARK, | ||
180 | ETH_COL_MARK, | ||
181 | DG1_MARK, | ||
182 | ETH_TX_CLK_MARK, | ||
183 | DG0_MARK, | ||
184 | ETH_CRS_MARK, | ||
185 | |||
186 | DCLKIN_MARK, | ||
187 | HSPI_RX_MARK, | ||
188 | HSYNC_MARK, | ||
189 | HSPI_TX_MARK, | ||
190 | DB5_MARK, | ||
191 | ETH_RXD3_MARK, | ||
192 | DB4_MARK, | ||
193 | ETH_RXD2_MARK, | ||
194 | DB3_MARK, | ||
195 | ETH_RXD1_MARK, | ||
196 | DB2_MARK, | ||
197 | ETH_RXD0_MARK, | ||
198 | DB1_MARK, | ||
199 | ETH_RX_DV_MARK, | ||
200 | DB0_MARK, | ||
201 | ETH_RX_ER_MARK, | ||
202 | |||
203 | DCLKOUT_MARK, | ||
204 | SCIF1_SLK_MARK, | ||
205 | SCIF1_RXD_MARK, | ||
206 | SCIF1_TXD_MARK, | ||
207 | DACK1_MARK, | ||
208 | BACK_MARK, | ||
209 | FALE_MARK, | ||
210 | DACK0_MARK, | ||
211 | FCLE_MARK, | ||
212 | DREQ1_MARK, | ||
213 | BREQ_MARK, | ||
214 | USB_OVC1_MARK, | ||
215 | DREQ0_MARK, | ||
216 | USB_OVC0_MARK, | ||
217 | |||
218 | USB_PENC1_MARK, | ||
219 | USB_PENC0_MARK, | ||
220 | |||
221 | HAC1_SDOUT_MARK, | ||
222 | SSI1_SDATA_MARK, | ||
223 | SDIF1CMD_MARK, | ||
224 | HAC1_SDIN_MARK, | ||
225 | SSI1_SCK_MARK, | ||
226 | SDIF1CD_MARK, | ||
227 | HAC1_SYNC_MARK, | ||
228 | SSI1_WS_MARK, | ||
229 | SDIF1WP_MARK, | ||
230 | HAC1_BITCLK_MARK, | ||
231 | SSI1_CLK_MARK, | ||
232 | SDIF1CLK_MARK, | ||
233 | HAC0_SDOUT_MARK, | ||
234 | SSI0_SDATA_MARK, | ||
235 | SDIF1D3_MARK, | ||
236 | HAC0_SDIN_MARK, | ||
237 | SSI0_SCK_MARK, | ||
238 | SDIF1D2_MARK, | ||
239 | HAC0_SYNC_MARK, | ||
240 | SSI0_WS_MARK, | ||
241 | SDIF1D1_MARK, | ||
242 | HAC0_BITCLK_MARK, | ||
243 | SSI0_CLK_MARK, | ||
244 | SDIF1D0_MARK, | ||
245 | |||
246 | SCIF3_SCK_MARK, | ||
247 | SSI2_SDATA_MARK, | ||
248 | SCIF3_RXD_MARK, | ||
249 | TCLK_MARK, | ||
250 | SSI2_SCK_MARK, | ||
251 | SCIF3_TXD_MARK, | ||
252 | HAC_RES_MARK, | 177 | HAC_RES_MARK, |
253 | SSI2_WS_MARK, | 178 | HAC1_SDOUT_MARK, HAC1_SDIN_MARK, HAC1_SYNC_MARK, HAC1_BITCLK_MARK, |
254 | 179 | HAC0_SDOUT_MARK, HAC0_SDIN_MARK, HAC0_SYNC_MARK, HAC0_BITCLK_MARK, | |
255 | DACK3_MARK, | 180 | SSI0_SDATA_MARK, SSI0_SCK_MARK, SSI0_WS_MARK, SSI0_CLK_MARK, |
256 | SDIF0CMD_MARK, | 181 | SSI1_SDATA_MARK, SSI1_SCK_MARK, SSI1_WS_MARK, SSI1_CLK_MARK, |
257 | DACK2_MARK, | 182 | SSI2_SDATA_MARK, SSI2_SCK_MARK, SSI2_WS_MARK, |
258 | SDIF0CD_MARK, | 183 | SSI3_SDATA_MARK, SSI3_SCK_MARK, SSI3_WS_MARK, |
259 | DREQ3_MARK, | 184 | SDIF1CMD_MARK, SDIF1CD_MARK, SDIF1WP_MARK, SDIF1CLK_MARK, |
260 | SDIF0WP_MARK, | 185 | SDIF1D3_MARK, SDIF1D2_MARK, SDIF1D1_MARK, SDIF1D0_MARK, |
261 | SCIF0_CTS_MARK, | 186 | SDIF0CMD_MARK, SDIF0CD_MARK, SDIF0WP_MARK, SDIF0CLK_MARK, |
262 | DREQ2_MARK, | 187 | SDIF0D3_MARK, SDIF0D2_MARK, SDIF0D1_MARK, SDIF0D0_MARK, |
263 | SDIF0CLK_MARK, | 188 | TCLK_MARK, |
264 | SCIF0_RTS_MARK, | 189 | IRL7_MARK, IRL6_MARK, IRL5_MARK, IRL4_MARK, |
265 | IRL7_MARK, | ||
266 | SDIF0D3_MARK, | ||
267 | SCIF0_SCK_MARK, | ||
268 | IRL6_MARK, | ||
269 | SDIF0D2_MARK, | ||
270 | SCIF0_RXD_MARK, | ||
271 | IRL5_MARK, | ||
272 | SDIF0D1_MARK, | ||
273 | SCIF0_TXD_MARK, | ||
274 | IRL4_MARK, | ||
275 | SDIF0D0_MARK, | ||
276 | |||
277 | SCIF5_SCK_MARK, | ||
278 | FRB_MARK, | ||
279 | SCIF5_RXD_MARK, | ||
280 | IOIS16_MARK, | ||
281 | SCIF5_TXD_MARK, | ||
282 | CE2B_MARK, | ||
283 | DRAK3_MARK, | ||
284 | CE2A_MARK, | ||
285 | SCIF4_SCK_MARK, | ||
286 | DRAK2_MARK, | ||
287 | SSI3_WS_MARK, | ||
288 | SCIF4_RXD_MARK, | ||
289 | DRAK1_MARK, | ||
290 | SSI3_SDATA_MARK, | ||
291 | FSTATUS_MARK, | ||
292 | SCIF4_TXD_MARK, | ||
293 | DRAK0_MARK, | ||
294 | SSI3_SCK_MARK, | ||
295 | FSE_MARK, | ||
296 | PINMUX_MARK_END, | 190 | PINMUX_MARK_END, |
297 | }; | 191 | }; |
298 | 192 | ||
@@ -433,7 +327,7 @@ static pinmux_enum_t pinmux_data[] = { | |||
433 | 327 | ||
434 | /* PD FN */ | 328 | /* PD FN */ |
435 | PINMUX_DATA(DCLKOUT_MARK, PD7_FN), | 329 | PINMUX_DATA(DCLKOUT_MARK, PD7_FN), |
436 | PINMUX_DATA(SCIF1_SLK_MARK, PD6_FN), | 330 | PINMUX_DATA(SCIF1_SCK_MARK, PD6_FN), |
437 | PINMUX_DATA(SCIF1_RXD_MARK, PD5_FN), | 331 | PINMUX_DATA(SCIF1_RXD_MARK, PD5_FN), |
438 | PINMUX_DATA(SCIF1_TXD_MARK, PD4_FN), | 332 | PINMUX_DATA(SCIF1_TXD_MARK, PD4_FN), |
439 | PINMUX_DATA(DACK1_MARK, P1MSEL13_1, P1MSEL12_0, PD3_FN), | 333 | PINMUX_DATA(DACK1_MARK, P1MSEL13_1, P1MSEL12_0, PD3_FN), |
@@ -661,7 +555,7 @@ static struct pinmux_gpio pinmux_gpios[] = { | |||
661 | PINMUX_GPIO(GPIO_FN_DB0, DB0_MARK), | 555 | PINMUX_GPIO(GPIO_FN_DB0, DB0_MARK), |
662 | PINMUX_GPIO(GPIO_FN_ETH_RX_ER, ETH_RX_ER_MARK), | 556 | PINMUX_GPIO(GPIO_FN_ETH_RX_ER, ETH_RX_ER_MARK), |
663 | PINMUX_GPIO(GPIO_FN_DCLKOUT, DCLKOUT_MARK), | 557 | PINMUX_GPIO(GPIO_FN_DCLKOUT, DCLKOUT_MARK), |
664 | PINMUX_GPIO(GPIO_FN_SCIF1_SLK, SCIF1_SLK_MARK), | 558 | PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK), |
665 | PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK), | 559 | PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK), |
666 | PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK), | 560 | PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK), |
667 | PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), | 561 | PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK), |