sh: Mass ctrl_in/outX to __raw_read/writeX conversion.

The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

36 files changed, 189 insertions, 189 deletions

diff --git a/arch/sh/kernel/cpu/adc.c b/arch/sh/kernel/cpu/adc.c
index da3d6877f93d..d307571d54b6 100644
--- a/arch/sh/kernel/cpu/adc.c
+++ b/arch/sh/kernel/cpu/adc.c
@@ -18,19 +18,19 @@ int adc_single(unsigned int channel)
 
         off = (channel & 0x03) << 2;
 
-        csr = ctrl_inb(ADCSR);
+        csr = __raw_readb(ADCSR);
         csr = channel | ADCSR_ADST | ADCSR_CKS;
-        ctrl_outb(csr, ADCSR);
+        __raw_writeb(csr, ADCSR);
 
         do {
-                csr = ctrl_inb(ADCSR);
+                csr = __raw_readb(ADCSR);
         } while ((csr & ADCSR_ADF) == 0);
 
         csr &= ~(ADCSR_ADF | ADCSR_ADST);
-        ctrl_outb(csr, ADCSR);
+        __raw_writeb(csr, ADCSR);
 
-        return (((ctrl_inb(ADDRAH + off) << 8) |
-                ctrl_inb(ADDRAL + off)) >> 6);
+        return (((__raw_readb(ADDRAH + off) << 8) |
+                __raw_readb(ADDRAL + off)) >> 6);
 }
 
 EXPORT_SYMBOL(adc_single);
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index 05a7d2a373b6..6311b0b1789d 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -61,10 +61,10 @@ onchip_setup(dsp);
 static void __init speculative_execution_init(void)
 {
         /* Clear RABD */
-        ctrl_outl(ctrl_inl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
+        __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM);
 
         /* Flush the update */
-        (void)ctrl_inl(CPUOPM);
+        (void)__raw_readl(CPUOPM);
         ctrl_barrier();
 }
 #else
@@ -111,7 +111,7 @@ static void cache_init(void)
         unsigned long ccr, flags;
 
         jump_to_uncached();
-        ccr = ctrl_inl(CCR);
+        ccr = __raw_readl(CCR);
 
         /*
          * At this point we don't know whether the cache is enabled or not - a
@@ -155,7 +155,7 @@ static void cache_init(void)
                         for (addr = addrstart;
                              addr < addrstart + waysize;
                              addr += current_cpu_data.dcache.linesz)
-                                ctrl_outl(0, addr);
+                                __raw_writel(0, addr);
 
                         addrstart += current_cpu_data.dcache.way_incr;
                 } while (--ways);
@@ -188,7 +188,7 @@ static void cache_init(void)
 
         l2_cache_init();
 
-        ctrl_outl(flags, CCR);
+        __raw_writel(flags, CCR);
         back_to_cached();
 }
 #else
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index 06e7e2959b54..96a239583948 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -123,7 +123,7 @@ static void enable_intc_irq(unsigned int irq)
                 bitmask = 1 << (irq - 32);
         }
 
-        ctrl_outl(bitmask, reg);
+        __raw_writel(bitmask, reg);
 }
 
 static void disable_intc_irq(unsigned int irq)
@@ -139,7 +139,7 @@ static void disable_intc_irq(unsigned int irq)
                 bitmask = 1 << (irq - 32);
         }
 
-        ctrl_outl(bitmask, reg);
+        __raw_writel(bitmask, reg);
 }
 
 static void mask_and_ack_intc(unsigned int irq)
@@ -170,11 +170,11 @@ void __init plat_irq_setup(void)
 
 
         /* Disable all interrupts and set all priorities to 0 to avoid trouble */
-        ctrl_outl(-1, INTC_INTDSB_0);
-        ctrl_outl(-1, INTC_INTDSB_1);
+        __raw_writel(-1, INTC_INTDSB_0);
+        __raw_writel(-1, INTC_INTDSB_1);
 
         for (reg = INTC_INTPRI_0, i = 0; i < INTC_INTPRI_PREGS; i++, reg += 8)
-                ctrl_outl( NO_PRIORITY, reg);
+                __raw_writel( NO_PRIORITY, reg);
 
 
 #ifdef CONFIG_SH_CAYMAN
@@ -199,7 +199,7 @@ void __init plat_irq_setup(void)
                         reg = INTC_ICR_SET;
                         i = IRQ_IRL0;
                 }
-                ctrl_outl(INTC_ICR_IRLM, reg);
+                __raw_writel(INTC_ICR_IRLM, reg);
 
                 /* Set interrupt priorities according to platform description */
                 for (data = 0, reg = INTC_INTPRI_0; i < NR_INTC_IRQS; i++) {
@@ -207,7 +207,7 @@ void __init plat_irq_setup(void)
                                 ((i % INTC_INTPRI_PPREG) * 4);
                         if ((i % INTC_INTPRI_PPREG) == (INTC_INTPRI_PPREG - 1)) {
                                 /* Upon the 7th, set Priority Register */
-                                ctrl_outl(data, reg);
+                                __raw_writel(data, reg);
                                 data = 0;
                                 reg += 8;
                         }
diff --git a/arch/sh/kernel/cpu/sh2/clock-sh7619.c b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
index 4fe863170e31..0c9f24d7a02f 100644
--- a/arch/sh/kernel/cpu/sh2/clock-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
@@ -31,7 +31,7 @@ static const int pfc_divisors[] = {1,2,0,4};
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 7];
+        clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
 }
 
 static struct clk_ops sh7619_master_clk_ops = {
@@ -40,7 +40,7 @@ static struct clk_ops sh7619_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -50,7 +50,7 @@ static struct clk_ops sh7619_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 7];
+        return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
 }
 
 static struct clk_ops sh7619_bus_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
index 7814c76159a7..b26264dc2aef 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
 
 static void master_clk_init(struct clk *clk)
 {
-        return 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+        return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
 static struct clk_ops sh7201_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7201_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -53,7 +53,7 @@ static struct clk_ops sh7201_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -63,7 +63,7 @@ static struct clk_ops sh7201_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007);
+        int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
index 940986965102..7e75d8f79502 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
@@ -39,7 +39,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0003] * PLL2 ;
+        clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * PLL2 ;
 }
 
 static struct clk_ops sh7203_master_clk_ops = {
@@ -48,7 +48,7 @@ static struct clk_ops sh7203_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -58,7 +58,7 @@ static struct clk_ops sh7203_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx-2];
 }
 
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
index c2268bdeceeb..b27a5e2687ab 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
@@ -34,7 +34,7 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+        clk->rate *= PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
 static struct clk_ops sh7206_master_clk_ops = {
@@ -43,7 +43,7 @@ static struct clk_ops sh7206_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -53,7 +53,7 @@ static struct clk_ops sh7206_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+        return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
 }
 
 static struct clk_ops sh7206_bus_clk_ops = {
@@ -62,7 +62,7 @@ static struct clk_ops sh7206_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FREQCR) & 0x0007);
+        int idx = (__raw_readw(FREQCR) & 0x0007);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh3.c b/arch/sh/kernel/cpu/sh3/clock-sh3.c
index 27b8738f0b09..b78384afac09 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh3.c
@@ -28,7 +28,7 @@ static int pfc_divisors[]    = { 1, 2, 3, 4, 6, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         clk->rate *= pfc_divisors[idx];
@@ -40,7 +40,7 @@ static struct clk_ops sh3_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         return clk->parent->rate / pfc_divisors[idx];
@@ -52,7 +52,7 @@ static struct clk_ops sh3_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
 
         return clk->parent->rate / stc_multipliers[idx];
@@ -64,7 +64,7 @@ static struct clk_ops sh3_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
         return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7705.c b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
index 0ca8f2c3646c..0ecea1451c6f 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
@@ -32,7 +32,7 @@ static int pfc_divisors[]    = { 1, 2, 3, 4, 6, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0003];
+        clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
 }
 
 static struct clk_ops sh7705_master_clk_ops = {
@@ -41,7 +41,7 @@ static struct clk_ops sh7705_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ctrl_inw(FRQCR) & 0x0003;
+        int idx = __raw_readw(FRQCR) & 0x0003;
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -51,7 +51,7 @@ static struct clk_ops sh7705_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0300) >> 8;
+        int idx = (__raw_readw(FRQCR) & 0x0300) >> 8;
         return clk->parent->rate / stc_multipliers[idx];
 }
 
@@ -61,7 +61,7 @@ static struct clk_ops sh7705_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0030) >> 4;
+        int idx = (__raw_readw(FRQCR) & 0x0030) >> 4;
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7706.c b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
index 4bf7887d310a..6f9ff8b57dd6 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7706.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
@@ -24,7 +24,7 @@ static int pfc_divisors[]    = { 1, 2, 4, 1, 3, 6, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         clk->rate *= pfc_divisors[idx];
@@ -36,7 +36,7 @@ static struct clk_ops sh7706_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         return clk->parent->rate / pfc_divisors[idx];
@@ -48,7 +48,7 @@ static struct clk_ops sh7706_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
 
         return clk->parent->rate / stc_multipliers[idx];
@@ -60,7 +60,7 @@ static struct clk_ops sh7706_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
         return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
index e8749505bd2a..f302ba09e681 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
@@ -24,7 +24,7 @@ static int pfc_divisors[]    = { 1, 2, 4, 1, 3, 6, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         clk->rate *= pfc_divisors[idx];
@@ -36,7 +36,7 @@ static struct clk_ops sh7709_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
         return clk->parent->rate / pfc_divisors[idx];
@@ -48,7 +48,7 @@ static struct clk_ops sh7709_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = (frqcr & 0x0080) ?
                 ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1;
 
@@ -61,7 +61,7 @@ static struct clk_ops sh7709_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
         return clk->parent->rate / ifc_divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7710.c b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
index 030a58ba18a5..29a87d8946a4 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
@@ -26,7 +26,7 @@ static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= md_table[ctrl_inw(FRQCR) & 0x0007];
+        clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];
 }
 
 static struct clk_ops sh7710_master_clk_ops = {
@@ -35,7 +35,7 @@ static struct clk_ops sh7710_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0007);
+        int idx = (__raw_readw(FRQCR) & 0x0007);
         return clk->parent->rate / md_table[idx];
 }
 
@@ -45,7 +45,7 @@ static struct clk_ops sh7710_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0700) >> 8;
+        int idx = (__raw_readw(FRQCR) & 0x0700) >> 8;
         return clk->parent->rate / md_table[idx];
 }
 
@@ -55,7 +55,7 @@ static struct clk_ops sh7710_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0070) >> 4;
+        int idx = (__raw_readw(FRQCR) & 0x0070) >> 4;
         return clk->parent->rate / md_table[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7712.c b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
index 6428ee6c77ed..b0d0c5203996 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7712.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
@@ -23,7 +23,7 @@ static int divisors[]    = { 1, 2, 3, 4, 6 };
 
 static void master_clk_init(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = (frqcr & 0x0300) >> 8;
 
         clk->rate *= multipliers[idx];
@@ -35,7 +35,7 @@ static struct clk_ops sh7712_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = frqcr & 0x0007;
 
         return clk->parent->rate / divisors[idx];
@@ -47,7 +47,7 @@ static struct clk_ops sh7712_module_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int frqcr = ctrl_inw(FRQCR);
+        int frqcr = __raw_readw(FRQCR);
         int idx = (frqcr & 0x0030) >> 4;
 
         return clk->parent->rate / divisors[idx];
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index c2db65719f4d..295ec4c99e98 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -30,23 +30,23 @@ int detect_cpu_and_cache_system(void)
         addr1 = CACHE_OC_ADDRESS_ARRAY + (1 << 12);
 
         /* First, write back & invalidate */
-        data0  = ctrl_inl(addr0);
-        ctrl_outl(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
-        data1  = ctrl_inl(addr1);
-        ctrl_outl(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);
+        data0  = __raw_readl(addr0);
+        __raw_writel(data0&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr0);
+        data1  = __raw_readl(addr1);
+        __raw_writel(data1&~(SH_CACHE_VALID|SH_CACHE_UPDATED), addr1);
 
         /* Next, check if there's shadow or not */
-        data0 = ctrl_inl(addr0);
+        data0 = __raw_readl(addr0);
         data0 ^= SH_CACHE_VALID;
-        ctrl_outl(data0, addr0);
-        data1 = ctrl_inl(addr1);
+        __raw_writel(data0, addr0);
+        data1 = __raw_readl(addr1);
         data2 = data1 ^ SH_CACHE_VALID;
-        ctrl_outl(data2, addr1);
-        data3 = ctrl_inl(addr0);
+        __raw_writel(data2, addr1);
+        data3 = __raw_readl(addr0);
 
         /* Lastly, invaliate them. */
-        ctrl_outl(data0&~SH_CACHE_VALID, addr0);
-        ctrl_outl(data2&~SH_CACHE_VALID, addr1);
+        __raw_writel(data0&~SH_CACHE_VALID, addr0);
+        __raw_writel(data2&~SH_CACHE_VALID, addr1);
 
         back_to_cached();
 
@@ -94,9 +94,9 @@ int detect_cpu_and_cache_system(void)
                 boot_cpu_data.dcache.way_incr   = (1 << 13);
                 boot_cpu_data.dcache.entry_mask = 0x1ff0;
                 boot_cpu_data.dcache.sets       = 512;
-                ctrl_outl(CCR_CACHE_32KB, CCR3_REG);
+                __raw_writel(CCR_CACHE_32KB, CCR3_REG);
 #else
-                ctrl_outl(CCR_CACHE_16KB, CCR3_REG);
+                __raw_writel(CCR_CACHE_16KB, CCR3_REG);
 #endif
 #endif
         }
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh3.c b/arch/sh/kernel/cpu/sh3/setup-sh3.c
index c98846857855..53be70b98116 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh3.c
@@ -58,7 +58,7 @@ static DECLARE_INTC_DESC_ACK(intc_desc_irq45, "sh3-irq45",
 void __init plat_irq_setup_pins(int mode)
 {
         if (mode == IRQ_MODE_IRQ) {
-                ctrl_outw(ctrl_inw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
+                __raw_writew(__raw_readw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1);
                 register_intc_controller(&intc_desc_irq0123);
                 return;
         }
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index 21421e34e7d5..6b80850294da 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -23,7 +23,7 @@ static int frqcr3_values[]   = { 0, 1, 2, 3, 4, 5, 6  };
 
 static unsigned long emi_clk_recalc(struct clk *clk)
 {
-        int idx = ctrl_inl(CPG2_FRQCR3) & 0x0007;
+        int idx = __raw_readl(CPG2_FRQCR3) & 0x0007;
         return clk->parent->rate / frqcr3_divisors[idx];
 }
 
@@ -52,7 +52,7 @@ static struct clk sh4202_emi_clk = {
 
 static unsigned long femi_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(CPG2_FRQCR3) >> 3) & 0x0007;
+        int idx = (__raw_readl(CPG2_FRQCR3) >> 3) & 0x0007;
         return clk->parent->rate / frqcr3_divisors[idx];
 }
 
@@ -92,7 +92,7 @@ static void shoc_clk_init(struct clk *clk)
 
 static unsigned long shoc_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(CPG2_FRQCR3) >> 6) & 0x0007;
+        int idx = (__raw_readl(CPG2_FRQCR3) >> 6) & 0x0007;
         return clk->parent->rate / frqcr3_divisors[idx];
 }
 
@@ -122,10 +122,10 @@ static int shoc_clk_set_rate(struct clk *clk, unsigned long rate, int algo_id)
 
         tmp = frqcr3_lookup(clk, rate);
 
-        frqcr3 = ctrl_inl(CPG2_FRQCR3);
+        frqcr3 = __raw_readl(CPG2_FRQCR3);
         frqcr3 &= ~(0x0007 << 6);
         frqcr3 |= tmp << 6;
-        ctrl_outl(frqcr3, CPG2_FRQCR3);
+        __raw_writel(frqcr3, CPG2_FRQCR3);
 
         clk->rate = clk->parent->rate / frqcr3_divisors[tmp];
 
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4.c b/arch/sh/kernel/cpu/sh4/clock-sh4.c
index 73294d9cd049..5add75c1f539 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4.c
@@ -28,7 +28,7 @@ static int pfc_divisors[] = { 2, 3, 4, 6, 8, 2, 2, 2 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[ctrl_inw(FRQCR) & 0x0007];
+        clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007];
 }
 
 static struct clk_ops sh4_master_clk_ops = {
@@ -37,7 +37,7 @@ static struct clk_ops sh4_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) & 0x0007);
+        int idx = (__raw_readw(FRQCR) & 0x0007);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -47,7 +47,7 @@ static struct clk_ops sh4_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) >> 3) & 0x0007;
+        int idx = (__raw_readw(FRQCR) >> 3) & 0x0007;
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -57,7 +57,7 @@ static struct clk_ops sh4_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(FRQCR) >> 6) & 0x0007;
+        int idx = (__raw_readw(FRQCR) >> 6) & 0x0007;
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index cc02b3145cca..822977a06d84 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -28,9 +28,9 @@ int __init detect_cpu_and_cache_system(void)
                 [9] = (1 << 16)
         };
 
-        pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffffff;
-        prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff;
-        cvr = (ctrl_inl(CCN_CVR));
+        pvr = (__raw_readl(CCN_PVR) >> 8) & 0xffffff;
+        prr = (__raw_readl(CCN_PRR) >> 4) & 0xff;
+        cvr = (__raw_readl(CCN_CVR));
 
         /*
          * Setup some sane SH-4 defaults for the icache
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index 4b733715cdb5..b9b7e10ad68f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -198,7 +198,7 @@ void __init plat_irq_setup_pins(int mode)
 {
         switch (mode) {
         case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
-                ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+                __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
                 register_intc_controller(&intc_desc_irlm);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index b2a9df1af64c..ffd79e57254f 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -442,7 +442,7 @@ void __init plat_irq_setup_pins(int mode)
 
         switch (mode) {
         case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
-                ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+                __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
                 register_intc_controller(&intc_desc_irlm);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 5b74cc0b43da..a16eb3656f4b 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -319,7 +319,7 @@ void __init plat_irq_setup_pins(int mode)
 {
         switch (mode) {
         case IRQ_MODE_IRQ:
-                ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+                __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
                 register_intc_controller(&intc_desc_irq);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index 8a8a993f55ea..97aea9d69b00 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -43,9 +43,9 @@ static unsigned long *sq_bitmap;
 
 #define store_queue_barrier()                   \
 do {                                            \
-        (void)ctrl_inl(P4SEG_STORE_QUE);        \
-        ctrl_outl(0, P4SEG_STORE_QUE + 0);      \
-        ctrl_outl(0, P4SEG_STORE_QUE + 8);      \
+        (void)__raw_readl(P4SEG_STORE_QUE);     \
+        __raw_writel(0, P4SEG_STORE_QUE + 0);   \
+        __raw_writel(0, P4SEG_STORE_QUE + 8);   \
 } while (0);
 
 /**
@@ -123,8 +123,8 @@ static int __sq_remap(struct sq_mapping *map, unsigned long flags)
          * straightforward, as we can just load up each queue's QACR with
          * the physical address appropriately masked.
          */
-        ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0);
-        ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1);
+        __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0);
+        __raw_writel(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1);
 #endif
 
         return 0;
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index ddc235ca9664..86aae60677dc 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -35,7 +35,7 @@ static struct clk_ops sh7757_master_clk_ops = {
 
 static void module_clk_recalc(struct clk *clk)
 {
-        int idx = ctrl_inl(FRQCR) & 0x0000000f;
+        int idx = __raw_readl(FRQCR) & 0x0000000f;
         clk->rate = clk->parent->rate / p1fc_divisors[idx];
 }
 
@@ -45,7 +45,7 @@ static struct clk_ops sh7757_module_clk_ops = {
 
 static void bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) >> 8) & 0x0000000f;
+        int idx = (__raw_readl(FRQCR) >> 8) & 0x0000000f;
         clk->rate = clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -55,7 +55,7 @@ static struct clk_ops sh7757_bus_clk_ops = {
 
 static void cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) >> 20) & 0x0000000f;
+        int idx = (__raw_readl(FRQCR) >> 20) & 0x0000000f;
         clk->rate = clk->parent->rate / ifc_divisors[idx];
 }
 
@@ -78,7 +78,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static void shyway_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) >> 12) & 0x0000000f;
+        int idx = (__raw_readl(FRQCR) >> 12) & 0x0000000f;
         clk->rate = clk->parent->rate / sfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 370cd47642ef..9f401163e71e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -22,7 +22,7 @@ static int cfc_divisors[] = { 1, 1, 4, 1, 1, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= p0fc_divisors[(ctrl_inl(FRQCR) >> 4) & 0x07];
+        clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07];
 }
 
 static struct clk_ops sh7763_master_clk_ops = {
@@ -31,7 +31,7 @@ static struct clk_ops sh7763_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 4) & 0x07);
+        int idx = ((__raw_readl(FRQCR) >> 4) & 0x07);
         return clk->parent->rate / p0fc_divisors[idx];
 }
 
@@ -41,7 +41,7 @@ static struct clk_ops sh7763_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 16) & 0x07);
+        int idx = ((__raw_readl(FRQCR) >> 16) & 0x07);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -68,7 +68,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static unsigned long shyway_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 20) & 0x07);
+        int idx = ((__raw_readl(FRQCR) >> 20) & 0x07);
         return clk->parent->rate / cfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
index e0b896769205..9e3354365d40 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
@@ -21,7 +21,7 @@ static int pfc_divisors[] = { 1, 8, 1,10,12,16, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> 28) & 0x000f];
+        clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f];
 }
 
 static struct clk_ops sh7770_master_clk_ops = {
@@ -30,7 +30,7 @@ static struct clk_ops sh7770_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 28) & 0x000f);
+        int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -40,7 +40,7 @@ static struct clk_ops sh7770_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) & 0x000f);
+        int idx = (__raw_readl(FRQCR) & 0x000f);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -50,7 +50,7 @@ static struct clk_ops sh7770_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 24) & 0x000f);
+        int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index a249d823578e..150963a6001e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -22,7 +22,7 @@ static int cfc_divisors[] = { 1, 1, 4, 1, 6, 1, 1, 1 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[ctrl_inl(FRQCR) & 0x0003];
+        clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003];
 }
 
 static struct clk_ops sh7780_master_clk_ops = {
@@ -31,7 +31,7 @@ static struct clk_ops sh7780_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQCR) & 0x0003);
+        int idx = (__raw_readl(FRQCR) & 0x0003);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -41,7 +41,7 @@ static struct clk_ops sh7780_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 16) & 0x0007);
+        int idx = ((__raw_readl(FRQCR) >> 16) & 0x0007);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -51,7 +51,7 @@ static struct clk_ops sh7780_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 24) & 0x0001);
+        int idx = ((__raw_readl(FRQCR) >> 24) & 0x0001);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
@@ -74,7 +74,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static unsigned long shyway_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> 20) & 0x0007);
+        int idx = ((__raw_readl(FRQCR) >> 20) & 0x0007);
         return clk->parent->rate / cfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index 23c27d32d982..e75c57bdfa5e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -33,7 +33,7 @@ static int cfc_divisors[] = { 1, 1, 4, 6 };
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate *= pfc_divisors[(ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK];
+        clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK];
 }
 
 static struct clk_ops shx3_master_clk_ops = {
@@ -42,7 +42,7 @@ static struct clk_ops shx3_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK);
         return clk->parent->rate / pfc_divisors[idx];
 }
 
@@ -52,7 +52,7 @@ static struct clk_ops shx3_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> BFC_POS) & BFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> BFC_POS) & BFC_MSK);
         return clk->parent->rate / bfc_divisors[idx];
 }
 
@@ -62,7 +62,7 @@ static struct clk_ops shx3_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> IFC_POS) & IFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> IFC_POS) & IFC_MSK);
         return clk->parent->rate / ifc_divisors[idx];
 }
 
@@ -85,7 +85,7 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 
 static unsigned long shyway_clk_recalc(struct clk *clk)
 {
-        int idx = ((ctrl_inl(FRQCR) >> CFC_POS) & CFC_MSK);
+        int idx = ((__raw_readl(FRQCR) >> CFC_POS) & CFC_MSK);
         return clk->parent->rate / cfc_divisors[idx];
 }
 
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 9d426258aa00..9e8620e3ad3e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -596,7 +596,7 @@ void __init plat_early_device_setup(void)
 void l2_cache_init(void)
 {
         /* Enable L2 cache */
-        ctrl_outl(L2_CACHE_ENABLE, RAMCR);
+        __raw_writel(L2_CACHE_ENABLE, RAMCR);
 }
 
 enum {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index 578e9f80271f..aa0f6e9bb89e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -718,7 +718,7 @@ void __init plat_early_device_setup(void)
 void l2_cache_init(void)
 {
         /* Enable L2 cache */
-        ctrl_outl(L2_CACHE_ENABLE, RAMCR);
+        __raw_writel(L2_CACHE_ENABLE, RAMCR);
 }
 
 enum {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 37e32efbbaa7..e75edf58796a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -487,17 +487,17 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7757-irl4567", vectors_irl4567,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ3-0 + IRQ7-4 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -507,32 +507,32 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ7654:
                 /* select IRQ mode for IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq4567);
                 break;
         case IRQ_MODE_IRQ3210:
                 /* select IRQ mode for IRL3-0 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq0123);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl4567);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl0123);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 6aba26fec416..7f6b0a5f7f82 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -538,11 +538,11 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7763-irl3210", irl_vectors,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ7-0 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         register_intc_controller(&intc_desc);
 }
@@ -552,27 +552,27 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ:
                 /* select IRQ mode for IRL3-0 + IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
                 register_intc_controller(&intc_irq_desc);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl7654_desc);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl3210_desc);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index c1643bc9590d..86d681ecf90e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -694,17 +694,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ7-0 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -714,27 +714,27 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ:
                 /* select IRQ mode for IRL3-0 + IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
                 register_intc_controller(&intc_irq_desc);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl7654_desc);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl3210_desc);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index c310558490d5..f8f21618d785 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -461,17 +461,17 @@ static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ7-0 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -481,27 +481,27 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ:
                 /* select IRQ mode for IRL3-0 + IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
                 register_intc_controller(&intc_irq_desc);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl7654_desc);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_irl3210_desc);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index f685b9b21999..23448d8c6711 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -541,17 +541,17 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ3-0 + IRQ7-4 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         /* disable holding function, ie enable "SH-4 Mode" */
-        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -561,32 +561,32 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ7654:
                 /* select IRQ mode for IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq4567);
                 break;
         case IRQ_MODE_IRQ3210:
                 /* select IRQ mode for IRL3-0 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq0123);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl4567);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl0123);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 71673487ace0..7e585320710a 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -867,14 +867,14 @@ static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7786-irl4567", vectors_irl4567,
 void __init plat_irq_setup(void)
 {
         /* disable IRQ3-0 + IRQ7-4 */
-        ctrl_outl(0xff000000, INTC_INTMSK0);
+        __raw_writel(0xff000000, INTC_INTMSK0);
 
         /* disable IRL3-0 + IRL7-4 */
-        ctrl_outl(0xc0000000, INTC_INTMSK1);
-        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+        __raw_writel(0xc0000000, INTC_INTMSK1);
+        __raw_writel(0xfffefffe, INTC_INTMSK2);
 
         /* select IRL mode for IRL3-0 + IRL7-4 */
-        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+        __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
 
         register_intc_controller(&intc_desc);
 }
@@ -884,32 +884,32 @@ void __init plat_irq_setup_pins(int mode)
         switch (mode) {
         case IRQ_MODE_IRQ7654:
                 /* select IRQ mode for IRL7-4 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq4567);
                 break;
         case IRQ_MODE_IRQ3210:
                 /* select IRQ mode for IRL3-0 */
-                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
                 register_intc_controller(&intc_desc_irq0123);
                 break;
         case IRQ_MODE_IRL7654:
                 /* enable IRL7-4 but don't provide any masking */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
-                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL3210:
                 /* enable IRL0-3 but don't provide any masking */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
-                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0xfffe0000, INTC_INTMSKCLR2);
                 break;
         case IRQ_MODE_IRL7654_MASK:
                 /* enable IRL7-4 and mask using cpu intc controller */
-                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                __raw_writel(0x40000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl4567);
                 break;
         case IRQ_MODE_IRL3210_MASK:
                 /* enable IRL0-3 and mask using cpu intc controller */
-                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                __raw_writel(0x80000000, INTC_INTMSKCLR1);
                 register_intc_controller(&intc_desc_irl0123);
                 break;
         default:
diff --git a/arch/sh/kernel/cpu/sh5/clock-sh5.c b/arch/sh/kernel/cpu/sh5/clock-sh5.c
index 7f864ebc51d3..9cfc19b8dbe4 100644
--- a/arch/sh/kernel/cpu/sh5/clock-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/clock-sh5.c
@@ -24,7 +24,7 @@ static unsigned long cprc_base;
 
 static void master_clk_init(struct clk *clk)
 {
-        int idx = (ctrl_inl(cprc_base + 0x00) >> 6) & 0x0007;
+        int idx = (__raw_readl(cprc_base + 0x00) >> 6) & 0x0007;
         clk->rate *= ifc_table[idx];
 }
 
@@ -34,7 +34,7 @@ static struct clk_ops sh5_master_clk_ops = {
 
 static unsigned long module_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(cprc_base) >> 12) & 0x0007;
+        int idx = (__raw_readw(cprc_base) >> 12) & 0x0007;
         return clk->parent->rate / ifc_table[idx];
 }
 
@@ -44,7 +44,7 @@ static struct clk_ops sh5_module_clk_ops = {
 
 static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(cprc_base) >> 3) & 0x0007;
+        int idx = (__raw_readw(cprc_base) >> 3) & 0x0007;
         return clk->parent->rate / ifc_table[idx];
 }
 
@@ -54,7 +54,7 @@ static struct clk_ops sh5_bus_clk_ops = {
 
 static unsigned long cpu_clk_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inw(cprc_base) & 0x0007);
+        int idx = (__raw_readw(cprc_base) & 0x0007);
         return clk->parent->rate / ifc_table[idx];
 }