diff options
| author | Ryusuke Sakato <sakato.ryusuke@renesas.com> | 2007-05-06 21:48:56 -0400 |
|---|---|---|
| committer | Paul Mundt <lethal@hera.kernel.org> | 2007-05-06 22:11:57 -0400 |
| commit | 39374aadcd0159b4744ab456f4efa100bea84bd4 (patch) | |
| tree | abc7f4066e3404cf12e50688f558e0f9afd1de9d /arch/sh/kernel/cpu/sh4a | |
| parent | 9c37dc633016e9ebdc39adba0737b390e0de1507 (diff) | |
sh: R7785RP board updates.
Some fixups for the R7785RP board. Gets iVDR working.
Signed-off-by: Ryusuke Sakato <sakato.ryusuke@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a')
| -rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7785.c | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c index c9ae6592f098..07b0de82cfe6 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c | |||
| @@ -75,21 +75,26 @@ __initcall(sh7785_devices_setup); | |||
| 75 | static struct intc2_data intc2_irq_table[] = { | 75 | static struct intc2_data intc2_irq_table[] = { |
| 76 | { 28, 0, 24, 0, 0, 2 }, /* TMU0 */ | 76 | { 28, 0, 24, 0, 0, 2 }, /* TMU0 */ |
| 77 | 77 | ||
| 78 | { 40, 8, 24, 0, 3, 3 }, /* SCIF0 ERI */ | 78 | { 40, 8, 24, 0, 2, 3 }, /* SCIF0 ERI */ |
| 79 | { 41, 8, 24, 0, 3, 3 }, /* SCIF0 RXI */ | 79 | { 41, 8, 24, 0, 2, 3 }, /* SCIF0 RXI */ |
| 80 | { 42, 8, 24, 0, 3, 3 }, /* SCIF0 BRI */ | 80 | { 42, 8, 24, 0, 2, 3 }, /* SCIF0 BRI */ |
| 81 | { 43, 8, 24, 0, 3, 3 }, /* SCIF0 TXI */ | 81 | { 43, 8, 24, 0, 2, 3 }, /* SCIF0 TXI */ |
| 82 | 82 | ||
| 83 | { 76, 8, 16, 0, 4, 3 }, /* SCIF1 ERI */ | 83 | { 44, 8, 16, 0, 3, 3 }, /* SCIF1 ERI */ |
| 84 | { 77, 8, 16, 0, 4, 3 }, /* SCIF1 RXI */ | 84 | { 45, 8, 16, 0, 3, 3 }, /* SCIF1 RXI */ |
| 85 | { 78, 8, 16, 0, 4, 3 }, /* SCIF1 BRI */ | 85 | { 46, 8, 16, 0, 3, 3 }, /* SCIF1 BRI */ |
| 86 | { 79, 8, 16, 0, 4, 3 }, /* SCIF1 TXI */ | 86 | { 47, 8, 16, 0, 3, 3 }, /* SCIF1 TXI */ |
| 87 | 87 | ||
| 88 | { 64, 0x14, 8, 0, 14, 2 }, /* PCIC0 */ | 88 | { 64, 0x14, 8, 0, 14, 2 }, /* PCIC0 */ |
| 89 | { 65, 0x14, 0, 0, 15, 2 }, /* PCIC1 */ | 89 | { 65, 0x14, 0, 0, 15, 2 }, /* PCIC1 */ |
| 90 | { 66, 0x18, 24, 0, 16, 2 }, /* PCIC2 */ | 90 | { 66, 0x18, 24, 0, 16, 2 }, /* PCIC2 */ |
| 91 | { 67, 0x18, 16, 0, 17, 2 }, /* PCIC3 */ | 91 | { 67, 0x18, 16, 0, 17, 2 }, /* PCIC3 */ |
| 92 | { 68, 0x18, 8, 0, 18, 2 }, /* PCIC4 */ | 92 | { 68, 0x18, 8, 0, 18, 2 }, /* PCIC4 */ |
| 93 | |||
| 94 | { 60, 8, 8, 0, 4, 3 }, /* SCIF2 ERI, RXI, BRI, TXI */ | ||
| 95 | { 60, 8, 0, 0, 5, 3 }, /* SCIF3 ERI, RXI, BRI, TXI */ | ||
| 96 | { 60, 12, 24, 0, 6, 3 }, /* SCIF4 ERI, RXI, BRI, TXI */ | ||
| 97 | { 60, 12, 16, 0, 7, 3 }, /* SCIF5 ERI, RXI, BRI, TXI */ | ||
| 93 | }; | 98 | }; |
| 94 | 99 | ||
| 95 | void __init init_IRQ_intc2(void) | 100 | void __init init_IRQ_intc2(void) |