diff options
author | Magnus Damm <damm@igel.co.jp> | 2007-08-16 11:45:35 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2007-09-20 22:57:50 -0400 |
commit | 5c37e025352b993d8726b0207ff2270b2f2bc7d6 (patch) | |
tree | 87463d1c79600c37d3df06cbdbdf14bdc6de5094 /arch/sh/kernel/cpu/sh4a/setup-sh7780.c | |
parent | 46420e49c9fd76defecfb3f048ab20c5a72dfd0a (diff) |
sh: intc - mark data structures as __initdata
With the intc core improved it is now possible to put the intc data
structures in the initdata section.
Version two of this patch puts the __initdata inside DECLARE_INTC_DESC()
and removes the __initdata included in the board specific r2d code.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7780.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7780.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c index c9965c0dde6d..d84c4575fc0a 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c | |||
@@ -114,7 +114,7 @@ enum { | |||
114 | PCIC5, SCIF1, MMCIF, TMU345, FLCTL, GPIO, | 114 | PCIC5, SCIF1, MMCIF, TMU345, FLCTL, GPIO, |
115 | }; | 115 | }; |
116 | 116 | ||
117 | static struct intc_vect vectors[] = { | 117 | static struct intc_vect vectors[] __initdata = { |
118 | INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), | 118 | INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0), |
119 | INTC_VECT(RTC_CUI, 0x4c0), | 119 | INTC_VECT(RTC_CUI, 0x4c0), |
120 | INTC_VECT(WDT, 0x560), | 120 | INTC_VECT(WDT, 0x560), |
@@ -150,7 +150,7 @@ static struct intc_vect vectors[] = { | |||
150 | INTC_VECT(GPIOI2, 0xfc0), INTC_VECT(GPIOI3, 0xfe0), | 150 | INTC_VECT(GPIOI2, 0xfc0), INTC_VECT(GPIOI3, 0xfe0), |
151 | }; | 151 | }; |
152 | 152 | ||
153 | static struct intc_group groups[] = { | 153 | static struct intc_group groups[] __initdata = { |
154 | INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), | 154 | INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI), |
155 | INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI), | 155 | INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI), |
156 | INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, | 156 | INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, |
@@ -167,12 +167,12 @@ static struct intc_group groups[] = { | |||
167 | INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), | 167 | INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), |
168 | }; | 168 | }; |
169 | 169 | ||
170 | static struct intc_prio priorities[] = { | 170 | static struct intc_prio priorities[] __initdata = { |
171 | INTC_PRIO(SCIF0, 3), | 171 | INTC_PRIO(SCIF0, 3), |
172 | INTC_PRIO(SCIF1, 3), | 172 | INTC_PRIO(SCIF1, 3), |
173 | }; | 173 | }; |
174 | 174 | ||
175 | static struct intc_mask_reg mask_registers[] = { | 175 | static struct intc_mask_reg mask_registers[] __initdata = { |
176 | { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */ | 176 | { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */ |
177 | { 0, 0, 0, 0, 0, 0, GPIO, FLCTL, | 177 | { 0, 0, 0, 0, 0, 0, GPIO, FLCTL, |
178 | SSI, MMCIF, HSPI, SIOF, PCIC5, PCIINTD, PCIINTC, PCIINTB, | 178 | SSI, MMCIF, HSPI, SIOF, PCIC5, PCIINTD, PCIINTC, PCIINTB, |
@@ -180,7 +180,7 @@ static struct intc_mask_reg mask_registers[] = { | |||
180 | HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } }, | 180 | HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } }, |
181 | }; | 181 | }; |
182 | 182 | ||
183 | static struct intc_prio_reg prio_registers[] = { | 183 | static struct intc_prio_reg prio_registers[] __initdata = { |
184 | { 0xffd40000, 0, 32, 8, /* INT2PRI0 */ { TMU0, TMU1, | 184 | { 0xffd40000, 0, 32, 8, /* INT2PRI0 */ { TMU0, TMU1, |
185 | TMU2, TMU2_TICPI } }, | 185 | TMU2, TMU2_TICPI } }, |
186 | { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } }, | 186 | { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } }, |
@@ -199,24 +199,24 @@ static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups, priorities, | |||
199 | 199 | ||
200 | /* Support for external interrupt pins in IRQ mode */ | 200 | /* Support for external interrupt pins in IRQ mode */ |
201 | 201 | ||
202 | static struct intc_vect irq_vectors[] = { | 202 | static struct intc_vect irq_vectors[] __initdata = { |
203 | INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280), | 203 | INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280), |
204 | INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300), | 204 | INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300), |
205 | INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380), | 205 | INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380), |
206 | INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200), | 206 | INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200), |
207 | }; | 207 | }; |
208 | 208 | ||
209 | static struct intc_mask_reg irq_mask_registers[] = { | 209 | static struct intc_mask_reg irq_mask_registers[] __initdata = { |
210 | { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */ | 210 | { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */ |
211 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | 211 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, |
212 | }; | 212 | }; |
213 | 213 | ||
214 | static struct intc_prio_reg irq_prio_registers[] = { | 214 | static struct intc_prio_reg irq_prio_registers[] __initdata = { |
215 | { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3, | 215 | { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3, |
216 | IRQ4, IRQ5, IRQ6, IRQ7 } }, | 216 | IRQ4, IRQ5, IRQ6, IRQ7 } }, |
217 | }; | 217 | }; |
218 | 218 | ||
219 | static struct intc_sense_reg irq_sense_registers[] = { | 219 | static struct intc_sense_reg irq_sense_registers[] __initdata = { |
220 | { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3, | 220 | { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3, |
221 | IRQ4, IRQ5, IRQ6, IRQ7 } }, | 221 | IRQ4, IRQ5, IRQ6, IRQ7 } }, |
222 | }; | 222 | }; |
@@ -227,7 +227,7 @@ static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors, | |||
227 | 227 | ||
228 | /* External interrupt pins in IRL mode */ | 228 | /* External interrupt pins in IRL mode */ |
229 | 229 | ||
230 | static struct intc_vect irl_vectors[] = { | 230 | static struct intc_vect irl_vectors[] __initdata = { |
231 | INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220), | 231 | INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220), |
232 | INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260), | 232 | INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260), |
233 | INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0), | 233 | INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0), |
@@ -238,7 +238,7 @@ static struct intc_vect irl_vectors[] = { | |||
238 | INTC_VECT(IRL_HHHL, 0x3c0), | 238 | INTC_VECT(IRL_HHHL, 0x3c0), |
239 | }; | 239 | }; |
240 | 240 | ||
241 | static struct intc_mask_reg irl3210_mask_registers[] = { | 241 | static struct intc_mask_reg irl3210_mask_registers[] __initdata = { |
242 | { 0xffd00080, 0xffd00084, 32, /* INTMSK2 / INTMSKCLR2 */ | 242 | { 0xffd00080, 0xffd00084, 32, /* INTMSK2 / INTMSKCLR2 */ |
243 | { IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH, | 243 | { IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH, |
244 | IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH, | 244 | IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH, |
@@ -246,7 +246,7 @@ static struct intc_mask_reg irl3210_mask_registers[] = { | |||
246 | IRL_HHLL, IRL_HHLH, IRL_HHHL, } }, | 246 | IRL_HHLL, IRL_HHLH, IRL_HHHL, } }, |
247 | }; | 247 | }; |
248 | 248 | ||
249 | static struct intc_mask_reg irl7654_mask_registers[] = { | 249 | static struct intc_mask_reg irl7654_mask_registers[] __initdata = { |
250 | { 0xffd00080, 0xffd00084, 32, /* INTMSK2 / INTMSKCLR2 */ | 250 | { 0xffd00080, 0xffd00084, 32, /* INTMSK2 / INTMSKCLR2 */ |
251 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | 251 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
252 | IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH, | 252 | IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH, |