diff options
author | Paul Mundt <lethal@linux-sh.org> | 2011-01-13 01:21:27 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-01-13 01:21:27 -0500 |
commit | ef7fc9026fe6adef13870c6b2cb4642b6193af67 (patch) | |
tree | 6f41f996de6e76161fdfc60a197ec42f0aa0ec7d /arch/sh/kernel/cpu/sh4a/setup-sh7724.c | |
parent | fac6c2a891a3e7255e4440f09a4c7da954043ba9 (diff) | |
parent | f43dc23d5ea91fca257be02138a255f02d98e806 (diff) |
Merge branch 'common/serial-rework' into sh-latest
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/setup-sh7724.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7724.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c index c598a7f61b7f..0333fe9e3881 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c | |||
@@ -257,6 +257,8 @@ static struct platform_device dma1_device = { | |||
257 | static struct plat_sci_port scif0_platform_data = { | 257 | static struct plat_sci_port scif0_platform_data = { |
258 | .mapbase = 0xffe00000, | 258 | .mapbase = 0xffe00000, |
259 | .flags = UPF_BOOT_AUTOCONF, | 259 | .flags = UPF_BOOT_AUTOCONF, |
260 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | ||
261 | .scbrr_algo_id = SCBRR_ALGO_2, | ||
260 | .type = PORT_SCIF, | 262 | .type = PORT_SCIF, |
261 | .irqs = { 80, 80, 80, 80 }, | 263 | .irqs = { 80, 80, 80, 80 }, |
262 | }; | 264 | }; |
@@ -272,6 +274,8 @@ static struct platform_device scif0_device = { | |||
272 | static struct plat_sci_port scif1_platform_data = { | 274 | static struct plat_sci_port scif1_platform_data = { |
273 | .mapbase = 0xffe10000, | 275 | .mapbase = 0xffe10000, |
274 | .flags = UPF_BOOT_AUTOCONF, | 276 | .flags = UPF_BOOT_AUTOCONF, |
277 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | ||
278 | .scbrr_algo_id = SCBRR_ALGO_2, | ||
275 | .type = PORT_SCIF, | 279 | .type = PORT_SCIF, |
276 | .irqs = { 81, 81, 81, 81 }, | 280 | .irqs = { 81, 81, 81, 81 }, |
277 | }; | 281 | }; |
@@ -287,6 +291,8 @@ static struct platform_device scif1_device = { | |||
287 | static struct plat_sci_port scif2_platform_data = { | 291 | static struct plat_sci_port scif2_platform_data = { |
288 | .mapbase = 0xffe20000, | 292 | .mapbase = 0xffe20000, |
289 | .flags = UPF_BOOT_AUTOCONF, | 293 | .flags = UPF_BOOT_AUTOCONF, |
294 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, | ||
295 | .scbrr_algo_id = SCBRR_ALGO_2, | ||
290 | .type = PORT_SCIF, | 296 | .type = PORT_SCIF, |
291 | .irqs = { 82, 82, 82, 82 }, | 297 | .irqs = { 82, 82, 82, 82 }, |
292 | }; | 298 | }; |
@@ -302,6 +308,8 @@ static struct platform_device scif2_device = { | |||
302 | static struct plat_sci_port scif3_platform_data = { | 308 | static struct plat_sci_port scif3_platform_data = { |
303 | .mapbase = 0xa4e30000, | 309 | .mapbase = 0xa4e30000, |
304 | .flags = UPF_BOOT_AUTOCONF, | 310 | .flags = UPF_BOOT_AUTOCONF, |
311 | .scscr = SCSCR_RE | SCSCR_TE, | ||
312 | .scbrr_algo_id = SCBRR_ALGO_3, | ||
305 | .type = PORT_SCIFA, | 313 | .type = PORT_SCIFA, |
306 | .irqs = { 56, 56, 56, 56 }, | 314 | .irqs = { 56, 56, 56, 56 }, |
307 | }; | 315 | }; |
@@ -317,6 +325,8 @@ static struct platform_device scif3_device = { | |||
317 | static struct plat_sci_port scif4_platform_data = { | 325 | static struct plat_sci_port scif4_platform_data = { |
318 | .mapbase = 0xa4e40000, | 326 | .mapbase = 0xa4e40000, |
319 | .flags = UPF_BOOT_AUTOCONF, | 327 | .flags = UPF_BOOT_AUTOCONF, |
328 | .scscr = SCSCR_RE | SCSCR_TE, | ||
329 | .scbrr_algo_id = SCBRR_ALGO_3, | ||
320 | .type = PORT_SCIFA, | 330 | .type = PORT_SCIFA, |
321 | .irqs = { 88, 88, 88, 88 }, | 331 | .irqs = { 88, 88, 88, 88 }, |
322 | }; | 332 | }; |
@@ -332,6 +342,8 @@ static struct platform_device scif4_device = { | |||
332 | static struct plat_sci_port scif5_platform_data = { | 342 | static struct plat_sci_port scif5_platform_data = { |
333 | .mapbase = 0xa4e50000, | 343 | .mapbase = 0xa4e50000, |
334 | .flags = UPF_BOOT_AUTOCONF, | 344 | .flags = UPF_BOOT_AUTOCONF, |
345 | .scscr = SCSCR_RE | SCSCR_TE, | ||
346 | .scbrr_algo_id = SCBRR_ALGO_3, | ||
335 | .type = PORT_SCIFA, | 347 | .type = PORT_SCIFA, |
336 | .irqs = { 109, 109, 109, 109 }, | 348 | .irqs = { 109, 109, 109, 109 }, |
337 | }; | 349 | }; |