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authorMagnus Damm <damm@opensource.se>2010-05-11 03:06:13 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-05-13 04:35:05 -0400
commit914ebf0bbb24696cd7eecee8942efecca5653126 (patch)
tree5ca384ba927ada56c6a3462977dc6268d6f72b16 /arch/sh/kernel/cpu/sh4a/clock-sh7724.c
parent1fe3d19883b1f6a243b03456a47e0fdc9629bea6 (diff)
sh: get rid of div4 clock name
Remove the name parameter from SH_CLK_DIV4() and adjust the processor specific code. The lookup happens using clkdev so the name is unused. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/clock-sh7724.c')
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index b9ed211dae79..6095f50fca8a 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -153,15 +153,15 @@ static struct clk_div4_table div4_table = {
153 153
154enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR }; 154enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR };
155 155
156#define DIV4(_str, _reg, _bit, _mask, _flags) \ 156#define DIV4(_reg, _bit, _mask, _flags) \
157 SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags) 157 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
158 158
159struct clk div4_clks[DIV4_NR] = { 159struct clk div4_clks[DIV4_NR] = {
160 [DIV4_I] = DIV4("cpu_clk", FRQCRA, 20, 0x2f7d, CLK_ENABLE_ON_INIT), 160 [DIV4_I] = DIV4(FRQCRA, 20, 0x2f7d, CLK_ENABLE_ON_INIT),
161 [DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT), 161 [DIV4_SH] = DIV4(FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT),
162 [DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT), 162 [DIV4_B] = DIV4(FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT),
163 [DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0), 163 [DIV4_P] = DIV4(FRQCRA, 0, 0x2f7c, 0),
164 [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT), 164 [DIV4_M1] = DIV4(FRQCRB, 4, 0x2f7c, CLK_ENABLE_ON_INIT),
165}; 165};
166 166
167enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR }; 167enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR };