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authorMagnus Damm <damm@opensource.se>2010-05-10 10:01:55 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-05-10 22:48:51 -0400
commit098ec49b684313cbd2ba1e24db61cfda9788ff73 (patch)
treeae7bbb7ace8267aff987016cadfafa0fa0174eee /arch/sh/kernel/cpu/sh4a/clock-sh7723.c
parent08134c3c629bf128245f721391b96a858d88e997 (diff)
sh: tie in div6 clocks using clkdev
Use clkdev for div6 lookup on SH-Mobile processors: sh7343/sh7366/sh7722/sh7723/sh7724 Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4a/clock-sh7723.c')
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7723.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index b4331854f57b..edb2414896b1 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -149,8 +149,10 @@ struct clk div4_reparent_clks[DIV4_REPARENT_NR] = {
149 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0), 149 [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0),
150 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0), 150 [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0),
151}; 151};
152struct clk div6_clks[] = { 152enum { DIV6_V, DIV6_NR };
153 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 153
154struct clk div6_clks[DIV6_NR] = {
155 [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
154}; 156};
155 157
156static struct clk mstp_clks[] = { 158static struct clk mstp_clks[] = {
@@ -209,6 +211,9 @@ static struct clk mstp_clks[] = {
209#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } 211#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
210 212
211static struct clk_lookup lookups[] = { 213static struct clk_lookup lookups[] = {
214 /* DIV6 clocks */
215 CLKDEV_CON_ID("video_clk", &div6_clks[DIV6_V]),
216
212 /* MSTP clocks */ 217 /* MSTP clocks */
213 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]), 218 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
214 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]), 219 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
@@ -341,7 +346,7 @@ int __init arch_clk_init(void)
341 DIV4_REPARENT_NR, &div4_table); 346 DIV4_REPARENT_NR, &div4_table);
342 347
343 if (!ret) 348 if (!ret)
344 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 349 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
345 350
346 if (!ret) 351 if (!ret)
347 ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); 352 ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR);