diff options
author | Paul Mundt <lethal@linux-sh.org> | 2007-03-12 03:15:22 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2007-03-12 03:15:22 -0400 |
commit | ffe1b4e9f436fd7bb784f3bf7ee963c149fbca5f (patch) | |
tree | 53e5404fda007af8efbb985a4910cbaa39a6b747 /arch/sh/kernel/cpu/sh4 | |
parent | fbd168461e65e73016c34b2eacd76d87218c8a9f (diff) |
sh: Fix SH-3 cache entry_mask and way_size calculation.
The code for performing the calculation was only in the SH-4 probe
path, move it out to the common path so the other parts get this
right too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh4')
-rw-r--r-- | arch/sh/kernel/cpu/sh4/probe.c | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index 9d28c88d2f9d..58950de2696d 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c | |||
@@ -195,13 +195,6 @@ int __init detect_cpu_and_cache_system(void) | |||
195 | 195 | ||
196 | } | 196 | } |
197 | 197 | ||
198 | /* Setup the rest of the I-cache info */ | ||
199 | current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr - | ||
200 | current_cpu_data.icache.linesz; | ||
201 | |||
202 | current_cpu_data.icache.way_size = current_cpu_data.icache.sets * | ||
203 | current_cpu_data.icache.linesz; | ||
204 | |||
205 | /* And the rest of the D-cache */ | 198 | /* And the rest of the D-cache */ |
206 | if (current_cpu_data.dcache.ways > 1) { | 199 | if (current_cpu_data.dcache.ways > 1) { |
207 | size = sizes[(cvr >> 16) & 0xf]; | 200 | size = sizes[(cvr >> 16) & 0xf]; |
@@ -209,12 +202,6 @@ int __init detect_cpu_and_cache_system(void) | |||
209 | current_cpu_data.dcache.sets = (size >> 6); | 202 | current_cpu_data.dcache.sets = (size >> 6); |
210 | } | 203 | } |
211 | 204 | ||
212 | current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr - | ||
213 | current_cpu_data.dcache.linesz; | ||
214 | |||
215 | current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets * | ||
216 | current_cpu_data.dcache.linesz; | ||
217 | |||
218 | /* | 205 | /* |
219 | * Setup the L2 cache desc | 206 | * Setup the L2 cache desc |
220 | * | 207 | * |