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authorPaul Mundt <lethal@linux-sh.org>2011-01-13 01:06:28 -0500
committerPaul Mundt <lethal@linux-sh.org>2011-01-13 01:06:28 -0500
commitf43dc23d5ea91fca257be02138a255f02d98e806 (patch)
treeb29722f6e965316e90ac97abf79923ced250dc21 /arch/sh/kernel/cpu/sh4/setup-sh7750.c
parentf8e53553f452dcbf67cb89c8cba63a1cd6eb4cc0 (diff)
parent4162cf64973df51fc885825bc9ca4d055891c49f (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6 into common/serial-rework
Conflicts: arch/sh/kernel/cpu/sh2/setup-sh7619.c arch/sh/kernel/cpu/sh2a/setup-mxg.c arch/sh/kernel/cpu/sh2a/setup-sh7201.c arch/sh/kernel/cpu/sh2a/setup-sh7203.c arch/sh/kernel/cpu/sh2a/setup-sh7206.c arch/sh/kernel/cpu/sh3/setup-sh7705.c arch/sh/kernel/cpu/sh3/setup-sh770x.c arch/sh/kernel/cpu/sh3/setup-sh7710.c arch/sh/kernel/cpu/sh3/setup-sh7720.c arch/sh/kernel/cpu/sh4/setup-sh4-202.c arch/sh/kernel/cpu/sh4/setup-sh7750.c arch/sh/kernel/cpu/sh4/setup-sh7760.c arch/sh/kernel/cpu/sh4a/setup-sh7343.c arch/sh/kernel/cpu/sh4a/setup-sh7366.c arch/sh/kernel/cpu/sh4a/setup-sh7722.c arch/sh/kernel/cpu/sh4a/setup-sh7723.c arch/sh/kernel/cpu/sh4a/setup-sh7724.c arch/sh/kernel/cpu/sh4a/setup-sh7763.c arch/sh/kernel/cpu/sh4a/setup-sh7770.c arch/sh/kernel/cpu/sh4a/setup-sh7780.c arch/sh/kernel/cpu/sh4a/setup-sh7785.c arch/sh/kernel/cpu/sh4a/setup-sh7786.c arch/sh/kernel/cpu/sh4a/setup-shx3.c arch/sh/kernel/cpu/sh5/setup-sh5.c drivers/serial/sh-sci.c drivers/serial/sh-sci.h include/linux/serial_sci.h
Diffstat (limited to 'arch/sh/kernel/cpu/sh4/setup-sh7750.c')
-rw-r--r--arch/sh/kernel/cpu/sh4/setup-sh7750.c36
1 files changed, 15 insertions, 21 deletions
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index 51a945e0d72c..c2b0aaaedcae 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -39,16 +39,17 @@ static struct platform_device rtc_device = {
39static struct plat_sci_port sci_platform_data = { 39static struct plat_sci_port sci_platform_data = {
40 .mapbase = 0xffe00000, 40 .mapbase = 0xffe00000,
41 .flags = UPF_BOOT_AUTOCONF, 41 .flags = UPF_BOOT_AUTOCONF,
42 .type = PORT_SCI,
43 .scscr = SCSCR_TE | SCSCR_RE, 42 .scscr = SCSCR_TE | SCSCR_RE,
44 .scbrr_algo_id = SCBRR_ALGO_2, 43 .scbrr_algo_id = SCBRR_ALGO_2,
44 .type = PORT_SCI,
45 .irqs = { 23, 23, 23, 0 }, 45 .irqs = { 23, 23, 23, 0 },
46}; 46};
47 47
48static struct platform_device sci_device = { 48static struct platform_device sci_device = {
49 .name = "sh-sci", 49 .name = "sh-sci",
50 .id = 0,
50 .dev = { 51 .dev = {
51 .platform_data = sci_platform_data, 52 .platform_data = &sci_platform_data,
52 }, 53 },
53}; 54};
54 55
@@ -63,22 +64,20 @@ static struct plat_sci_port scif_platform_data = {
63 64
64static struct platform_device scif_device = { 65static struct platform_device scif_device = {
65 .name = "sh-sci", 66 .name = "sh-sci",
67 .id = 1,
66 .dev = { 68 .dev = {
67 .platform_data = scif_platform_data, 69 .platform_data = &scif_platform_data,
68 }, 70 },
69}; 71};
70 72
71static struct sh_timer_config tmu0_platform_data = { 73static struct sh_timer_config tmu0_platform_data = {
72 .name = "TMU0",
73 .channel_offset = 0x04, 74 .channel_offset = 0x04,
74 .timer_bit = 0, 75 .timer_bit = 0,
75 .clk = "peripheral_clk",
76 .clockevent_rating = 200, 76 .clockevent_rating = 200,
77}; 77};
78 78
79static struct resource tmu0_resources[] = { 79static struct resource tmu0_resources[] = {
80 [0] = { 80 [0] = {
81 .name = "TMU0",
82 .start = 0xffd80008, 81 .start = 0xffd80008,
83 .end = 0xffd80013, 82 .end = 0xffd80013,
84 .flags = IORESOURCE_MEM, 83 .flags = IORESOURCE_MEM,
@@ -100,16 +99,13 @@ static struct platform_device tmu0_device = {
100}; 99};
101 100
102static struct sh_timer_config tmu1_platform_data = { 101static struct sh_timer_config tmu1_platform_data = {
103 .name = "TMU1",
104 .channel_offset = 0x10, 102 .channel_offset = 0x10,
105 .timer_bit = 1, 103 .timer_bit = 1,
106 .clk = "peripheral_clk",
107 .clocksource_rating = 200, 104 .clocksource_rating = 200,
108}; 105};
109 106
110static struct resource tmu1_resources[] = { 107static struct resource tmu1_resources[] = {
111 [0] = { 108 [0] = {
112 .name = "TMU1",
113 .start = 0xffd80014, 109 .start = 0xffd80014,
114 .end = 0xffd8001f, 110 .end = 0xffd8001f,
115 .flags = IORESOURCE_MEM, 111 .flags = IORESOURCE_MEM,
@@ -131,15 +127,12 @@ static struct platform_device tmu1_device = {
131}; 127};
132 128
133static struct sh_timer_config tmu2_platform_data = { 129static struct sh_timer_config tmu2_platform_data = {
134 .name = "TMU2",
135 .channel_offset = 0x1c, 130 .channel_offset = 0x1c,
136 .timer_bit = 2, 131 .timer_bit = 2,
137 .clk = "peripheral_clk",
138}; 132};
139 133
140static struct resource tmu2_resources[] = { 134static struct resource tmu2_resources[] = {
141 [0] = { 135 [0] = {
142 .name = "TMU2",
143 .start = 0xffd80020, 136 .start = 0xffd80020,
144 .end = 0xffd8002f, 137 .end = 0xffd8002f,
145 .flags = IORESOURCE_MEM, 138 .flags = IORESOURCE_MEM,
@@ -166,15 +159,12 @@ static struct platform_device tmu2_device = {
166 defined(CONFIG_CPU_SUBTYPE_SH7751R) 159 defined(CONFIG_CPU_SUBTYPE_SH7751R)
167 160
168static struct sh_timer_config tmu3_platform_data = { 161static struct sh_timer_config tmu3_platform_data = {
169 .name = "TMU3",
170 .channel_offset = 0x04, 162 .channel_offset = 0x04,
171 .timer_bit = 0, 163 .timer_bit = 0,
172 .clk = "peripheral_clk",
173}; 164};
174 165
175static struct resource tmu3_resources[] = { 166static struct resource tmu3_resources[] = {
176 [0] = { 167 [0] = {
177 .name = "TMU3",
178 .start = 0xfe100008, 168 .start = 0xfe100008,
179 .end = 0xfe100013, 169 .end = 0xfe100013,
180 .flags = IORESOURCE_MEM, 170 .flags = IORESOURCE_MEM,
@@ -196,15 +186,12 @@ static struct platform_device tmu3_device = {
196}; 186};
197 187
198static struct sh_timer_config tmu4_platform_data = { 188static struct sh_timer_config tmu4_platform_data = {
199 .name = "TMU4",
200 .channel_offset = 0x10, 189 .channel_offset = 0x10,
201 .timer_bit = 1, 190 .timer_bit = 1,
202 .clk = "peripheral_clk",
203}; 191};
204 192
205static struct resource tmu4_resources[] = { 193static struct resource tmu4_resources[] = {
206 [0] = { 194 [0] = {
207 .name = "TMU4",
208 .start = 0xfe100014, 195 .start = 0xfe100014,
209 .end = 0xfe10001f, 196 .end = 0xfe10001f,
210 .flags = IORESOURCE_MEM, 197 .flags = IORESOURCE_MEM,
@@ -243,7 +230,6 @@ static struct platform_device *sh7750_devices[] __initdata = {
243static int __init sh7750_devices_setup(void) 230static int __init sh7750_devices_setup(void)
244{ 231{
245 if (mach_is_rts7751r2d()) { 232 if (mach_is_rts7751r2d()) {
246 scif_platform_data.scscr |= SCSCR_CKE1;
247 platform_register_device(&scif_device); 233 platform_register_device(&scif_device);
248 } else { 234 } else {
249 platform_register_device(&sci_device); 235 platform_register_device(&sci_device);
@@ -253,7 +239,7 @@ static int __init sh7750_devices_setup(void)
253 return platform_add_devices(sh7750_devices, 239 return platform_add_devices(sh7750_devices,
254 ARRAY_SIZE(sh7750_devices)); 240 ARRAY_SIZE(sh7750_devices));
255} 241}
256__initcall(sh7750_devices_setup); 242arch_initcall(sh7750_devices_setup);
257 243
258static struct platform_device *sh7750_early_devices[] __initdata = { 244static struct platform_device *sh7750_early_devices[] __initdata = {
259 &tmu0_device, 245 &tmu0_device,
@@ -269,6 +255,14 @@ static struct platform_device *sh7750_early_devices[] __initdata = {
269 255
270void __init plat_early_device_setup(void) 256void __init plat_early_device_setup(void)
271{ 257{
258 if (mach_is_rts7751r2d()) {
259 scif_platform_data.scscr |= SCSCR_CKE1;
260 early_platform_add_devices(&scif_device, 1);
261 } else {
262 early_platform_add_devices(&sci_device, 1);
263 early_platform_add_devices(&scif_device, 1);
264 }
265
272 early_platform_add_devices(sh7750_early_devices, 266 early_platform_add_devices(sh7750_early_devices,
273 ARRAY_SIZE(sh7750_early_devices)); 267 ARRAY_SIZE(sh7750_early_devices));
274} 268}
@@ -449,7 +443,7 @@ void __init plat_irq_setup_pins(int mode)
449 443
450 switch (mode) { 444 switch (mode) {
451 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */ 445 case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
452 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 446 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
453 register_intc_controller(&intc_desc_irlm); 447 register_intc_controller(&intc_desc_irlm);
454 break; 448 break;
455 default: 449 default: