diff options
author | Magnus Damm <damm@igel.co.jp> | 2007-06-15 05:56:19 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2007-06-15 05:56:19 -0400 |
commit | 68abdbbb03476a60d932eeba0035dd5069afec38 (patch) | |
tree | de3854f76d6d9aec121c432a3cd276bb756003c9 /arch/sh/kernel/cpu/sh3 | |
parent | 50f63f2518ee68bc132d357d2b6fdb7f60ef79e0 (diff) |
sh: rework ipr code
This patch reworks the ipr code by grouping the offset array together
with the ipr_data structure in a new data structure called ipr_desc.
This new structure also contains the name of the controller in struct
irq_chip. The idea behind putting struct irq_chip in there is that we
can use offsetof() to locate the base addresses in the irq_chip
callbacks. This strategy has much in common with the recently merged
intc2 code.
One logic change has been made - the original ipr code enabled the
interrupts by default but with this patch they are all disabled by
default.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh3')
-rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh7705.c | 40 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh7709.c | 84 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh7710.c | 42 |
3 files changed, 104 insertions, 62 deletions
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c index 1983fb7ad6ea..a55b8ce2c54c 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c | |||
@@ -48,7 +48,7 @@ static int __init sh7705_devices_setup(void) | |||
48 | } | 48 | } |
49 | __initcall(sh7705_devices_setup); | 49 | __initcall(sh7705_devices_setup); |
50 | 50 | ||
51 | static struct ipr_data sh7705_ipr_map[] = { | 51 | static struct ipr_data ipr_irq_table[] = { |
52 | /* IRQ, IPR-idx, shift, priority */ | 52 | /* IRQ, IPR-idx, shift, priority */ |
53 | { 16, 0, 12, 2 }, /* TMU0 TUNI*/ | 53 | { 16, 0, 12, 2 }, /* TMU0 TUNI*/ |
54 | { 17, 0, 8, 2 }, /* TMU1 TUNI */ | 54 | { 17, 0, 8, 2 }, /* TMU1 TUNI */ |
@@ -70,25 +70,29 @@ static struct ipr_data sh7705_ipr_map[] = { | |||
70 | }; | 70 | }; |
71 | 71 | ||
72 | static unsigned long ipr_offsets[] = { | 72 | static unsigned long ipr_offsets[] = { |
73 | 0xFFFFFEE2 /* 0: IPRA */ | 73 | 0xFFFFFEE2, /* 0: IPRA */ |
74 | , 0xFFFFFEE4 /* 1: IPRB */ | 74 | 0xFFFFFEE4, /* 1: IPRB */ |
75 | , 0xA4000016 /* 2: IPRC */ | 75 | 0xA4000016, /* 2: IPRC */ |
76 | , 0xA4000018 /* 3: IPRD */ | 76 | 0xA4000018, /* 3: IPRD */ |
77 | , 0xA400001A /* 4: IPRE */ | 77 | 0xA400001A, /* 4: IPRE */ |
78 | , 0xA4080000 /* 5: IPRF */ | 78 | 0xA4080000, /* 5: IPRF */ |
79 | , 0xA4080002 /* 6: IPRG */ | 79 | 0xA4080002, /* 6: IPRG */ |
80 | , 0xA4080004 /* 7: IPRH */ | 80 | 0xA4080004, /* 7: IPRH */ |
81 | }; | 81 | }; |
82 | 82 | ||
83 | /* given the IPR index return the address of the IPR register */ | 83 | static struct ipr_desc ipr_irq_desc = { |
84 | unsigned int map_ipridx_to_addr(int idx) | 84 | .ipr_offsets = ipr_offsets, |
85 | { | 85 | .nr_offsets = ARRAY_SIZE(ipr_offsets), |
86 | if (idx >= ARRAY_SIZE(ipr_offsets)) | 86 | |
87 | return 0; | 87 | .ipr_data = ipr_irq_table, |
88 | return ipr_offsets[idx]; | 88 | .nr_irqs = ARRAY_SIZE(ipr_irq_table), |
89 | } | 89 | |
90 | .chip = { | ||
91 | .name = "IPR-sh7705", | ||
92 | }, | ||
93 | }; | ||
90 | 94 | ||
91 | void __init init_IRQ_ipr() | 95 | void __init init_IRQ_ipr(void) |
92 | { | 96 | { |
93 | make_ipr_irq(sh7705_ipr_map, ARRAY_SIZE(sh7705_ipr_map)); | 97 | register_ipr_controller(&ipr_irq_desc); |
94 | } | 98 | } |
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7709.c b/arch/sh/kernel/cpu/sh3/setup-sh7709.c index c7d7c35fc834..c0265a96e7d3 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7709.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7709.c | |||
@@ -52,32 +52,66 @@ static int __init sh7709_devices_setup(void) | |||
52 | } | 52 | } |
53 | __initcall(sh7709_devices_setup); | 53 | __initcall(sh7709_devices_setup); |
54 | 54 | ||
55 | #define IPRx(A,N) .addr=A, .shift=N | 55 | static struct ipr_data ipr_irq_table[] = { |
56 | #define IPRA(N) IPRx(0xfffffee2UL,N) | 56 | { 16, 0, 12, 2 }, /* TMU TUNI0 */ |
57 | #define IPRB(N) IPRx(0xfffffee4UL,N) | 57 | { 17, 0, 8, 4 }, /* TMU TUNI1 */ |
58 | #define IPRC(N) IPRx(0xa4000016UL,N) | 58 | { 18, 0, 4, 1 }, /* TMU TUNI1 */ |
59 | #define IPRD(N) IPRx(0xa4000018UL,N) | 59 | { 19, 0, 4, 1 }, /* TMU TUNI1 */ |
60 | #define IPRE(N) IPRx(0xa400001aUL,N) | 60 | { 20, 0, 0, 2 }, /* RTC CUI */ |
61 | 61 | { 21, 0, 0, 2 }, /* RTC CUI */ | |
62 | static struct ipr_data sh7709_ipr_map[] = { | 62 | { 22, 0, 0, 2 }, /* RTC CUI */ |
63 | [16] = { IPRA(12), 2 }, /* TMU TUNI0 */ | 63 | |
64 | [17] = { IPRA(8), 4 }, /* TMU TUNI1 */ | 64 | { 23, 1, 4, 3 }, /* SCI */ |
65 | [18 ... 19] = { IPRA(4), 1 }, /* TMU TUNI1 */ | 65 | { 24, 1, 4, 3 }, /* SCI */ |
66 | [20 ... 22] = { IPRA(0), 2 }, /* RTC CUI */ | 66 | { 25, 1, 4, 3 }, /* SCI */ |
67 | [23 ... 26] = { IPRB(4), 3 }, /* SCI */ | 67 | { 26, 1, 4, 3 }, /* SCI */ |
68 | [27] = { IPRB(12), 2 }, /* WDT ITI */ | 68 | { 27, 1, 12, 3 }, /* WDT ITI */ |
69 | [32] = { IPRC(0), 1 }, /* IRQ 0 */ | 69 | |
70 | [33] = { IPRC(4), 1 }, /* IRQ 1 */ | 70 | { 32, 2, 0, 1 }, /* IRQ 0 */ |
71 | [34] = { IPRC(8), 1 }, /* IRQ 2 APM */ | 71 | { 33, 2, 4, 1 }, /* IRQ 1 */ |
72 | [35] = { IPRC(12), 1 }, /* IRQ 3 TOUCHSCREEN */ | 72 | { 34, 2, 8, 1 }, /* IRQ 2 APM */ |
73 | [36] = { IPRD(0), 1 }, /* IRQ 4 */ | 73 | { 35, 2, 12, 1 }, /* IRQ 3 TOUCHSCREEN */ |
74 | [37] = { IPRD(4), 1 }, /* IRQ 5 */ | 74 | |
75 | [48 ... 51] = { IPRE(12), 7 }, /* DMA */ | 75 | { 36, 3, 0, 1 }, /* IRQ 4 */ |
76 | [52 ... 55] = { IPRE(8), 3 }, /* IRDA */ | 76 | { 37, 3, 4, 1 }, /* IRQ 5 */ |
77 | [56 ... 59] = { IPRE(4), 3 }, /* SCIF */ | 77 | |
78 | { 48, 4, 12, 7 }, /* DMA */ | ||
79 | { 49, 4, 12, 7 }, /* DMA */ | ||
80 | { 50, 4, 12, 7 }, /* DMA */ | ||
81 | { 51, 4, 12, 7 }, /* DMA */ | ||
82 | |||
83 | { 52, 4, 8, 3 }, /* IRDA */ | ||
84 | { 53, 4, 8, 3 }, /* IRDA */ | ||
85 | { 54, 4, 8, 3 }, /* IRDA */ | ||
86 | { 55, 4, 8, 3 }, /* IRDA */ | ||
87 | |||
88 | { 56, 4, 4, 3 }, /* SCIF */ | ||
89 | { 57, 4, 4, 3 }, /* SCIF */ | ||
90 | { 58, 4, 4, 3 }, /* SCIF */ | ||
91 | { 59, 4, 4, 3 }, /* SCIF */ | ||
92 | }; | ||
93 | |||
94 | static unsigned long ipr_offsets[] = { | ||
95 | 0xfffffee2, /* 0: IPRA */ | ||
96 | 0xfffffee4, /* 1: IPRB */ | ||
97 | 0xa4000016, /* 2: IPRC */ | ||
98 | 0xa4000018, /* 3: IPRD */ | ||
99 | 0xa400001a, /* 4: IPRE */ | ||
100 | }; | ||
101 | |||
102 | static struct ipr_desc ipr_irq_desc = { | ||
103 | .ipr_offsets = ipr_offsets, | ||
104 | .nr_offsets = ARRAY_SIZE(ipr_offsets), | ||
105 | |||
106 | .ipr_data = ipr_irq_table, | ||
107 | .nr_irqs = ARRAY_SIZE(ipr_irq_table), | ||
108 | |||
109 | .chip = { | ||
110 | .name = "IPR-sh7709", | ||
111 | }, | ||
78 | }; | 112 | }; |
79 | 113 | ||
80 | void __init init_IRQ_ipr() | 114 | void __init init_IRQ_ipr(void) |
81 | { | 115 | { |
82 | make_ipr_irq(sh7709_ipr_map, ARRAY_SIZE(sh7709_ipr_map)); | 116 | register_ipr_controller(&ipr_irq_desc); |
83 | } | 117 | } |
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c index 51760a7e7f1c..f40e6dac337d 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c | |||
@@ -49,7 +49,7 @@ static int __init sh7710_devices_setup(void) | |||
49 | } | 49 | } |
50 | __initcall(sh7710_devices_setup); | 50 | __initcall(sh7710_devices_setup); |
51 | 51 | ||
52 | static struct ipr_data sh7710_ipr_map[] = { | 52 | static struct ipr_data ipr_irq_table[] = { |
53 | /* IRQ, IPR-idx, shift, priority */ | 53 | /* IRQ, IPR-idx, shift, priority */ |
54 | { 16, 0, 12, 2 }, /* TMU0 TUNI*/ | 54 | { 16, 0, 12, 2 }, /* TMU0 TUNI*/ |
55 | { 17, 0, 8, 2 }, /* TMU1 TUNI */ | 55 | { 17, 0, 8, 2 }, /* TMU1 TUNI */ |
@@ -78,26 +78,30 @@ static struct ipr_data sh7710_ipr_map[] = { | |||
78 | }; | 78 | }; |
79 | 79 | ||
80 | static unsigned long ipr_offsets[] = { | 80 | static unsigned long ipr_offsets[] = { |
81 | 0xA414FEE2 /* 0: IPRA */ | 81 | 0xA414FEE2, /* 0: IPRA */ |
82 | , 0xA414FEE4 /* 1: IPRB */ | 82 | 0xA414FEE4, /* 1: IPRB */ |
83 | , 0xA4140016 /* 2: IPRC */ | 83 | 0xA4140016, /* 2: IPRC */ |
84 | , 0xA4140018 /* 3: IPRD */ | 84 | 0xA4140018, /* 3: IPRD */ |
85 | , 0xA414001A /* 4: IPRE */ | 85 | 0xA414001A, /* 4: IPRE */ |
86 | , 0xA4080000 /* 5: IPRF */ | 86 | 0xA4080000, /* 5: IPRF */ |
87 | , 0xA4080002 /* 6: IPRG */ | 87 | 0xA4080002, /* 6: IPRG */ |
88 | , 0xA4080004 /* 7: IPRH */ | 88 | 0xA4080004, /* 7: IPRH */ |
89 | , 0xA4080006 /* 8: IPRI */ | 89 | 0xA4080006, /* 8: IPRI */ |
90 | }; | 90 | }; |
91 | 91 | ||
92 | /* given the IPR index return the address of the IPR register */ | 92 | static struct ipr_desc ipr_irq_desc = { |
93 | unsigned int map_ipridx_to_addr(int idx) | 93 | .ipr_offsets = ipr_offsets, |
94 | { | 94 | .nr_offsets = ARRAY_SIZE(ipr_offsets), |
95 | if (idx >= ARRAY_SIZE(ipr_offsets)) | 95 | |
96 | return 0; | 96 | .ipr_data = ipr_irq_table, |
97 | return ipr_offsets[idx]; | 97 | .nr_irqs = ARRAY_SIZE(ipr_irq_table), |
98 | } | 98 | |
99 | .chip = { | ||
100 | .name = "IPR-sh7710", | ||
101 | }, | ||
102 | }; | ||
99 | 103 | ||
100 | void __init init_IRQ_ipr() | 104 | void __init init_IRQ_ipr(void) |
101 | { | 105 | { |
102 | make_ipr_irq(sh7710_ipr_map, ARRAY_SIZE(sh7710_ipr_map)); | 106 | register_ipr_controller(&ipr_irq_desc); |
103 | } | 107 | } |