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authorPaul Mundt <lethal@linux-sh.org>2006-10-11 23:03:04 -0400
committerPaul Mundt <lethal@linux-sh.org>2006-10-11 23:03:04 -0400
commitbaf4326e49801526e4516e4de7f37b5e51468c49 (patch)
tree44fc3dd7c68827613cf0bcfcf2f4edacc63b1ea1 /arch/sh/kernel/cpu/sh3
parent8884c4cb8b621963b5eb4a9ae45070bd0cb7085f (diff)
sh: interrupt exception handling rework
Kill off interrupt_table for all of the CPU subtypes, we now default in to stepping in to do_IRQ() for _all_ IRQ exceptions and counting the spurious ones, rather than simply flipping on the ones we cared about. This and enabling the IRQ by default automatically has already uncovered a couple of bugs and IRQs that weren't being caught, as well as some that are being generated far too often (SCI Tx Data Empty, for example). The general rationale is to use a marker for interrupt exceptions, test for it in the handle_exception() path, and skip out to do_IRQ() if it's found. Everything else follows the same behaviour of finding the cached EXPEVT value in r2/r2_bank, we just rip out the INTEVT read from entry.S entirely (except for in the kGDB NMI case, which is another matter). Note that while this changes the do_IRQ() semantics regarding r4 handling, they were fundamentally broken anyways (relying entirely on r2_bank for the cached code). With this, we do the INTEVT read from do_IRQ() itself (in the CONFIG_CPU_HAS_INTEVT case), or fall back on r4 for the muxed IRQ number, which should also be closer to what SH-2 and SH-2A want anyways. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh3')
-rw-r--r--arch/sh/kernel/cpu/sh3/ex.S195
1 files changed, 0 insertions, 195 deletions
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index 44daf44833f9..6be46f0686b7 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -49,198 +49,3 @@ ENTRY(nmi_slot)
49#endif 49#endif
50ENTRY(user_break_point_trap) 50ENTRY(user_break_point_trap)
51 .long break_point_trap /* 1E0 */ 51 .long break_point_trap /* 1E0 */
52ENTRY(interrupt_table)
53 ! external hardware
54 .long do_IRQ ! 0000 /* 200 */
55 .long do_IRQ ! 0001
56 .long do_IRQ ! 0010
57 .long do_IRQ ! 0011
58 .long do_IRQ ! 0100
59 .long do_IRQ ! 0101
60 .long do_IRQ ! 0110
61 .long do_IRQ ! 0111
62 .long do_IRQ ! 1000 /* 300 */
63 .long do_IRQ ! 1001
64 .long do_IRQ ! 1010
65 .long do_IRQ ! 1011
66 .long do_IRQ ! 1100
67 .long do_IRQ ! 1101
68 .long do_IRQ ! 1110
69 .long exception_error
70 ! Internal hardware
71 .long do_IRQ ! TMU0 tuni0 /* 400 */
72 .long do_IRQ ! TMU1 tuni1
73 .long do_IRQ ! TMU2 tuni2
74 .long do_IRQ ! ticpi2
75 .long do_IRQ ! RTC ati
76 .long do_IRQ ! pri
77 .long do_IRQ ! cui
78 .long do_IRQ ! SCI eri
79 .long do_IRQ ! rxi /* 500 */
80 .long do_IRQ ! txi
81 .long do_IRQ ! tei
82 .long do_IRQ ! WDT iti /* 560 */
83 .long do_IRQ ! REF rcmi
84 .long do_IRQ ! rovi
85 .long do_IRQ
86 .long do_IRQ /* 5E0 */
87#if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
88 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
89 defined(CONFIG_CPU_SUBTYPE_SH7706) || \
90 defined(CONFIG_CPU_SUBTYPE_SH7300) || \
91 defined(CONFIG_CPU_SUBTYPE_SH7705) || \
92 defined(CONFIG_CPU_SUBTYPE_SH7710)
93 .long do_IRQ ! 32 IRQ irq0 /* 600 */
94 .long do_IRQ ! 33 irq1
95 .long do_IRQ ! 34 irq2
96 .long do_IRQ ! 35 irq3
97 .long do_IRQ ! 36 irq4
98 .long do_IRQ ! 37 irq5
99 .long do_IRQ ! 38
100 .long do_IRQ ! 39
101 .long do_IRQ ! 40 PINT pint0-7 /* 700 */
102 .long do_IRQ ! 41 pint8-15
103 .long do_IRQ ! 42
104 .long do_IRQ ! 43
105 .long do_IRQ ! 44
106 .long do_IRQ ! 45
107 .long do_IRQ ! 46
108 .long do_IRQ ! 47
109 .long do_IRQ ! 48 DMAC dei0 /* 800 */
110 .long do_IRQ ! 49 dei1
111 .long do_IRQ ! 50 dei2
112 .long do_IRQ ! 51 dei3
113 .long do_IRQ ! 52 IrDA eri1
114 .long do_IRQ ! 53 rxi1
115 .long do_IRQ ! 54 bri1
116 .long do_IRQ ! 55 txi1
117 .long do_IRQ ! 56 SCIF eri2
118 .long do_IRQ ! 57 rxi2
119 .long do_IRQ ! 58 bri2
120 .long do_IRQ ! 59 txi2
121 .long do_IRQ ! 60 ADC adi /* 980 */
122#if defined(CONFIG_CPU_SUBTYPE_SH7705)
123 .long exception_none ! 61 /* 9A0 */
124 .long exception_none ! 62
125 .long exception_none ! 63
126 .long exception_none ! 64 /* A00 */
127 .long do_IRQ ! 65 USB usi0
128 .long do_IRQ ! 66 usi1
129 .long exception_none ! 67
130 .long exception_none ! 68
131 .long exception_none ! 69
132 .long exception_none ! 70
133 .long exception_none ! 71
134 .long exception_none ! 72 /* B00 */
135 .long exception_none ! 73
136 .long exception_none ! 74
137 .long exception_none ! 75
138 .long exception_none ! 76
139 .long exception_none ! 77
140 .long exception_none ! 78
141 .long exception_none ! 79
142 .long do_IRQ ! 80 TPU0 tpi0 /* C00 */
143 .long do_IRQ ! 81 TPU1 tpi1
144 .long exception_none ! 82
145 .long exception_none ! 83
146 .long do_IRQ ! 84 TPU2 tpi2
147 .long do_IRQ ! 85 TPU3 tpi3 /* CA0 */
148#endif
149#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7300)
150 .long do_IRQ ! 61 LCDC lcdi /* 9A0 */
151 .long do_IRQ ! 62 PCC pcc0i
152 .long do_IRQ ! 63 pcc1i /* 9E0 */
153#endif
154#if defined(CONFIG_CPU_SUBTYPE_SH7710)
155 .long exception_none ! 61 /* 9A0 */
156 .long exception_none ! 62
157 .long exception_none ! 63
158 .long exception_none ! 64 /* A00 */
159 .long exception_none ! 65
160 .long exception_none ! 66
161 .long exception_none ! 67
162 .long exception_none ! 68
163 .long exception_none ! 69
164 .long exception_none ! 70
165 .long exception_none ! 71
166 .long exception_none ! 72 /* B00 */
167 .long exception_none ! 73
168 .long exception_none ! 74
169 .long exception_none ! 75
170 .long do_IRQ ! 76 DMAC2 dei4 /* B80 */
171 .long do_IRQ ! 77 DMAC2 dei5
172 .long exception_none ! 78
173 .long do_IRQ ! 79 IPSEC ipseci /* BE0 */
174 .long do_IRQ ! 80 EDMAC eint0 /* C00 */
175 .long do_IRQ ! 81 EDMAC eint1
176 .long do_IRQ ! 82 EDMAC eint2
177 .long exception_none ! 83 /* C60 */
178 .long exception_none ! 84
179 .long exception_none ! 85
180 .long exception_none ! 86
181 .long exception_none ! 87
182 .long exception_none ! 88 /* D00 */
183 .long exception_none ! 89
184 .long exception_none ! 90
185 .long exception_none ! 91
186 .long exception_none ! 92
187 .long exception_none ! 93
188 .long exception_none ! 94
189 .long exception_none ! 95
190 .long do_IRQ ! 96 SIOF eri0 /* E00 */
191 .long do_IRQ ! 97 txi0
192 .long do_IRQ ! 98 rxi0
193 .long do_IRQ ! 99 cci0
194 .long do_IRQ ! 100 eri1 /* E80 */
195 .long do_IRQ ! 101 txi1
196 .long do_IRQ ! 102 rxi2
197 .long do_IRQ ! 103 cci3
198#endif
199#if defined(CONFIG_CPU_SUBTYPE_SH7300)
200 .long do_IRQ ! 64
201 .long do_IRQ ! 65
202 .long do_IRQ ! 66
203 .long do_IRQ ! 67
204 .long do_IRQ ! 68
205 .long do_IRQ ! 69
206 .long do_IRQ ! 70
207 .long do_IRQ ! 71
208 .long do_IRQ ! 72
209 .long do_IRQ ! 73
210 .long do_IRQ ! 74
211 .long do_IRQ ! 75
212 .long do_IRQ ! 76
213 .long do_IRQ ! 77
214 .long do_IRQ ! 78
215 .long do_IRQ ! 79
216 .long do_IRQ ! 80 SCIF0(SH7300)
217 .long do_IRQ ! 81
218 .long do_IRQ ! 82
219 .long do_IRQ ! 83
220 .long do_IRQ ! 84
221 .long do_IRQ ! 85
222 .long do_IRQ ! 86
223 .long do_IRQ ! 87
224 .long do_IRQ ! 88
225 .long do_IRQ ! 89
226 .long do_IRQ ! 90
227 .long do_IRQ ! 91
228 .long do_IRQ ! 92
229 .long do_IRQ ! 93
230 .long do_IRQ ! 94
231 .long do_IRQ ! 95
232 .long do_IRQ ! 96
233 .long do_IRQ ! 97
234 .long do_IRQ ! 98
235 .long do_IRQ ! 99
236 .long do_IRQ ! 100
237 .long do_IRQ ! 101
238 .long do_IRQ ! 102
239 .long do_IRQ ! 103
240 .long do_IRQ ! 104
241 .long do_IRQ ! 105
242 .long do_IRQ ! 106
243 .long do_IRQ ! 107
244 .long do_IRQ ! 108
245#endif
246#endif
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