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authorMagnus Damm <damm@igel.co.jp>2008-01-10 00:08:55 -0500
committerPaul Mundt <lethal@linux-sh.org>2008-01-27 23:19:02 -0500
commit7f3edee81fbd49114c28057512906f169caa0bed (patch)
treed1c604fc6cddcd42f00eff1d153e8151ef00ba07 /arch/sh/kernel/cpu/sh3/setup-sh7720.c
parentb62ad83d91ebf1368e9e72d476b18698ac67bef9 (diff)
sh: intc - remove default interrupt priority tables
This patch removes interrupt priority tables from the intc code. Optimal priority assignment varies with embedded application anyway, so keeping the interrupt priority tables together with cpu-specific code doesn't make sense. The function intc_set_priority() should be used instead to set the desired interrupt priority level. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh3/setup-sh7720.c')
-rw-r--r--arch/sh/kernel/cpu/sh3/setup-sh7720.c14
1 files changed, 2 insertions, 12 deletions
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 00facd028a08..c00471a89212 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -156,16 +156,6 @@ static struct intc_group groups[] __initdata = {
156 INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3), 156 INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3),
157}; 157};
158 158
159static struct intc_prio priorities[] __initdata = {
160 INTC_PRIO(SCIF0, 2),
161 INTC_PRIO(SCIF1, 2),
162 INTC_PRIO(DMAC1, 1),
163 INTC_PRIO(DMAC2, 1),
164 INTC_PRIO(RTC, 2),
165 INTC_PRIO(TMU, 2),
166 INTC_PRIO(TPU, 2),
167};
168
169static struct intc_prio_reg prio_registers[] __initdata = { 159static struct intc_prio_reg prio_registers[] __initdata = {
170 { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 160 { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
171 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } }, 161 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
@@ -184,7 +174,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
184}; 174};
185 175
186static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, 176static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
187 priorities, NULL, prio_registers, NULL); 177 NULL, prio_registers, NULL);
188 178
189static struct intc_sense_reg sense_registers[] __initdata = { 179static struct intc_sense_reg sense_registers[] __initdata = {
190 { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } }, 180 { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
@@ -197,7 +187,7 @@ static struct intc_vect vectors_irq[] __initdata = {
197}; 187};
198 188
199static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq, 189static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq,
200 NULL, priorities, NULL, prio_registers, sense_registers); 190 NULL, NULL, prio_registers, sense_registers);
201 191
202void __init plat_irq_setup_pins(int mode) 192void __init plat_irq_setup_pins(int mode)
203{ 193{