aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
diff options
context:
space:
mode:
authorPaul Mundt <lethal@linux-sh.org>2010-11-01 12:18:48 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-11-09 02:40:00 -0500
commit16b259203c513ed28bd31cc9a981e0d3ad517943 (patch)
treed29600ee92f96a8f9bcf9e3d91e001ea8e09015c /arch/sh/kernel/cpu/sh2a/clock-sh7201.c
parenta7bcf21e60c73cb7f7c13fad928967d7e47c3cac (diff)
sh: migrate SH_CLK_MD to mode pin API.
This kills off the hardcoded SH_CLK_MD introduced by the SH-2 boards and converts over to the mode pin API. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh2a/clock-sh7201.c')
-rw-r--r--arch/sh/kernel/cpu/sh2a/clock-sh7201.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
index b26264dc2aef..1174e2d96c03 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -22,19 +22,12 @@ static const int pll1rate[]={1,2,3,4,6,8};
22static const int pfc_divisors[]={1,2,3,4,6,8,12}; 22static const int pfc_divisors[]={1,2,3,4,6,8,12};
23#define ifc_divisors pfc_divisors 23#define ifc_divisors pfc_divisors
24 24
25#if (CONFIG_SH_CLK_MD == 0) 25static unsigned int pll2_mult;
26#define PLL2 (4)
27#elif (CONFIG_SH_CLK_MD == 2)
28#define PLL2 (2)
29#elif (CONFIG_SH_CLK_MD == 3)
30#define PLL2 (1)
31#else
32#error "Illegal Clock Mode!"
33#endif
34 26
35static void master_clk_init(struct clk *clk) 27static void master_clk_init(struct clk *clk)
36{ 28{
37 return 10000000 * PLL2 * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; 29 clk->rate = 10000000 * pll2_mult *
30 pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007];
38} 31}
39 32
40static struct clk_ops sh7201_master_clk_ops = { 33static struct clk_ops sh7201_master_clk_ops = {
@@ -80,6 +73,13 @@ static struct clk_ops *sh7201_clk_ops[] = {
80 73
81void __init arch_init_clk_ops(struct clk_ops **ops, int idx) 74void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
82{ 75{
76 if (test_mode_pin(MODE_PIN1 | MODE_PIN0))
77 pll2_mult = 1;
78 else if (test_mode_pin(MODE_PIN1))
79 pll2_mult = 2;
80 else
81 pll2_mult = 4;
82
83 if (idx < ARRAY_SIZE(sh7201_clk_ops)) 83 if (idx < ARRAY_SIZE(sh7201_clk_ops))
84 *ops = sh7201_clk_ops[idx]; 84 *ops = sh7201_clk_ops[idx];
85} 85}