sh: Fixup cpu_data references for the non-boot CPUs.

There are a lot of bogus cpu_data-> references that only end up working
for the boot CPU, convert these to current_cpu_data to fixup SMP.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

1 files changed, 16 insertions, 16 deletions

diff --git a/arch/sh/kernel/cpu/sh2/probe.c b/arch/sh/kernel/cpu/sh2/probe.c
index ba527d9b5024..108e81b682ed 100644
--- a/arch/sh/kernel/cpu/sh2/probe.c
+++ b/arch/sh/kernel/cpu/sh2/probe.c
@@ -18,27 +18,27 @@
 int __init detect_cpu_and_cache_system(void)
 {
 #if defined(CONFIG_CPU_SUBTYPE_SH7604)
-        cpu_data->type                  = CPU_SH7604;
-        cpu_data->dcache.ways           = 4;
-        cpu_data->dcache.way_incr       = (1<<10);
-        cpu_data->dcache.sets           = 64;
-        cpu_data->dcache.entry_shift    = 4;
-        cpu_data->dcache.linesz         = L1_CACHE_BYTES;
-        cpu_data->dcache.flags          = 0;
+        current_cpu_data.type                   = CPU_SH7604;
+        current_cpu_data.dcache.ways            = 4;
+        current_cpu_data.dcache.way_incr        = (1<<10);
+        current_cpu_data.dcache.sets            = 64;
+        current_cpu_data.dcache.entry_shift     = 4;
+        current_cpu_data.dcache.linesz          = L1_CACHE_BYTES;
+        current_cpu_data.dcache.flags           = 0;
 #elif defined(CONFIG_CPU_SUBTYPE_SH7619)
-        cpu_data->type                  = CPU_SH7619;
-        cpu_data->dcache.ways           = 4;
-        cpu_data->dcache.way_incr       = (1<<12);
-        cpu_data->dcache.sets           = 256;
-        cpu_data->dcache.entry_shift    = 4;
-        cpu_data->dcache.linesz         = L1_CACHE_BYTES;
-        cpu_data->dcache.flags          = 0;
+        current_cpu_data.type                   = CPU_SH7619;
+        current_cpu_data.dcache.ways            = 4;
+        current_cpu_data.dcache.way_incr        = (1<<12);
+        current_cpu_data.dcache.sets            = 256;
+        current_cpu_data.dcache.entry_shift     = 4;
+        current_cpu_data.dcache.linesz          = L1_CACHE_BYTES;
+        current_cpu_data.dcache.flags           = 0;
 #endif
         /*
          * SH-2 doesn't have separate caches
          */
-        cpu_data->dcache.flags |= SH_CACHE_COMBINED;
-        cpu_data->icache = cpu_data->dcache;
+        current_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
+        current_cpu_data.icache = current_cpu_data.dcache;
 
         return 0;
 }