Merge branch 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas into next/soc

* 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/renesas: (234 commits)
  ARM: shmobile: remove additional __io() macro use
  ARM: mach-shmobile: default to no earlytimer
  ARM: mach-shmobile: r8a7779 and Marzen timer rework
  ARM: mach-shmobile: r8a7740 and Bonito timer rework
  ARM: mach-shmobile: sh73a0, AG5EVM and Kota2 timer rework
  ARM: mach-shmobile: sh7372, AP4EVB and Mackerel timer rework
  ARM: mach-shmobile: sh7377 and G4EVM timer rework
  ARM: mach-shmobile: sh7367 and G3EVM timer rework
  ARM: mach-shmobile: add shmobile_earlytimer_init()
  ARM: mach-shmobile: Move sh7372 AP4EVB external clk setup
  ARM: mach-shmobile: Move sh7372 Mackerel external clk setup
  ARM: mach-shmobile: rename clk_init() to shmobile_clk_init()
  ARM: mach-shmobile: r8a7779 L2 cache support
  ARM: mach-shmobile: r8a7779 map_io and init_early update
  ARM: mach-shmobile: r8a7740 map_io and init_early update
  ARM: mach-shmobile: sh73a0 map_io and init_early update
  ARM: mach-shmobile: sh7372 map_io and init_early update
  ARM: mach-shmobile: sh7377 map_io and init_early update
  ARM: mach-shmobile: sh7367 map_io and init_early update
  sh: remove clk_ops
  ...

  (includes an update to v3.3-rc7)

Conflicts:
	arch/arm/mach-omap2/id.c

1 files changed, 6 insertions, 6 deletions

diff --git a/arch/sh/kernel/cpu/sh2/clock-sh7619.c b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
index 5b7f12e58a8d..e80252ae5bca 100644
--- a/arch/sh/kernel/cpu/sh2/clock-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
@@ -28,7 +28,7 @@ static void master_clk_init(struct clk *clk)
         clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
 }
 
-static struct clk_ops sh7619_master_clk_ops = {
+static struct sh_clk_ops sh7619_master_clk_ops = {
         .init           = master_clk_init,
 };
 
@@ -38,7 +38,7 @@ static unsigned long module_clk_recalc(struct clk *clk)
         return clk->parent->rate / pfc_divisors[idx];
 }
 
-static struct clk_ops sh7619_module_clk_ops = {
+static struct sh_clk_ops sh7619_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
@@ -47,22 +47,22 @@ static unsigned long bus_clk_recalc(struct clk *clk)
         return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
 }
 
-static struct clk_ops sh7619_bus_clk_ops = {
+static struct sh_clk_ops sh7619_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static struct clk_ops sh7619_cpu_clk_ops = {
+static struct sh_clk_ops sh7619_cpu_clk_ops = {
         .recalc         = followparent_recalc,
 };
 
-static struct clk_ops *sh7619_clk_ops[] = {
+static struct sh_clk_ops *sh7619_clk_ops[] = {
         &sh7619_master_clk_ops,
         &sh7619_module_clk_ops,
         &sh7619_bus_clk_ops,
         &sh7619_cpu_clk_ops,
 };
 
-void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
 {
         if (test_mode_pin(MODE_PIN2 | MODE_PIN0) ||
             test_mode_pin(MODE_PIN2 | MODE_PIN1))