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authorLinus Torvalds <torvalds@linux-foundation.org>2009-06-11 13:08:33 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-11 13:08:33 -0400
commitd3d07d941fd80c173b6d690ded00ee5fb8302e06 (patch)
treef1a82c956e393df9933c8544bb564ef1735384ee /arch/sh/kernel/cpu/init.c
parent6cd8e300b49332eb9eeda45816c711c198d31505 (diff)
parent54ff328b46e58568c4b3350c2fa3223ef862e5a4 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (266 commits) sh: Tie sparseirq in to Kconfig. sh: Wire up sys_rt_tgsigqueueinfo. sh: Fix sys_pwritev() syscall table entry for sh32. sh: Fix sh4a llsc-based cmpxchg() sh: sh7724: Add JPU support sh: sh7724: INTC setting update sh: sh7722 clock framework rewrite sh: sh7366 clock framework rewrite sh: sh7343 clock framework rewrite sh: sh7724 clock framework rewrite V3 sh: sh7723 clock framework rewrite V2 sh: add enable()/disable()/set_rate() to div6 code sh: add AP325RXA mode pin configuration sh: add Migo-R mode pin configuration sh: sh7722 mode pin definitions sh: sh7724 mode pin comments sh: sh7723 mode pin V2 sh: rework mode pin code sh: clock div6 helper code sh: clock div4 frequency table offset fix ...
Diffstat (limited to 'arch/sh/kernel/cpu/init.c')
-rw-r--r--arch/sh/kernel/cpu/init.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index d29e69c156f0..ad85421099cd 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -62,6 +62,11 @@ static void __init speculative_execution_init(void)
62#define speculative_execution_init() do { } while (0) 62#define speculative_execution_init() do { } while (0)
63#endif 63#endif
64 64
65/* 2nd-level cache init */
66void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void)
67{
68}
69
65/* 70/*
66 * Generic first-level cache init 71 * Generic first-level cache init
67 */ 72 */
@@ -146,6 +151,8 @@ static void __uses_jump_to_uncached cache_init(void)
146 flags &= ~CCR_CACHE_ENABLE; 151 flags &= ~CCR_CACHE_ENABLE;
147#endif 152#endif
148 153
154 l2_cache_init();
155
149 ctrl_outl(flags, CCR); 156 ctrl_outl(flags, CCR);
150 back_to_cached(); 157 back_to_cached();
151} 158}