diff options
author | Michael Trimarchi <trimarchi@gandalf.sssup.it> | 2009-04-03 13:32:33 -0400 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2009-04-04 11:48:11 -0400 |
commit | 01ab10393c510342ec4ce85df11ccfa3df06bbb2 (patch) | |
tree | ebf0493fa7b53941f830f8b300037f834eb85e59 /arch/sh/include | |
parent | a27873cd234b4248dda342721d6262943e5fa235 (diff) |
sh: Fix up DSP context save/restore.
There were a number of issues with the DSP context save/restore code,
mostly left-over relics from when it was introduced on SH3-DSP with
little follow-up testing, resulting in things like task_pt_dspregs()
referencing incorrect state on the stack.
This follows the MIPS convention of tracking the DSP state in the
thread_struct and handling the state save/restore in switch_to() and
finish_arch_switch() respectively. The regset interface is also updated,
which allows us to finally be rid of task_pt_dspregs() and the special
cased task_pt_regs().
Signed-off-by: Michael Trimarchi <michael@evidence.eu.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/include')
-rw-r--r-- | arch/sh/include/asm/processor_32.h | 13 | ||||
-rw-r--r-- | arch/sh/include/asm/ptrace.h | 8 | ||||
-rw-r--r-- | arch/sh/include/asm/system_32.h | 170 |
3 files changed, 136 insertions, 55 deletions
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h index efdd78a53b11..9a8714945dc9 100644 --- a/arch/sh/include/asm/processor_32.h +++ b/arch/sh/include/asm/processor_32.h | |||
@@ -58,6 +58,14 @@ asmlinkage void __init sh_cpu_init(void); | |||
58 | #define SR_FD 0x00008000 | 58 | #define SR_FD 0x00008000 |
59 | 59 | ||
60 | /* | 60 | /* |
61 | * DSP structure and data | ||
62 | */ | ||
63 | struct sh_dsp_struct { | ||
64 | unsigned long dsp_regs[14]; | ||
65 | long status; | ||
66 | }; | ||
67 | |||
68 | /* | ||
61 | * FPU structure and data | 69 | * FPU structure and data |
62 | */ | 70 | */ |
63 | 71 | ||
@@ -96,6 +104,11 @@ struct thread_struct { | |||
96 | 104 | ||
97 | /* floating point info */ | 105 | /* floating point info */ |
98 | union sh_fpu_union fpu; | 106 | union sh_fpu_union fpu; |
107 | |||
108 | #ifdef CONFIG_SH_DSP | ||
109 | /* Dsp status information */ | ||
110 | struct sh_dsp_struct dsp_status; | ||
111 | #endif | ||
99 | }; | 112 | }; |
100 | 113 | ||
101 | /* Count of active tasks with UBC settings */ | 114 | /* Count of active tasks with UBC settings */ |
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h index 81c6568fdb3e..d3f6caa936b0 100644 --- a/arch/sh/include/asm/ptrace.h +++ b/arch/sh/include/asm/ptrace.h | |||
@@ -119,16 +119,8 @@ struct task_struct; | |||
119 | extern void user_enable_single_step(struct task_struct *); | 119 | extern void user_enable_single_step(struct task_struct *); |
120 | extern void user_disable_single_step(struct task_struct *); | 120 | extern void user_disable_single_step(struct task_struct *); |
121 | 121 | ||
122 | #ifdef CONFIG_SH_DSP | ||
123 | #define task_pt_regs(task) \ | ||
124 | ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \ | ||
125 | - sizeof(struct pt_dspregs)) - 1) | ||
126 | #define task_pt_dspregs(task) \ | ||
127 | ((struct pt_dspregs *) (task_stack_page(task) + THREAD_SIZE) - 1) | ||
128 | #else | ||
129 | #define task_pt_regs(task) \ | 122 | #define task_pt_regs(task) \ |
130 | ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1) | 123 | ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1) |
131 | #endif | ||
132 | 124 | ||
133 | static inline unsigned long profile_pc(struct pt_regs *regs) | 125 | static inline unsigned long profile_pc(struct pt_regs *regs) |
134 | { | 126 | { |
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h index a726d5d07277..240b31e1142c 100644 --- a/arch/sh/include/asm/system_32.h +++ b/arch/sh/include/asm/system_32.h | |||
@@ -3,59 +3,135 @@ | |||
3 | 3 | ||
4 | #include <linux/types.h> | 4 | #include <linux/types.h> |
5 | 5 | ||
6 | #ifdef CONFIG_SH_DSP | ||
7 | |||
8 | #define is_dsp_enabled(tsk) \ | ||
9 | (!!(tsk->thread.dsp_status.status & SR_DSP)) | ||
10 | |||
11 | #define __restore_dsp(tsk) \ | ||
12 | do { \ | ||
13 | register u32 *__ts2 __asm__ ("r2") = \ | ||
14 | (u32 *)&tsk->thread.dsp_status; \ | ||
15 | __asm__ __volatile__ ( \ | ||
16 | ".balign 4\n\t" \ | ||
17 | "movs.l @r2+, a1\n\t" \ | ||
18 | "movs.l @r2+, a0g\n\t" \ | ||
19 | "movs.l @r2+, a1g\n\t" \ | ||
20 | "movs.l @r2+, m0\n\t" \ | ||
21 | "movs.l @r2+, m1\n\t" \ | ||
22 | "movs.l @r2+, a0\n\t" \ | ||
23 | "movs.l @r2+, x0\n\t" \ | ||
24 | "movs.l @r2+, x1\n\t" \ | ||
25 | "movs.l @r2+, y0\n\t" \ | ||
26 | "movs.l @r2+, y1\n\t" \ | ||
27 | "lds.l @r2+, dsr\n\t" \ | ||
28 | "ldc.l @r2+, rs\n\t" \ | ||
29 | "ldc.l @r2+, re\n\t" \ | ||
30 | "ldc.l @r2+, mod\n\t" \ | ||
31 | : : "r" (__ts2)); \ | ||
32 | } while (0) | ||
33 | |||
34 | |||
35 | #define __save_dsp(tsk) \ | ||
36 | do { \ | ||
37 | register u32 *__ts2 __asm__ ("r2") = \ | ||
38 | (u32 *)&tsk->thread.dsp_status + 14; \ | ||
39 | \ | ||
40 | __asm__ __volatile__ ( \ | ||
41 | ".balign 4\n\t" \ | ||
42 | "stc.l mod, @-r2\n\t" \ | ||
43 | "stc.l re, @-r2\n\t" \ | ||
44 | "stc.l rs, @-r2\n\t" \ | ||
45 | "sts.l dsr, @-r2\n\t" \ | ||
46 | "sts.l y1, @-r2\n\t" \ | ||
47 | "sts.l y0, @-r2\n\t" \ | ||
48 | "sts.l x1, @-r2\n\t" \ | ||
49 | "sts.l x0, @-r2\n\t" \ | ||
50 | "sts.l a0, @-r2\n\t" \ | ||
51 | ".word 0xf653 ! movs.l a1, @-r2\n\t" \ | ||
52 | ".word 0xf6f3 ! movs.l a0g, @-r2\n\t" \ | ||
53 | ".word 0xf6d3 ! movs.l a1g, @-r2\n\t" \ | ||
54 | ".word 0xf6c3 ! movs.l m0, @-r2\n\t" \ | ||
55 | ".word 0xf6e3 ! movs.l m1, @-r2\n\t" \ | ||
56 | : : "r" (__ts2)); \ | ||
57 | } while (0) | ||
58 | |||
59 | #else | ||
60 | |||
61 | #define is_dsp_enabled(tsk) (0) | ||
62 | #define __save_dsp(tsk) do { } while (0) | ||
63 | #define __restore_dsp(tsk) do { } while (0) | ||
64 | #endif | ||
65 | |||
6 | struct task_struct *__switch_to(struct task_struct *prev, | 66 | struct task_struct *__switch_to(struct task_struct *prev, |
7 | struct task_struct *next); | 67 | struct task_struct *next); |
8 | 68 | ||
9 | /* | 69 | /* |
10 | * switch_to() should switch tasks to task nr n, first | 70 | * switch_to() should switch tasks to task nr n, first |
11 | */ | 71 | */ |
12 | #define switch_to(prev, next, last) \ | 72 | #define switch_to(prev, next, last) \ |
13 | do { \ | 73 | do { \ |
14 | register u32 *__ts1 __asm__ ("r1") = (u32 *)&prev->thread.sp; \ | 74 | register u32 *__ts1 __asm__ ("r1"); \ |
15 | register u32 *__ts2 __asm__ ("r2") = (u32 *)&prev->thread.pc; \ | 75 | register u32 *__ts2 __asm__ ("r2"); \ |
16 | register u32 *__ts4 __asm__ ("r4") = (u32 *)prev; \ | 76 | register u32 *__ts4 __asm__ ("r4"); \ |
17 | register u32 *__ts5 __asm__ ("r5") = (u32 *)next; \ | 77 | register u32 *__ts5 __asm__ ("r5"); \ |
18 | register u32 *__ts6 __asm__ ("r6") = (u32 *)&next->thread.sp; \ | 78 | register u32 *__ts6 __asm__ ("r6"); \ |
19 | register u32 __ts7 __asm__ ("r7") = next->thread.pc; \ | 79 | register u32 __ts7 __asm__ ("r7"); \ |
20 | struct task_struct *__last; \ | 80 | struct task_struct *__last; \ |
21 | \ | 81 | \ |
22 | __asm__ __volatile__ ( \ | 82 | if (is_dsp_enabled(prev)) \ |
23 | ".balign 4\n\t" \ | 83 | __save_dsp(prev); \ |
24 | "stc.l gbr, @-r15\n\t" \ | 84 | \ |
25 | "sts.l pr, @-r15\n\t" \ | 85 | __ts1 = (u32 *)&prev->thread.sp; \ |
26 | "mov.l r8, @-r15\n\t" \ | 86 | __ts2 = (u32 *)&prev->thread.pc; \ |
27 | "mov.l r9, @-r15\n\t" \ | 87 | __ts4 = (u32 *)prev; \ |
28 | "mov.l r10, @-r15\n\t" \ | 88 | __ts5 = (u32 *)next; \ |
29 | "mov.l r11, @-r15\n\t" \ | 89 | __ts6 = (u32 *)&next->thread.sp; \ |
30 | "mov.l r12, @-r15\n\t" \ | 90 | __ts7 = next->thread.pc; \ |
31 | "mov.l r13, @-r15\n\t" \ | 91 | \ |
32 | "mov.l r14, @-r15\n\t" \ | 92 | __asm__ __volatile__ ( \ |
33 | "mov.l r15, @r1\t! save SP\n\t" \ | 93 | ".balign 4\n\t" \ |
34 | "mov.l @r6, r15\t! change to new stack\n\t" \ | 94 | "stc.l gbr, @-r15\n\t" \ |
35 | "mova 1f, %0\n\t" \ | 95 | "sts.l pr, @-r15\n\t" \ |
36 | "mov.l %0, @r2\t! save PC\n\t" \ | 96 | "mov.l r8, @-r15\n\t" \ |
37 | "mov.l 2f, %0\n\t" \ | 97 | "mov.l r9, @-r15\n\t" \ |
38 | "jmp @%0\t! call __switch_to\n\t" \ | 98 | "mov.l r10, @-r15\n\t" \ |
39 | " lds r7, pr\t! with return to new PC\n\t" \ | 99 | "mov.l r11, @-r15\n\t" \ |
40 | ".balign 4\n" \ | 100 | "mov.l r12, @-r15\n\t" \ |
41 | "2:\n\t" \ | 101 | "mov.l r13, @-r15\n\t" \ |
42 | ".long __switch_to\n" \ | 102 | "mov.l r14, @-r15\n\t" \ |
43 | "1:\n\t" \ | 103 | "mov.l r15, @r1\t! save SP\n\t" \ |
44 | "mov.l @r15+, r14\n\t" \ | 104 | "mov.l @r6, r15\t! change to new stack\n\t" \ |
45 | "mov.l @r15+, r13\n\t" \ | 105 | "mova 1f, %0\n\t" \ |
46 | "mov.l @r15+, r12\n\t" \ | 106 | "mov.l %0, @r2\t! save PC\n\t" \ |
47 | "mov.l @r15+, r11\n\t" \ | 107 | "mov.l 2f, %0\n\t" \ |
48 | "mov.l @r15+, r10\n\t" \ | 108 | "jmp @%0\t! call __switch_to\n\t" \ |
49 | "mov.l @r15+, r9\n\t" \ | 109 | " lds r7, pr\t! with return to new PC\n\t" \ |
50 | "mov.l @r15+, r8\n\t" \ | 110 | ".balign 4\n" \ |
51 | "lds.l @r15+, pr\n\t" \ | 111 | "2:\n\t" \ |
52 | "ldc.l @r15+, gbr\n\t" \ | 112 | ".long __switch_to\n" \ |
53 | : "=z" (__last) \ | 113 | "1:\n\t" \ |
54 | : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ | 114 | "mov.l @r15+, r14\n\t" \ |
55 | "r" (__ts5), "r" (__ts6), "r" (__ts7) \ | 115 | "mov.l @r15+, r13\n\t" \ |
56 | : "r3", "t"); \ | 116 | "mov.l @r15+, r12\n\t" \ |
57 | \ | 117 | "mov.l @r15+, r11\n\t" \ |
58 | last = __last; \ | 118 | "mov.l @r15+, r10\n\t" \ |
119 | "mov.l @r15+, r9\n\t" \ | ||
120 | "mov.l @r15+, r8\n\t" \ | ||
121 | "lds.l @r15+, pr\n\t" \ | ||
122 | "ldc.l @r15+, gbr\n\t" \ | ||
123 | : "=z" (__last) \ | ||
124 | : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ | ||
125 | "r" (__ts5), "r" (__ts6), "r" (__ts7) \ | ||
126 | : "r3", "t"); \ | ||
127 | \ | ||
128 | last = __last; \ | ||
129 | } while (0) | ||
130 | |||
131 | #define finish_arch_switch(prev) \ | ||
132 | do { \ | ||
133 | if (is_dsp_enabled(prev)) \ | ||
134 | __restore_dsp(prev); \ | ||
59 | } while (0) | 135 | } while (0) |
60 | 136 | ||
61 | #define __uses_jump_to_uncached \ | 137 | #define __uses_jump_to_uncached \ |